Attachment 145220 Details for Bug 111507 – dmesg with experimental patch

dmesg with experimental patch

dmesg.txt (text/plain), 125.55 KB, created by Lionel Landwerlin on 2019-08-30 15:16:42 UTC

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Creator: Lionel Landwerlin

Created: 2019-08-30 15:16:42 UTC

Size: 125.55 KB

patch

obsolete

>[  156.497828] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  156.497833] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  156.497838] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  156.497843] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  156.497848] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  156.497852] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  156.497857] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  156.497862] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  156.497966] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5]
>[  156.497969] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5] disconnected
>[  156.497974] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6]
>[  156.497977] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6] disconnected
>[  156.497982] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7]
>[  156.497984] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7] disconnected
>[  156.497990] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8]
>[  156.497992] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8] disconnected
>[  156.497998] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9]
>[  156.498000] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9] disconnected
>[  156.498005] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10]
>[  156.501475] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  156.501509] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  156.501543] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  156.504101] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  156.512007] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  156.512040] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  156.514095] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  156.514118] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  156.526535] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  156.526557] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  156.528570] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  156.528592] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  156.996288] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  156.996311] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  156.997994] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  156.998013] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.002279] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.002309] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  157.002333] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.002459] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10] probed modes :
>[  157.002483] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[  157.002504] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[  157.002527] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.002553] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.002572] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  157.002590] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  157.002606] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  157.002620] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  157.002634] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.002648] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  157.004020] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  157.004043] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cf6e2681 state to 00000000b7f64fd0
>[  157.004062] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  157.004083] [drm:drm_atomic_commit [drm]] committing 00000000b7f64fd0
>[  157.004137] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  157.004155] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  157.004805] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 00 00
>[  157.004869] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.004938] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  157.005029] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  157.005055] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 0000000076dff19c state to 00000000b7f64fd0
>[  157.005079] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 0000000076dff19c
>[  157.005101] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  157.005124] [drm:drm_atomic_commit [drm]] committing 00000000b7f64fd0
>[  157.005220] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  157.005246] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  157.006479] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.037229] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1]
>[  157.037273] [drm:intel_dp_detect [i915]] [CONNECTOR:86:eDP-1]
>[  157.037311] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.037345] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.037378] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.037815] [drm:intel_dp_detect [i915]] MST support? port A: no, sink: no, modparam: yes
>[  157.039562] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.039582] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  157.039594] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.039632] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1] probed modes :
>[  157.039647] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[  157.039659] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 48 298600 3200 3248 3280 3360 1800 1803 1808 1852 0x40 0xa
>[  157.039841] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1]
>[  157.039885] [drm:intel_dp_detect [i915]] [CONNECTOR:92:DP-1]
>[  157.041429] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 00 00 05 01 83 02 00 00 00 00 00 02
>[  157.043456] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA30 HW-rev 1.0 SW-rev 3.10 quirks 0x0000
>[  157.049026] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.049060] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.049092] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.050405] [drm:intel_dp_detect [i915]] MST support? port B: yes, sink: yes, modparam: yes
>[  157.050413] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1] disconnected
>[  157.050438] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2]
>[  157.050473] [drm:intel_dp_detect [i915]] [CONNECTOR:100:DP-2]
>[  157.051920] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 00 00 05 01 83 02 00 00 00 00 00 02
>[  157.053381] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA3  HW-rev 1.0 SW-rev 3.10 quirks 0x0000
>[  157.056037] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.056057] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.056074] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.057443] [drm:intel_dp_detect [i915]] MST support? port C: yes, sink: yes, modparam: yes
>[  157.057448] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2] disconnected
>[  157.057463] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3]
>[  157.057467] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3] disconnected
>[  157.057474] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4]
>[  157.057488] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  157.057495] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.057504] [drm:drm_add_edid_modes [drm]] ELD monitor DELL U2715H
>[  157.057510] [drm:drm_add_edid_modes [drm]] ELD size 36, SAD count 1
>[  157.057516] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.057660] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.057666] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.057672] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.057677] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.057683] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  157.057688] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  157.057694] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576i": 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  157.057699] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: NO_INTERLACE
>[  157.057705] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  157.057710] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.057716] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.057720] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.057726] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  157.057731] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  157.057737] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4] probed modes :
>[  157.057743] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2560x1440": 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x9
>[  157.057748] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2048x1152": 60 162000 2048 2074 2154 2250 1152 1153 1156 1200 0x40 0x5
>[  157.057753] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1200": 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[  157.057758] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.057763] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.057768] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.057773] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  157.057778] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.057783] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.057788] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  157.057793] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  157.057797] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  157.057802] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1600x1200": 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  157.057807] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1680x1050": 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  157.057812] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.057817] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.057822] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1200x960": 60 95403 1200 1272 1400 1600 960 961 964 994 0x0 0x6
>[  157.057827] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1152x864": 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  157.057832] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.057837] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.057842] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.057847] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  157.057851] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  157.057856] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  157.057862] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  157.057866] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  157.057871] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576": 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  157.057876] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.057881] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.057886] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.057891] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.057895] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.057900] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  157.057905] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.057910] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.057915] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.057920] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  157.058002] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5]
>[  157.058005] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5] disconnected
>[  157.058011] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6]
>[  157.058013] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6] disconnected
>[  157.058019] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7]
>[  157.058021] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7] disconnected
>[  157.058026] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8]
>[  157.058029] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8] disconnected
>[  157.058034] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9]
>[  157.058037] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9] disconnected
>[  157.058042] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10]
>[  157.060314] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.060335] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.060361] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  157.062604] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.067924] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.067979] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.068523] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.068582] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.075747] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.075791] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.076354] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.076402] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.083433] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.083473] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.084044] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.084091] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.088538] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.088561] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  157.088577] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.088675] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10] probed modes :
>[  157.088693] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[  157.088710] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[  157.088726] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.088741] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.088755] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  157.088770] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  157.088785] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  157.088802] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  157.088813] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.088824] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  157.090089] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008dc0df69
>[  157.090108] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cdf34f2f state to 000000008dc0df69
>[  157.090125] [drm:drm_atomic_check_only [drm]] checking 000000008dc0df69
>[  157.090142] [drm:drm_atomic_commit [drm]] committing 000000008dc0df69
>[  157.090188] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008dc0df69
>[  157.090202] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008dc0df69
>[  157.091024] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008dc0df69
>[  157.091076] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 00 00
>[  157.091125] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.091139] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 000000003c987b8c state to 000000008dc0df69
>[  157.091157] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 000000003c987b8c
>[  157.091171] [drm:drm_atomic_check_only [drm]] checking 000000008dc0df69
>[  157.091217] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  157.091234] [drm:drm_atomic_commit [drm]] committing 000000008dc0df69
>[  157.091274] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008dc0df69
>[  157.091290] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008dc0df69
>[  157.092642] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.148598] [drm:drm_mode_addfb2 [drm]] [FB:136]
>[  157.148625] [drm:drm_mode_setcrtc [drm]] [CRTC:48:pipe A]
>[  157.148644] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:86:eDP-1]
>[  157.148663] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008dc0df69
>[  157.148681] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000aeb69da7 state to 000000008dc0df69
>[  157.148696] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000062f13a2b state to 000000008dc0df69
>[  157.148713] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:31:plane 1A] state 0000000062f13a2b to [CRTC:48:pipe A]
>[  157.148728] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:136] for [PLANE:31:plane 1A] state 0000000062f13a2b
>[  157.148744] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:48:pipe A] to 000000008dc0df69
>[  157.148762] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:86:eDP-1] 00000000d2682351 state to 000000008dc0df69
>[  157.148779] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 00000000d2682351 to [NOCRTC]
>[  157.148793] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 00000000d2682351 to [CRTC:48:pipe A]
>[  157.148812] [drm:drm_atomic_check_only [drm]] checking 000000008dc0df69
>[  157.148831] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:86:eDP-1]
>[  157.148840] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:86:eDP-1] keeps [ENCODER:85:DDI A], now on [CRTC:48:pipe A]
>[  157.148918] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 136
>[  157.148965] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 0 -> 1, off 0, on 1, ms 0
>[  157.149010] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -    0) -> (   0 -  853), size    0 ->  853
>[  157.149042] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>[  157.149075] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   5,   6,   6,  10,  11,  12,  14,   0
>[  157.149109] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   63, 113, 140, 151, 242, 277, 300, 347,   0
>[  157.149143] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   64, 114, 141, 152, 243, 278, 301, 348,   0
>[  157.149167] [drm:drm_atomic_commit [drm]] committing 000000008dc0df69
>[  157.188077] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008dc0df69
>[  157.188114] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008dc0df69
>[  157.188209] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008dc0df69
>[  157.188242] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007cdd2521 state to 000000008dc0df69
>[  157.188268] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004bb3679a state to 000000008dc0df69
>[  157.188296] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:136] for [PLANE:31:plane 1A] state 000000004bb3679a
>[  157.188321] [drm:drm_atomic_check_only [drm]] checking 000000008dc0df69
>[  157.188431] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 136
>[  157.188514] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  157.188562] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008dc0df69 nonblocking
>[  157.188688] [drm:drm_mode_setcrtc [drm]] [CRTC:66:pipe B]
>[  157.188722] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bb2bc8b3
>[  157.188752] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:66:pipe B] 00000000cb6efcff state to 00000000bb2bc8b3
>[  157.188778] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 1B] 00000000f36a5be3 state to 00000000bb2bc8b3
>[  157.188806] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:66:pipe B] state 00000000cb6efcff
>[  157.188831] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:49:plane 1B] state 00000000f36a5be3
>[  157.188856] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:66:pipe B] to 00000000bb2bc8b3
>[  157.188885] [drm:drm_atomic_check_only [drm]] checking 00000000bb2bc8b3
>[  157.188915] [drm:drm_atomic_commit [drm]] committing 00000000bb2bc8b3
>[  157.188978] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bb2bc8b3
>[  157.189002] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bb2bc8b3
>[  157.189040] [drm:drm_mode_setcrtc [drm]] [CRTC:84:pipe C]
>[  157.189064] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bb2bc8b3
>[  157.189090] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:84:pipe C] 000000008f4be357 state to 00000000bb2bc8b3
>[  157.189112] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 1C] 0000000041651037 state to 00000000bb2bc8b3
>[  157.189139] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:84:pipe C] state 000000008f4be357
>[  157.189163] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 1C] state 0000000041651037
>[  157.189186] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:84:pipe C] to 00000000bb2bc8b3
>[  157.189219] [drm:drm_atomic_check_only [drm]] checking 00000000bb2bc8b3
>[  157.189303] [drm:drm_atomic_commit [drm]] committing 00000000bb2bc8b3
>[  157.189380] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bb2bc8b3
>[  157.189415] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bb2bc8b3
>[  157.204759] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008dc0df69
>[  157.204811] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008dc0df69
>[  157.221419] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  157.236636] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ba8172fb
>[  157.236680] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a6946432 state to 00000000ba8172fb
>[  157.236707] [drm:drm_atomic_check_only [drm]] checking 00000000ba8172fb
>[  157.236754] [drm:drm_atomic_commit [drm]] committing 00000000ba8172fb
>[  157.238326] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ba8172fb
>[  157.238362] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ba8172fb
>[  157.310390] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1]
>[  157.310520] [drm:intel_dp_detect [i915]] [CONNECTOR:86:eDP-1]
>[  157.310616] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.310703] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.310785] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.311305] [drm:intel_dp_detect [i915]] MST support? port A: no, sink: no, modparam: yes
>[  157.311742] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.311780] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  157.311806] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.311887] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1] probed modes :
>[  157.311918] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[  157.311946] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 48 298600 3200 3248 3280 3360 1800 1803 1808 1852 0x40 0xa
>[  157.311985] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1]
>[  157.312069] [drm:intel_dp_detect [i915]] [CONNECTOR:92:DP-1]
>[  157.312198] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  157.313715] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 00 00 05 01 83 02 00 00 00 00 00 02
>[  157.315159] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA30 HW-rev 1.0 SW-rev 3.10 quirks 0x0000
>[  157.318061] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.318149] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.318242] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.319670] [drm:intel_dp_detect [i915]] MST support? port B: yes, sink: yes, modparam: yes
>[  157.319687] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1] disconnected
>[  157.319731] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2]
>[  157.319810] [drm:intel_dp_detect [i915]] [CONNECTOR:100:DP-2]
>[  157.321410] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 00 00 05 01 83 02 00 00 00 00 00 02
>[  157.322840] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA3  HW-rev 1.0 SW-rev 3.10 quirks 0x0000
>[  157.325669] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  157.325738] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  157.325805] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  157.327219] [drm:intel_dp_detect [i915]] MST support? port C: yes, sink: yes, modparam: yes
>[  157.327233] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2] disconnected
>[  157.327264] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3]
>[  157.327277] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3] disconnected
>[  157.327299] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4]
>[  157.327338] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  157.327366] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.327396] [drm:drm_add_edid_modes [drm]] ELD monitor DELL U2715H
>[  157.327418] [drm:drm_add_edid_modes [drm]] ELD size 36, SAD count 1
>[  157.327438] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.327984] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.328007] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.328031] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.328053] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.328076] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  157.328096] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  157.328118] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576i": 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  157.328137] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: NO_INTERLACE
>[  157.328161] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  157.328188] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.328213] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  157.328232] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  157.328252] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  157.328271] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  157.328295] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4] probed modes :
>[  157.328316] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2560x1440": 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x9
>[  157.328336] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2048x1152": 60 162000 2048 2074 2154 2250 1152 1153 1156 1200 0x40 0x5
>[  157.328355] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1200": 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[  157.328374] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.328393] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.328412] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.328431] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  157.328450] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.328469] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  157.328488] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  157.328507] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  157.328527] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  157.328546] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1600x1200": 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  157.328565] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1680x1050": 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  157.328584] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.328603] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.328622] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1200x960": 60 95403 1200 1272 1400 1600 960 961 964 994 0x0 0x6
>[  157.328641] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1152x864": 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  157.328660] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.328680] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.328699] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  157.328718] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  157.328736] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  157.328755] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  157.328775] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  157.328794] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  157.328812] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576": 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  157.328831] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.328850] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.328869] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.328888] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.328906] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  157.328925] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  157.328944] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.328962] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.328981] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.329000] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  157.329072] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5]
>[  157.329082] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5] disconnected
>[  157.329103] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6]
>[  157.329113] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6] disconnected
>[  157.329133] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7]
>[  157.329142] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7] disconnected
>[  157.329166] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8]
>[  157.329180] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:109:DP-8] disconnected
>[  157.329213] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9]
>[  157.329224] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:132:DP-9] disconnected
>[  157.329245] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10]
>[  157.331651] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.331753] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.331947] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  157.333484] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.338833] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.338906] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.339447] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.339560] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.346766] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.346836] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.347366] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.347436] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.354421] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040, long 0x00000000
>[  157.354500] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[  157.356571] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 10 00
>[  157.356641] [drm:intel_dp_hpd_pulse [i915]] got esi 01 10 00
>[  157.361057] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.361091] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  157.361114] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  157.361254] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:134:DP-10] probed modes :
>[  157.361287] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[  157.361339] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[  157.361367] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.361386] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  157.361402] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  157.361419] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  157.361435] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  157.361456] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  157.361477] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  157.361493] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  157.363170] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  157.363208] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000238a694b state to 00000000b7f64fd0
>[  157.363233] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000025b1d489 state to 00000000b7f64fd0
>[  157.363255] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  157.363357] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 136
>[  157.363441] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  157.363492] [drm:drm_atomic_commit [drm]] committing 00000000b7f64fd0
>[  157.363694] [drm:intel_dp_hpd_pulse [i915]] got esi2 01 00 00
>[  157.363762] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.363834] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[  157.365309] [drm:intel_dp_hpd_pulse [i915]] got esi 01 00 00
>[  157.371346] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  157.371369] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  157.372060] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  157.372084] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003b69c68b state to 00000000b7f64fd0
>[  157.372102] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000907ae76f state to 00000000b7f64fd0
>[  157.372123] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:31:plane 1A] state 000000003b69c68b
>[  157.372143] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:31:plane 1A] state 000000003b69c68b to [NOCRTC]
>[  157.372163] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  157.372235] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb -1
>[  157.372293] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 0, off 1, on 0, ms 0
>[  157.372335] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -  853) -> (   0 -    0), size  853 ->    0
>[  157.372400] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
>[  157.372483] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   5,   6,   6,  10,  11,  12,  14,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  157.372571] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks   63, 113, 140, 151, 242, 277, 300, 347,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  157.372667] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb   64, 114, 141, 152, 243, 278, 301, 348,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  157.372736] [drm:drm_atomic_commit [drm]] committing 00000000b7f64fd0
>[  157.388202] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  157.388250] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  157.389623] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bb2bc8b3
>[  157.389658] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 000000007978264d state to 00000000bb2bc8b3
>[  157.389688] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 000000007978264d
>[  157.389716] [drm:drm_atomic_check_only [drm]] checking 00000000bb2bc8b3
>[  157.389749] [drm:drm_atomic_commit [drm]] committing 00000000bb2bc8b3
>[  157.389827] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bb2bc8b3
>[  157.389852] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bb2bc8b3
>[  157.468012] [drm:drm_mode_addfb2 [drm]] [FB:114]
>[  157.468031] [drm:drm_mode_setcrtc [drm]] [CRTC:48:pipe A]
>[  157.468046] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:86:eDP-1]
>[  157.468060] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bb2bc8b3
>[  157.468073] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002c3581c7 state to 00000000bb2bc8b3
>[  157.468084] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000213f8628 state to 00000000bb2bc8b3
>[  157.468097] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:31:plane 1A] state 00000000213f8628 to [CRTC:48:pipe A]
>[  157.468108] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:114] for [PLANE:31:plane 1A] state 00000000213f8628
>[  157.468118] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:48:pipe A] to 00000000bb2bc8b3
>[  157.468129] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:86:eDP-1] 00000000212225a4 state to 00000000bb2bc8b3
>[  157.468143] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 00000000212225a4 to [NOCRTC]
>[  157.468153] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 00000000212225a4 to [CRTC:48:pipe A]
>[  157.468168] [drm:drm_atomic_check_only [drm]] checking 00000000bb2bc8b3
>[  157.468181] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:86:eDP-1]
>[  157.468204] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:86:eDP-1] keeps [ENCODER:85:DDI A], now on [CRTC:48:pipe A]
>[  157.468247] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 114
>[  157.468276] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 0 -> 1, off 0, on 1, ms 0
>[  157.468304] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -    0) -> (   0 -  853), size    0 ->  853
>[  157.468324] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>[  157.468348] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   5,   6,   6,  10,  11,  12,  14,   0
>[  157.468374] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   63, 113, 140, 151, 242, 277, 300, 347,   0
>[  157.468399] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   64, 114, 141, 152, 243, 278, 301, 348,   0
>[  157.468420] [drm:drm_atomic_commit [drm]] committing 00000000bb2bc8b3
>[  157.488141] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bb2bc8b3
>[  157.488154] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bb2bc8b3
>[  157.488228] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bb2bc8b3
>[  157.488240] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f3192142 state to 00000000bb2bc8b3
>[  157.488250] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003d020609 state to 00000000bb2bc8b3
>[  157.488259] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:114] for [PLANE:31:plane 1A] state 000000003d020609
>[  157.488268] [drm:drm_atomic_check_only [drm]] checking 00000000bb2bc8b3
>[  157.488311] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 114
>[  157.488339] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  157.488358] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bb2bc8b3 nonblocking
>[  157.488416] [drm:drm_mode_setcrtc [drm]] [CRTC:66:pipe B]
>[  157.488427] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fdc00282
>[  157.488440] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:66:pipe B] 00000000072399b8 state to 00000000fdc00282
>[  157.488448] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 1B] 00000000a69fd5d5 state to 00000000fdc00282
>[  157.488458] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:66:pipe B] state 00000000072399b8
>[  157.488466] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:49:plane 1B] state 00000000a69fd5d5
>[  157.488475] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:66:pipe B] to 00000000fdc00282
>[  157.488488] [drm:drm_atomic_check_only [drm]] checking 00000000fdc00282
>[  157.488499] [drm:drm_atomic_commit [drm]] committing 00000000fdc00282
>[  157.488525] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fdc00282
>[  157.488533] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fdc00282
>[  157.488548] [drm:drm_mode_setcrtc [drm]] [CRTC:84:pipe C]
>[  157.488556] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fdc00282
>[  157.488564] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:84:pipe C] 00000000870dc2e6 state to 00000000fdc00282
>[  157.488571] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 1C] 00000000f36a5be3 state to 00000000fdc00282
>[  157.488579] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:84:pipe C] state 00000000870dc2e6
>[  157.488587] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 1C] state 00000000f36a5be3
>[  157.488594] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:84:pipe C] to 00000000fdc00282
>[  157.488601] [drm:drm_atomic_check_only [drm]] checking 00000000fdc00282
>[  157.488610] [drm:drm_atomic_commit [drm]] committing 00000000fdc00282
>[  157.488627] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fdc00282
>[  157.488634] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fdc00282
>[  157.502606] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fdc00282
>[  157.502621] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008c3b0155 state to 00000000fdc00282
>[  157.502630] [drm:drm_atomic_check_only [drm]] checking 00000000fdc00282
>[  157.502647] [drm:drm_atomic_commit [drm]] committing 00000000fdc00282
>[  157.504690] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bb2bc8b3
>[  157.504700] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bb2bc8b3
>[  157.521606] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fdc00282
>[  157.521619] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fdc00282
>[  157.525406] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  158.964471] [drm:drm_mode_addfb2 [drm]] [FB:137]
>[  158.964532] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004a415dbb
>[  158.964568] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006d4ad60a state to 000000004a415dbb
>[  158.964636] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000758da7b9 state to 000000004a415dbb
>[  158.964668] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:137] for [PLANE:31:plane 1A] state 00000000758da7b9
>[  158.964697] [drm:drm_atomic_check_only [drm]] checking 000000004a415dbb
>[  158.964856] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 137
>[  158.964984] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  158.965079] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004a415dbb nonblocking
>[  158.987435] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004a415dbb
>[  158.987491] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004a415dbb
>[  160.378525] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  160.378668] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[  160.987034] [drm:intel_power_well_disable [i915]] disabling DC off
>[  160.987093] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  160.987148] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  161.517146] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[  161.517250] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[  161.517343] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 10
>[  161.517750] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[  161.517863] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  161.517991] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[  161.518103] [drm:intel_dp_detect [i915]] [CONNECTOR:100:DP-2]
>[  161.518504] [drm:intel_dp_detect [i915]] MST device may have disappeared 1 vs 1
>[  161.518597] [drm:intel_power_well_enable [i915]] enabling DC off
>[  161.519018] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  161.519508] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  161.528045] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.536509] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.544971] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.553432] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.561893] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.570354] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.578815] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.587276] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.595737] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.604198] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.612659] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.621120] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.629580] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.638040] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.646501] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.654961] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.663422] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.671883] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.680344] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.688805] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.697265] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.705725] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.714185] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.722645] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.731106] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.739568] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.748029] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.756490] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.764951] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.773411] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.781871] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.790330] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  161.790339] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[  161.790361] [drm:intel_dp_destroy_mst_connector [i915]] [CONNECTOR:109:DP-8]
>[  161.790430] [drm:intel_dp_destroy_mst_connector [i915]] [CONNECTOR:132:DP-9]
>[  161.790462] [drm:intel_dp_destroy_mst_connector [i915]] [CONNECTOR:134:DP-10]
>[  161.793477] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1]
>[  161.793510] [drm:intel_dp_detect [i915]] [CONNECTOR:86:eDP-1]
>[  161.793531] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  161.793550] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  161.793568] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  161.793607] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  161.793670] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
>[  161.793997] [drm:intel_dp_detect [i915]] MST support? port A: no, sink: no, modparam: yes
>[  161.794318] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  161.794327] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[  161.794334] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  161.794356] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:eDP-1] probed modes :
>[  161.794364] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[  161.794370] [drm:drm_mode_debug_printmodeline [drm]] Modeline "3200x1800": 48 298600 3200 3248 3280 3360 1800 1803 1808 1852 0x40 0xa
>[  161.794381] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1]
>[  161.794401] [drm:intel_dp_detect [i915]] [CONNECTOR:92:DP-1]
>[  161.795777] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 00 00 05 01 83 02 00 00 00 00 00 02
>[  161.797114] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA30 HW-rev 1.0 SW-rev 3.10 quirks 0x0000
>[  161.799738] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  161.799756] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[  161.799773] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[  161.801049] [drm:intel_dp_detect [i915]] MST support? port B: yes, sink: yes, modparam: yes
>[  161.801053] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:92:DP-1] disconnected
>[  161.801063] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2]
>[  161.801080] [drm:intel_dp_detect [i915]] [CONNECTOR:100:DP-2]
>[  161.801094] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:100:DP-2] disconnected
>[  161.801100] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3]
>[  161.801104] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:111:DP-3] disconnected
>[  161.801110] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4]
>[  161.801123] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  161.801130] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  161.801139] [drm:drm_add_edid_modes [drm]] ELD monitor DELL U2715H
>[  161.801147] [drm:drm_add_edid_modes [drm]] ELD size 36, SAD count 1
>[  161.801153] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  161.801296] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  161.801302] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  161.801308] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  161.801313] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  161.801319] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  161.801324] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  161.801329] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576i": 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  161.801334] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: NO_INTERLACE
>[  161.801340] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  161.801344] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  161.801350] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080i": 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  161.801355] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[  161.801360] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480i": 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  161.801365] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: NO_INTERLACE
>[  161.801371] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:105:DP-4] probed modes :
>[  161.801377] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2560x1440": 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x9
>[  161.801382] [drm:drm_mode_debug_printmodeline [drm]] Modeline "2048x1152": 60 162000 2048 2074 2154 2250 1152 1153 1156 1200 0x40 0x5
>[  161.801387] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1200": 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[  161.801392] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  161.801396] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  161.801401] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  161.801406] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  161.801411] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  161.801416] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  161.801421] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  161.801425] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  161.801430] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1920x1080": 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  161.801435] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1600x1200": 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  161.801440] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1680x1050": 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  161.801445] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  161.801450] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x1024": 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  161.801455] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1200x960": 60 95403 1200 1272 1400 1600 960 961 964 994 0x0 0x6
>[  161.801460] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1152x864": 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  161.801465] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  161.801469] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  161.801474] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  161.801479] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1280x720": 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  161.801484] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  161.801489] [drm:drm_mode_debug_printmodeline [drm]] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  161.801494] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  161.801499] [drm:drm_mode_debug_printmodeline [drm]] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  161.801503] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x576": 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  161.801508] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  161.801513] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  161.801518] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  161.801523] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  161.801527] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x480": 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  161.801532] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  161.801537] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  161.801542] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  161.801547] [drm:drm_mode_debug_printmodeline [drm]] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  161.801552] [drm:drm_mode_debug_printmodeline [drm]] Modeline "720x400": 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  161.801573] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5]
>[  161.801576] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:120:DP-5] disconnected
>[  161.801581] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6]
>[  161.801583] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:126:DP-6] disconnected
>[  161.801589] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7]
>[  161.801591] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:128:DP-7] disconnected
>[  161.802046] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006721b787
>[  161.802054] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000213f8628 state to 000000006721b787
>[  161.802062] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ffeb4aed state to 000000006721b787
>[  161.802068] [drm:drm_atomic_check_only [drm]] checking 000000006721b787
>[  161.802098] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 137
>[  161.802119] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  161.802132] [drm:drm_atomic_commit [drm]] committing 000000006721b787
>[  161.824382] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006721b787
>[  161.824394] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006721b787
>[  161.824978] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006721b787
>[  161.824991] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004bb3679a state to 000000006721b787
>[  161.825002] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000004fabb5c state to 000000006721b787
>[  161.825012] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:31:plane 1A] state 000000004bb3679a
>[  161.825022] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:31:plane 1A] state 000000004bb3679a to [NOCRTC]
>[  161.825032] [drm:drm_atomic_check_only [drm]] checking 000000006721b787
>[  161.825070] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb -1
>[  161.825090] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 0, off 1, on 0, ms 0
>[  161.825106] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -  853) -> (   0 -    0), size  853 ->    0
>[  161.825118] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
>[  161.825130] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   5,   6,   6,  10,  11,  12,  14,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  161.825142] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks   63, 113, 140, 151, 242, 277, 300, 347,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  161.825153] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb   64, 114, 141, 152, 243, 278, 301, 348,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>[  161.825162] [drm:drm_atomic_commit [drm]] committing 000000006721b787
>[  161.841023] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006721b787
>[  161.841035] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006721b787
>[  161.841704] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000047096805
>[  161.841715] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000898d576f state to 0000000047096805
>[  161.841724] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 00000000898d576f
>[  161.841732] [drm:drm_atomic_check_only [drm]] checking 0000000047096805
>[  161.841743] [drm:drm_atomic_commit [drm]] committing 0000000047096805
>[  161.841777] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000047096805
>[  161.841787] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000047096805
>[  161.869638] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  161.869650] [drm:drm_mode_setcrtc [drm]] [CRTC:48:pipe A]
>[  161.869660] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:86:eDP-1]
>[  161.869669] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000047096805
>[  161.869678] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038f07415 state to 0000000047096805
>[  161.869685] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000523fbd07 state to 0000000047096805
>[  161.869692] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:31:plane 1A] state 00000000523fbd07 to [CRTC:48:pipe A]
>[  161.869699] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000523fbd07
>[  161.869706] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:48:pipe A] to 0000000047096805
>[  161.869713] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:86:eDP-1] 0000000074e98a4f state to 0000000047096805
>[  161.869721] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 0000000074e98a4f to [NOCRTC]
>[  161.869727] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:86:eDP-1] state 0000000074e98a4f to [CRTC:48:pipe A]
>[  161.869736] [drm:drm_atomic_check_only [drm]] checking 0000000047096805
>[  161.869743] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:86:eDP-1]
>[  161.869747] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:86:eDP-1] keeps [ENCODER:85:DDI A], now on [CRTC:48:pipe A]
>[  161.869780] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  161.869801] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 0 -> 1, off 0, on 1, ms 0
>[  161.869819] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 -    0) -> (   0 -  853), size    0 ->  853
>[  161.869832] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>[  161.869844] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   5,   6,   6,  10,  11,  12,  14,   0
>[  161.869855] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   63, 113, 140, 151, 242, 277, 300, 347,   0
>[  161.869867] [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   64, 114, 141, 152, 243, 278, 301, 348,   0
>[  161.869876] [drm:drm_atomic_commit [drm]] committing 0000000047096805
>[  161.907725] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000047096805
>[  161.907739] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000047096805
>[  161.907789] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000047096805
>[  161.907800] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006765d35c state to 0000000047096805
>[  161.907809] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000053e5416a state to 0000000047096805
>[  161.907818] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000053e5416a
>[  161.907827] [drm:drm_atomic_check_only [drm]] checking 0000000047096805
>[  161.907873] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  161.907901] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  161.907921] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000047096805 nonblocking
>[  161.907982] [drm:drm_mode_setcrtc [drm]] [CRTC:66:pipe B]
>[  161.907994] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008b93b67
>[  161.908006] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:66:pipe B] 00000000aeb69da7 state to 0000000008b93b67
>[  161.908016] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 1B] 00000000e16bda01 state to 0000000008b93b67
>[  161.908026] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:66:pipe B] state 00000000aeb69da7
>[  161.908036] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:49:plane 1B] state 00000000e16bda01
>[  161.908047] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:66:pipe B] to 0000000008b93b67
>[  161.908057] [drm:drm_atomic_check_only [drm]] checking 0000000008b93b67
>[  161.908068] [drm:drm_atomic_commit [drm]] committing 0000000008b93b67
>[  161.908094] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008b93b67
>[  161.908103] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008b93b67
>[  161.908118] [drm:drm_mode_setcrtc [drm]] [CRTC:84:pipe C]
>[  161.908127] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008b93b67
>[  161.908136] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:84:pipe C] 000000007cdd2521 state to 0000000008b93b67
>[  161.908144] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 1C] 0000000040cbb56a state to 0000000008b93b67
>[  161.908152] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:84:pipe C] state 000000007cdd2521
>[  161.908160] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 1C] state 0000000040cbb56a
>[  161.908168] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:84:pipe C] to 0000000008b93b67
>[  161.908176] [drm:drm_atomic_check_only [drm]] checking 0000000008b93b67
>[  161.908185] [drm:drm_atomic_commit [drm]] committing 0000000008b93b67
>[  161.908202] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008b93b67
>[  161.908210] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008b93b67
>[  161.924184] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000047096805
>[  161.924204] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000047096805
>[  161.936909] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008b93b67
>[  161.936934] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000888ed88e state to 0000000008b93b67
>[  161.936949] [drm:drm_atomic_check_only [drm]] checking 0000000008b93b67
>[  161.936976] [drm:drm_atomic_commit [drm]] committing 0000000008b93b67
>[  161.940980] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008b93b67
>[  161.941002] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008b93b67
>[  161.994786] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  162.811197] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  162.811315] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[  162.811418] [drm:intel_dp_detect [i915]] [CONNECTOR:100:DP-2]
>[  163.212910] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  163.212979] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  163.213019] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000907ae76f state to 00000000b7f64fd0
>[  163.213052] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000efef2415 state to 00000000b7f64fd0
>[  163.213088] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000efef2415
>[  163.213121] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  163.213313] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  163.213466] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  163.213580] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  163.235821] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  163.235837] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  163.236754] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  163.236787] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b60168e1
>[  163.236801] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000367084ef state to 00000000b60168e1
>[  163.236812] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cf6e2681 state to 00000000b60168e1
>[  163.236824] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000cf6e2681
>[  163.236835] [drm:drm_atomic_check_only [drm]] checking 00000000b60168e1
>[  163.236890] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  163.236923] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  163.236946] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b60168e1 nonblocking
>[  163.252462] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b60168e1
>[  163.252482] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b60168e1
>[  163.490191] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  163.490259] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  163.490301] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000009da87ac2 state to 00000000b7f64fd0
>[  163.490332] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000efef2415 state to 00000000b7f64fd0
>[  163.490368] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000efef2415
>[  163.490401] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  163.490548] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  163.490706] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  163.490797] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  163.518586] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  163.518629] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  163.520254] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  163.520312] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  163.520348] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000054bbaf0 state to 00000000773ebd77
>[  163.520378] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000076dff19c state to 00000000773ebd77
>[  163.520410] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000076dff19c
>[  163.520439] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  163.520552] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  163.520650] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  163.520725] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  163.535261] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  163.535299] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  164.078979] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  164.079037] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  164.079074] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f529d21a state to 00000000a4dcc51b
>[  164.079178] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000238a694b state to 00000000a4dcc51b
>[  164.079234] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000238a694b
>[  164.079285] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  164.079477] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  164.079629] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.079717] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  164.102034] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  164.102077] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  164.104390] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  164.104448] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  164.104484] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f5a95ddc state to 00000000a4dcc51b
>[  164.104513] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cf6e2681 state to 00000000a4dcc51b
>[  164.104545] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000cf6e2681
>[  164.104574] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  164.104692] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  164.104823] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.104896] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  164.118693] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  164.118733] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  164.122105] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  164.122165] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  164.122203] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000090b55c64 state to 00000000773ebd77
>[  164.122233] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000efef2415 state to 00000000773ebd77
>[  164.122267] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000efef2415
>[  164.122298] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  164.122420] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  164.122515] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.122568] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  164.135371] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  164.135411] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  164.685136] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  164.685226] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  164.685275] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b8cd2aa8 state to 00000000b7f64fd0
>[  164.685309] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000076dff19c state to 00000000b7f64fd0
>[  164.685346] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000076dff19c
>[  164.685381] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  164.685509] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  164.685611] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.685670] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  164.707908] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  164.707951] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  164.728819] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  164.728877] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008b93b67
>[  164.728911] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a6946432 state to 0000000008b93b67
>[  164.728941] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000053e5416a state to 0000000008b93b67
>[  164.728973] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 0000000053e5416a
>[  164.729003] [drm:drm_atomic_check_only [drm]] checking 0000000008b93b67
>[  164.729117] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  164.729206] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.729257] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008b93b67 nonblocking
>[  164.741283] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008b93b67
>[  164.741325] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008b93b67
>[  164.744704] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  164.744763] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b60168e1
>[  164.744798] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005e7fee1c state to 00000000b60168e1
>[  164.744829] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003b69c68b state to 00000000b60168e1
>[  164.744885] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000003b69c68b
>[  164.744913] [drm:drm_atomic_check_only [drm]] checking 00000000b60168e1
>[  164.745029] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  164.745118] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.745167] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b60168e1 nonblocking
>[  164.757956] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b60168e1
>[  164.757999] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b60168e1
>[  164.953262] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  164.953298] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b60168e1
>[  164.953318] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006f3f967e state to 00000000b60168e1
>[  164.953335] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000efef2415 state to 00000000b60168e1
>[  164.953353] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000efef2415
>[  164.953371] [drm:drm_atomic_check_only [drm]] checking 00000000b60168e1
>[  164.953440] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  164.953490] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.953521] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b60168e1 nonblocking
>[  164.975718] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b60168e1
>[  164.975757] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b60168e1
>[  164.976772] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  164.976826] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  164.976858] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f529d21a state to 00000000b7f64fd0
>[  164.976885] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003b69c68b state to 00000000b7f64fd0
>[  164.976913] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000003b69c68b
>[  164.976938] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  164.977048] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  164.977132] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  164.977177] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  164.987519] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  164.987649] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[  164.992325] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  164.992371] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  164.992403] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  164.992442] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  164.992471] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  165.147039] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  165.147110] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a7f8eef8
>[  165.147153] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008e237c5f state to 00000000a7f8eef8
>[  165.147245] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000441131f3 state to 00000000a7f8eef8
>[  165.147291] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000441131f3
>[  165.147343] [drm:drm_atomic_check_only [drm]] checking 00000000a7f8eef8
>[  165.147502] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  165.147653] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.147723] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a7f8eef8 nonblocking
>[  165.170077] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a7f8eef8
>[  165.170122] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a7f8eef8
>[  165.171979] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  165.172046] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000046c0df64
>[  165.172102] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005815ce29 state to 0000000046c0df64
>[  165.172155] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000758da7b9 state to 0000000046c0df64
>[  165.172222] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000758da7b9
>[  165.172272] [drm:drm_atomic_check_only [drm]] checking 0000000046c0df64
>[  165.172453] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  165.172601] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.172702] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000046c0df64 nonblocking
>[  165.186679] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000046c0df64
>[  165.186741] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000046c0df64
>[  165.424166] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  165.424237] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  165.424280] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f529d21a state to 00000000773ebd77
>[  165.424315] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d7557ed5 state to 00000000773ebd77
>[  165.424354] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000d7557ed5
>[  165.424389] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  165.424544] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  165.424652] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.424713] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  165.447004] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  165.447047] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  165.448429] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  165.448488] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  165.448524] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b8cd2aa8 state to 00000000a4dcc51b
>[  165.448552] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f87c5229 state to 00000000a4dcc51b
>[  165.448584] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000f87c5229
>[  165.448613] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  165.448726] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  165.448816] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.448867] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  165.463522] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  165.463563] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  165.617784] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  165.617854] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  165.617898] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f5a95ddc state to 00000000a4dcc51b
>[  165.617933] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000238a694b state to 00000000a4dcc51b
>[  165.617971] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000238a694b
>[  165.618007] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  165.618164] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  165.618274] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.618335] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  165.640635] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  165.640685] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  165.641852] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  165.641920] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  165.641960] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b8cd2aa8 state to 00000000773ebd77
>[  165.641993] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cfa79a6 state to 00000000773ebd77
>[  165.642029] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000003cfa79a6
>[  165.642063] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  165.642203] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  165.642306] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.642364] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  165.657265] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  165.657307] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  165.933838] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  165.933909] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007f20d1f1
>[  165.933952] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008e237c5f state to 000000007f20d1f1
>[  165.933988] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008d7a48c1 state to 000000007f20d1f1
>[  165.934027] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000008d7a48c1
>[  165.934064] [drm:drm_atomic_check_only [drm]] checking 000000007f20d1f1
>[  165.934219] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  165.934328] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.934391] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007f20d1f1 nonblocking
>[  165.956675] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007f20d1f1
>[  165.956728] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007f20d1f1
>[  165.957855] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  165.957917] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008239dc4
>[  165.957959] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ffeb4aed state to 0000000008239dc4
>[  165.958004] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000213f8628 state to 0000000008239dc4
>[  165.958042] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000213f8628
>[  165.958080] [drm:drm_atomic_check_only [drm]] checking 0000000008239dc4
>[  165.958214] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  165.958317] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  165.958373] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008239dc4 nonblocking
>[  165.973341] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008239dc4
>[  165.973395] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008239dc4
>[  166.248601] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.248662] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bc1cbf57
>[  166.248699] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005815ce29 state to 00000000bc1cbf57
>[  166.248729] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001d0e60fd state to 00000000bc1cbf57
>[  166.248762] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000001d0e60fd
>[  166.248811] [drm:drm_atomic_check_only [drm]] checking 00000000bc1cbf57
>[  166.248935] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.249047] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.249118] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bc1cbf57 nonblocking
>[  166.271303] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bc1cbf57
>[  166.271385] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bc1cbf57
>[  166.272393] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  166.272448] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008d704509
>[  166.272481] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e61e3a23 state to 000000008d704509
>[  166.272561] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000020611f6 state to 000000008d704509
>[  166.272593] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000020611f6
>[  166.272627] [drm:drm_atomic_check_only [drm]] checking 000000008d704509
>[  166.272742] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  166.272836] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.272886] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008d704509 nonblocking
>[  166.287928] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008d704509
>[  166.287985] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008d704509
>[  166.442692] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.442719] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000679ed8e8
>[  166.442732] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000004a3bf323 state to 00000000679ed8e8
>[  166.442741] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048c849cf state to 00000000679ed8e8
>[  166.442751] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 0000000048c849cf
>[  166.442760] [drm:drm_atomic_check_only [drm]] checking 00000000679ed8e8
>[  166.442803] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.442830] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.442848] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000679ed8e8 nonblocking
>[  166.465111] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000679ed8e8
>[  166.465167] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000679ed8e8
>[  166.485864] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  166.485926] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab69179b
>[  166.485962] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e24ca0e3 state to 00000000ab69179b
>[  166.485993] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005a17052a state to 00000000ab69179b
>[  166.486027] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000005a17052a
>[  166.486078] [drm:drm_atomic_check_only [drm]] checking 00000000ab69179b
>[  166.486213] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  166.486323] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.486418] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab69179b nonblocking
>[  166.498452] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab69179b
>[  166.498507] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab69179b
>[  166.501784] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.501846] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bc1cbf57
>[  166.501884] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000004a3bf323 state to 00000000bc1cbf57
>[  166.501976] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001d0e60fd state to 00000000bc1cbf57
>[  166.502017] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000001d0e60fd
>[  166.502048] [drm:drm_atomic_check_only [drm]] checking 00000000bc1cbf57
>[  166.502191] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.502297] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.502362] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bc1cbf57 nonblocking
>[  166.515127] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bc1cbf57
>[  166.515170] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bc1cbf57
>[  166.636464] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  166.636525] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000046c0df64
>[  166.636562] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e61e3a23 state to 0000000046c0df64
>[  166.636593] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000020611f6 state to 0000000046c0df64
>[  166.636628] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000020611f6
>[  166.636680] [drm:drm_atomic_check_only [drm]] checking 0000000046c0df64
>[  166.636810] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  166.636917] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.637011] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000046c0df64 nonblocking
>[  166.648464] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000046c0df64
>[  166.648518] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000046c0df64
>[  166.652779] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.652837] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  166.652874] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f5a95ddc state to 00000000b7f64fd0
>[  166.652903] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000076dff19c state to 00000000b7f64fd0
>[  166.652935] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 0000000076dff19c
>[  166.652964] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  166.653076] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.653166] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.653214] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  166.665121] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  166.665163] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  166.803621] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  166.803691] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b202896
>[  166.803733] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c3164d97 state to 000000004b202896
>[  166.803768] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000053e5416a state to 000000004b202896
>[  166.803806] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000053e5416a
>[  166.803860] [drm:drm_atomic_check_only [drm]] checking 000000004b202896
>[  166.803999] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  166.804108] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.804169] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004b202896 nonblocking
>[  166.837171] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b202896
>[  166.837219] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b202896
>[  166.838324] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.838393] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b60168e1
>[  166.838435] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f529d21a state to 00000000b60168e1
>[  166.838469] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000076dff19c state to 00000000b60168e1
>[  166.838508] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 0000000076dff19c
>[  166.838543] [drm:drm_atomic_check_only [drm]] checking 00000000b60168e1
>[  166.838680] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.838789] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.838849] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b60168e1 nonblocking
>[  166.853684] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b60168e1
>[  166.853726] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b60168e1
>[  166.974591] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  166.974660] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000703940ef
>[  166.974702] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a6946432 state to 00000000703940ef
>[  166.974744] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000441131f3 state to 00000000703940ef
>[  166.974784] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000441131f3
>[  166.974820] [drm:drm_atomic_check_only [drm]] checking 00000000703940ef
>[  166.974957] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  166.975063] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.975125] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000703940ef nonblocking
>[  166.987130] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000703940ef
>[  166.987176] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000703940ef
>[  166.991619] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  166.991687] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e2c868f3
>[  166.991729] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000888ed88e state to 00000000e2c868f3
>[  166.991764] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009f529f9f state to 00000000e2c868f3
>[  166.991803] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000009f529f9f
>[  166.991838] [drm:drm_atomic_check_only [drm]] checking 00000000e2c868f3
>[  166.991976] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  166.992084] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  166.992144] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e2c868f3 nonblocking
>[  167.003792] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e2c868f3
>[  167.003847] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e2c868f3
>[  167.159624] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  167.159692] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000416c4aea
>[  167.159734] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005815ce29 state to 00000000416c4aea
>[  167.159769] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009be40eac state to 00000000416c4aea
>[  167.159827] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000009be40eac
>[  167.159863] [drm:drm_atomic_check_only [drm]] checking 00000000416c4aea
>[  167.160005] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  167.160127] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.160211] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000416c4aea nonblocking
>[  167.182476] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000416c4aea
>[  167.182539] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000416c4aea
>[  167.653597] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  167.653665] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b60168e1
>[  167.653708] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005e7fee1c state to 00000000b60168e1
>[  167.653744] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cfa79a6 state to 00000000b60168e1
>[  167.653783] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000003cfa79a6
>[  167.653818] [drm:drm_atomic_check_only [drm]] checking 00000000b60168e1
>[  167.653955] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  167.654063] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.654124] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b60168e1 nonblocking
>[  167.676381] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b60168e1
>[  167.676439] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b60168e1
>[  167.677454] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  167.677511] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b8076b1
>[  167.677545] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006d4ad60a state to 000000009b8076b1
>[  167.677571] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048c849cf state to 000000009b8076b1
>[  167.677603] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000048c849cf
>[  167.677630] [drm:drm_atomic_check_only [drm]] checking 000000009b8076b1
>[  167.677770] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  167.677903] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.677967] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b8076b1 nonblocking
>[  167.693012] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b8076b1
>[  167.693069] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b8076b1
>[  167.847196] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  167.847256] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7f64fd0
>[  167.847293] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f5a95ddc state to 00000000b7f64fd0
>[  167.847325] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f87c5229 state to 00000000b7f64fd0
>[  167.847358] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000f87c5229
>[  167.847389] [drm:drm_atomic_check_only [drm]] checking 00000000b7f64fd0
>[  167.847604] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  167.847734] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.847809] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7f64fd0 nonblocking
>[  167.870123] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7f64fd0
>[  167.870177] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7f64fd0
>[  167.871190] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  167.871246] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fac55457
>[  167.871279] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ffeb4aed state to 00000000fac55457
>[  167.871317] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f36a5be3 state to 00000000fac55457
>[  167.871358] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000f36a5be3
>[  167.871390] [drm:drm_atomic_check_only [drm]] checking 00000000fac55457
>[  167.871578] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  167.871686] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.871760] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fac55457 nonblocking
>[  167.886776] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fac55457
>[  167.886829] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fac55457
>[  167.939894] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  167.939933] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cea03e7
>[  167.939955] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006d4ad60a state to 000000000cea03e7
>[  167.939974] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000758da7b9 state to 000000000cea03e7
>[  167.939993] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000758da7b9
>[  167.940011] [drm:drm_atomic_check_only [drm]] checking 000000000cea03e7
>[  167.940083] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  167.940154] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  167.940209] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cea03e7 nonblocking
>[  167.953384] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cea03e7
>[  167.953418] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cea03e7
>[  168.140737] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  168.140806] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  168.140848] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000090b55c64 state to 00000000773ebd77
>[  168.140883] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003b69c68b state to 00000000773ebd77
>[  168.140922] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 000000003b69c68b
>[  168.140958] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  168.141141] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  168.141280] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  168.141381] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  168.163773] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  168.163826] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  168.164968] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  168.165036] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  168.165076] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b8cd2aa8 state to 00000000a4dcc51b
>[  168.165109] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cf6e2681 state to 00000000a4dcc51b
>[  168.165146] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000cf6e2681
>[  168.165199] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  168.165356] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  168.165479] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  168.165573] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  168.180303] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  168.180344] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  168.727489] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  168.727598] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005338289d
>[  168.727640] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000888ed88e state to 000000005338289d
>[  168.727672] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000523fbd07 state to 000000005338289d
>[  168.727709] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 00000000523fbd07
>[  168.727741] [drm:drm_atomic_check_only [drm]] checking 000000005338289d
>[  168.727890] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  168.728019] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  168.728119] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005338289d nonblocking
>[  168.750462] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005338289d
>[  168.750510] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005338289d
>[  168.888647] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  168.888705] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4dcc51b
>[  168.888740] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f529d21a state to 00000000a4dcc51b
>[  168.888768] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f87c5229 state to 00000000a4dcc51b
>[  168.888800] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 00000000f87c5229
>[  168.888829] [drm:drm_atomic_check_only [drm]] checking 00000000a4dcc51b
>[  168.888947] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  168.889043] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  168.889097] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4dcc51b nonblocking
>[  168.922437] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4dcc51b
>[  168.922479] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4dcc51b
>[  168.923466] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  168.923565] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000773ebd77
>[  168.923612] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000090b55c64 state to 00000000773ebd77
>[  168.923656] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000076dff19c state to 00000000773ebd77
>[  168.923708] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000076dff19c
>[  168.923750] [drm:drm_atomic_check_only [drm]] checking 00000000773ebd77
>[  168.923875] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  168.923965] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  168.924014] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000773ebd77 nonblocking
>[  168.939116] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000773ebd77
>[  168.939158] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000773ebd77
>[  169.427085] [drm:drm_mode_addfb2 [drm]] [FB:132]
>[  169.427148] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a006a08e
>[  169.427186] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006d4ad60a state to 00000000a006a08e
>[  169.427216] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009be40eac state to 00000000a006a08e
>[  169.427250] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:132] for [PLANE:31:plane 1A] state 000000009be40eac
>[  169.427305] [drm:drm_atomic_check_only [drm]] checking 00000000a006a08e
>[  169.427453] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 132
>[  169.427567] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  169.427715] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a006a08e nonblocking
>[  169.449936] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a006a08e
>[  169.449959] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008418f0be
>[  169.449975] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a006a08e
>[  169.449996] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008418f0be
>[  169.450009] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008418f0be
>[  169.450564] [drm:drm_mode_addfb2 [drm]] [FB:106]
>[  169.450593] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008418f0be
>[  169.450609] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005815ce29 state to 000000008418f0be
>[  169.450622] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048c849cf state to 000000008418f0be
>[  169.450637] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:106] for [PLANE:31:plane 1A] state 0000000048c849cf
>[  169.450650] [drm:drm_atomic_check_only [drm]] checking 000000008418f0be
>[  169.450707] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 106
>[  169.450749] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  169.450837] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008418f0be nonblocking
>[  169.466700] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008418f0be
>[  169.466740] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000896fa571
>[  169.466797] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000896fa571
>[  169.466832] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008418f0be
>[  169.466863] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000896fa571
>[  169.720250] NOHZ: local_softirq_pending 08

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Attachments on bug 111507: 145214 | 145216 | 145220 | 145234

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