Attachment 145625 Details for Bug 111812 – dmesg, kernel log

dmesg, kernel log

kernel_log (text/plain), 2.28 MB, created by moson on 2019-10-03 12:18:09 UTC

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Creator: moson

Created: 2019-10-03 12:18:09 UTC

Size: 2.28 MB

patch

obsolete

>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000c0d8f78f
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d154f6af state to 00000000c0d8f78f
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d154f6af
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c0d8f78f
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0d8f78f nonblocking
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0d8f78f
>Okt 03 14:05:00 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0d8f78f
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000447a5f09 state to 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000447a5f09
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ff32aebb nonblocking
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ff32aebb
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005d1c8fcc state to 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005d1c8fcc
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000b86bf64e
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b9a1b07b state to 00000000b86bf64e
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b9a1b07b
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:00 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:00 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:00 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000713d8390 state to 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000713d8390
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cc7fee5 state to 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cc7fee5
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002fb0fe0a state to 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000002fb0fe0a
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f387ad67 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e661b2c1 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e661b2c1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000082ae3046 state to 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000082ae3046
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000042b77a2 state to 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000042b77a2
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004782a885 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007e8f7be3 state to 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000007e8f7be3
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004782a885 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004782a885
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000013438a34 state to 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000013438a34
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000057714c58 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000057714c58
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a4c3fa91 state to 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a4c3fa91
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:01 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:01 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:01 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ad00989 state to 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ad00989
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a8ce734 state to 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000a8ce734
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000360d82f3 state to 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000360d82f3
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000af62d355 state to 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000af62d355
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f34ea00d state to 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f34ea00d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f387ad67 state to 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c23e2690 state to 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c23e2690
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e88bbc1b state to 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e88bbc1b
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027a0c8b3 state to 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000027a0c8b3
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004cb08a57 state to 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004cb08a57
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008fcdd450 state to 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008fcdd450
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000371fcb3f state to 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000371fcb3f
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:02 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:02 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:02 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1df648a state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d1df648a
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002417f512 state to 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000002417f512
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002c3dceb6 state to 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000002c3dceb6
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000049821f87 state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000049821f87
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000371fcb3f state to 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000371fcb3f
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005c9a80a3 state to 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d047f9b9 state to 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d047f9b9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000107bad4d state to 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000107bad4d
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d17aaa nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d17aaa
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000061a54d24 state to 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000061a54d24
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006560b1eb state to 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000006560b1eb
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003f44fea3 state to 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003f44fea3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ff32aebb nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ff32aebb
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cbe9e448 state to 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000cbe9e448
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0d8f78f nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0d8f78f
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000349b81e3 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000349b81e3
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b162f8be state to 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b162f8be
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:03 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:03 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:03 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d65c98fc state to 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d65c98fc
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d5629867 state to 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d5629867
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000361f6d06 state to 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000361f6d06
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003e822a60 state to 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003e822a60
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008c60a79f state to 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008c60a79f
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004cb08a57 state to 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004cb08a57
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027a0c8b3 state to 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027a0c8b3
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e88bbc1b state to 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e88bbc1b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002df4753a nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002df4753a
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ddbce77e state to 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ddbce77e
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000af41391b state to 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000af41391b
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000052879686 state to 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000052879686
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000057714c58 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000057714c58
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c847d743 state to 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c847d743
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000226442fd nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000226442fd
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e661b2c1 state to 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e661b2c1
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:04 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:04 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:04 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000349b81e3 state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000349b81e3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000349b81e3 state to 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000349b81e3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ddbce77e state to 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ddbce77e
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005de4c18b state to 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005de4c18b
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fb3854ab state to 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000fb3854ab
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f387ad67 state to 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:05 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:05 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:05 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:06 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:06 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:06 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003e822a60 state to 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003e822a60
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000361f6d06 state to 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000361f6d06
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d5629867 state to 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d5629867
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d65c98fc state to 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d65c98fc
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ee94c43d state to 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ee94c43d
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000222ee09b state to 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000222ee09b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000226442fd nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000226442fd
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000425413dc state to 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000425413dc
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0d8f78f nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0d8f78f
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001f59138a state to 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000001f59138a
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ff32aebb nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008fcdd450 state to 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008fcdd450
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d047f9b9 state to 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d047f9b9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d17aaa nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d17aaa
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d154f6af state to 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d154f6af
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000447a5f09 state to 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000447a5f09
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005d1c8fcc state to 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005d1c8fcc
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b9a1b07b state to 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b9a1b07b
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c5944b08 state to 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c5944b08
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cc7fee5 state to 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cc7fee5
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002fb0fe0a state to 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000002fb0fe0a
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000360d82f3 state to 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000360d82f3
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000af62d355 state to 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000af62d355
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ff32aebb nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ff32aebb
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b1e12c9 state to 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b1e12c9
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:07 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:07 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:07 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c23e2690 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c23e2690
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f387ad67 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f34ea00d state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f34ea00d
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c23e2690 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c23e2690
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b1e12c9 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b1e12c9
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000082ae3046 state to 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000082ae3046
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000598f994d state to 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000598f994d
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b162f8be state to 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b162f8be
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a3e7062 state to 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000a3e7062
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004b5c0797 state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004b5c0797
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000051ecdc7b state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000051ecdc7b
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000026bb0bd1 state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000026bb0bd1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f387ad67 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002df4753a nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002df4753a
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 0000000058d557a1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e88bbc1b state to 0000000058d557a1
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e88bbc1b
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:08 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:08 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:08 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027a0c8b3 state to 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027a0c8b3
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004cb08a57 state to 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004cb08a57
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005c9a80a3 state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000371fcb3f state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000371fcb3f
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000049821f87 state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000049821f87
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002c3dceb6 state to 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000002c3dceb6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002417f512 state to 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000002417f512
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002c3dceb6 state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000002c3dceb6
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000049821f87 state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000049821f87
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000371fcb3f state to 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000371fcb3f
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a3e7062 state to 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000a3e7062
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:09 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:09 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:09 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b162f8be state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b162f8be
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d65c98fc state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d65c98fc
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d5629867 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d5629867
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006560b1eb state to 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006560b1eb
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003f44fea3 state to 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003f44fea3
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0d8f78f nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0d8f78f
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004cb08a57 state to 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004cb08a57
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000361f6d06 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000361f6d06
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008fcdd450 state to 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000008fcdd450
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000598f994d state to 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000598f994d
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003e822a60 state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003e822a60
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005c9a80a3 state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ddbce77e state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ddbce77e
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c6d6c2fd state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c6d6c2fd
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006e46c2f5 state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000006e46c2f5
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fcf39945 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000fcf39945
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000290285e7 state to 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000290285e7
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ad00989 state to 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ad00989
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b4b88ce7 state to 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b4b88ce7
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:10 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:10 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:10 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a8ce734 state to 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000a8ce734
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005a98f0b9 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005a98f0b9
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000236b2e06 state to 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000236b2e06
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fa4cdf0c state to 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000fa4cdf0c
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1df648a state to 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d1df648a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b5907821 state to 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b5907821
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000924946cf nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000349b81e3 state to 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000349b81e3
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000924946cf nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000924946cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002df4753a nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008fcdd450 state to 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008fcdd450
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002df4753a nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002df4753a
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b5907821 state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b5907821
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c4ec4449 state to 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c4ec4449
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cd2eef1b state to 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000cd2eef1b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000b959091 state to 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000b959091
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000222ee09b state to 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000222ee09b
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000226442fd nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000226442fd
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000edac1caf state to 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000edac1caf
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b5907821 state to 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b5907821
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000f382947d
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 00000000f382947d
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:11 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:11 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:11 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007f4a4455 state to 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007f4a4455
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008fcdd450 state to 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008fcdd450
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000924946cf nonblocking
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000924946cf
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000766499c3
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 00000000766499c3
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 00000000766499c3
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000766499c3
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:12 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:12 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000766499c3 nonblocking
>Okt 03 14:05:19 T480s kernel: i915 0000:00:02.0: GPU HANG: ecode 9:0:0x00000000, hang on rcs0
>Okt 03 14:05:19 T480s kernel: [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.
>Okt 03 14:05:19 T480s kernel: [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel
>Okt 03 14:05:19 T480s kernel: [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue.
>Okt 03 14:05:19 T480s kernel: [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it.
>Okt 03 14:05:19 T480s kernel: [drm] GPU crash dump saved to /sys/class/drm/card0/error
>Okt 03 14:05:19 T480s kernel: i915 0000:00:02.0: Resetting rcs0 for hang on rcs0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000f72b0345 state to 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 00000000f72b0345 to [CRTC:48:pipe A]
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   3,   3,   4,   6,   8,   8,  10,   0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16,  16,  16,  16,  16,  18,  18,  22,   0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   17,  17,  17,  17,  17,  19,  19,  23,   0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_commit [drm]] committing 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 0000000082ae3046 state to 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 0000000082ae3046 to [CRTC:48:pipe A]
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   3,   3,   4,   6,   8,   8,  10,   0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16,  16,  16,  16,  16,  18,  18,  22,   0
>Okt 03 14:05:19 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   17,  17,  17,  17,  17,  19,  19,  23,   0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_commit [drm]] committing 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000766499c3
>Okt 03 14:05:19 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000766499c3
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1df648a state to 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d1df648a
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e7cc8e14 nonblocking
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000049821f87
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000049821f87
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000049821f87
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000049821f87
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e7cc8e14
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000371fcb3f state to 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000371fcb3f
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000097f0db97 nonblocking
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000097f0db97
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 000000000e99e0fa
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005de4c18b state to 000000000e99e0fa
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005de4c18b
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:19 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:19 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a8ce734
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a8ce734
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e05a829c
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077176038 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077176038
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005c9a80a3 state to 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b4b88ce7 state to 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b4b88ce7
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004039327e
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b162f8be
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ad00989 state to 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009ad00989
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000081f4bbfb nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081f4bbfb
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000080717fa state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000080717fa
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d047f9b9 state to 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d047f9b9
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000dc638d37 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dc638d37
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e4a458fd state to 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000a43f84e state to 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000349b81e3 state to 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000043082bca state to 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000d9aa2d6 state to 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000290285e7 state to 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e56ca27 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e56ca27
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fdb2fa32 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fdb2fa32
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a5a3926a state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a5a3926a
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000026bb0bd1 state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000026bb0bd1
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000115be5a9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000051ecdc7b state to 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000051ecdc7b
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004b5c0797 state to 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004b5c0797
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000009abdf72 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000009abdf72
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:20 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:20 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:20 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ba5e3c62 state to 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ba5e3c62
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a4c3fa91 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000a4c3fa91
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a0f9ee29 state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a0f9ee29
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008c60a79f state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000008c60a79f
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ee94c43d state to 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ee94c43d
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027a0c8b3 state to 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027a0c8b3
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a3b249d5 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a3b249d5
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d17aaa nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d17aaa
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ee94c43d state to 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ee94c43d
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000222ee09b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b1e12c9 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b1e12c9
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000249bbc52 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000249bbc52
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e661b2c1 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e661b2c1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a182345c state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000a182345c
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f34ea00d state to 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f34ea00d
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000732088e0 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000732088e0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083855e67 state to 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083855e67
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000e680270 state to 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000e680270
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:21 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:21 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000037eb0da5
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000edac1caf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004cb08a57
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007f4a4455
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007e8f7be3 state to 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007e8f7be3
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000013438a34 state to 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000013438a34
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f446a6f3 state to 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f446a6f3
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 00000000cc2b2e88
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:22 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:22 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:22 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 000000006de00349
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:23 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:23 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:23 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:23 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000082ae3046 state to 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000082ae3046
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000cde13a73 state to 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d047f9b9 state to 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d047f9b9
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000425413dc state to 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000425413dc
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001aeba0f2
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000582eab6e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a4c3fa91 state to 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a4c3fa91
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000009abdf72
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000055331ff nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e05a829c
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000055331ff
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003e822a60 state to 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003e822a60
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e56ca27 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c6d6c2fd
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000cd4d19bb state to 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000cd4d19bb
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003e822a60
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c6d6c2fd state to 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c6d6c2fd
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e56ca27 nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e56ca27
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000115be5a9 state to 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000115be5a9
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c6d6c2fd state to 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c6d6c2fd
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000081f4bbfb nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081f4bbfb
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:24 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:24 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:24 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a5a3926a state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a5a3926a
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000080717fa
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000050dd5de1
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000080717fa
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000080717fa
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d154f6af state to 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d154f6af
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005d1c8fcc state to 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e64b8b90
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b482e32
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e64b8b90
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b482e32
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e64b8b90
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b482e32
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000002b6d5f4f
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000080717fa state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000080717fa
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000a5a3926a
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000713fb040 state to 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000061a54d24 state to 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000061a54d24
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b9a1b07b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001aeba0f2 state to 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000001aeba0f2
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b9a1b07b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c5944b08 state to 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c5944b08
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d5629867 state to 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d5629867
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b162f8be state to 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b162f8be
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000081f4bbfb nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000007b07c9bc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081f4bbfb
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000cde13a73 state to 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d047f9b9 state to 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d047f9b9
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cc7fee5 state to 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003cc7fee5
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e64b8b90 state to 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e64b8b90
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000009b482e32
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000019f8f4e7
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000115be5a9 state to 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000115be5a9
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000051ecdc7b state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000051ecdc7b
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1d7ceef state to 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d1d7ceef
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:25 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:25 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000004b5c0797
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 000000005d1c8fcc
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000349b81e3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:122] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 122
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000aac3f1ba state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 00000000aac3f1ba to [NOCRTC]
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb -1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   3,   3,   4,   6,   8,   8,  10,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks   16,  16,  16,  16,  16,  18,  18,  22,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb   17,  17,  17,  17,  17,  19,  19,  23,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_commit [drm]] committing 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 0000000048339448 state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 0000000048339448 to [CRTC:48:pipe A]
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   3,   3,   4,   6,   8,   8,  10,   0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16,  16,  16,  16,  16,  18,  18,  22,   0
>Okt 03 14:05:26 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   17,  17,  17,  17,  17,  19,  19,  23,   0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_commit [drm]] committing 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000012864b66 state to 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a8ce734 state to 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000a8ce734
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e56ca27 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fa4cdf0c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000083a252fb state to 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000049821f87 state to 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000049821f87
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e56ca27 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e56ca27
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1df648a
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a4c3fa91 state to 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000a4c3fa91
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000050dd5de1 state to 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000050dd5de1
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e88bbc1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008fcdd450
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e05a829c state to 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e05a829c
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e88bbc1b state to 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e88bbc1b
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000032eb82ee state to 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002c3dceb6
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002c3dceb6
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002c3dceb6
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002c3dceb6
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f34ea00d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000cde13a73 state to 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ee94c43d state to 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ee94c43d
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000713fb040 state to 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000061a54d24 state to 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000061a54d24
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d17aaa nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d17aaa
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f446a6f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008c60a79f state to 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000008c60a79f
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000013438a34 state to 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000013438a34
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bbf9443 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bbf9443
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d154f6af state to 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d154f6af
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c91063ef nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c91063ef
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:26 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:26 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000082ae3046
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b67fad7c
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d047f9b9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000d2d113b state to 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f34ea00d state to 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f34ea00d
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000002434f488 state to 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000002434f488
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000d2d113b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005a499e5d
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000032eb82ee state to 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000032eb82ee
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fd58c1eb
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d04e55
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b489d422 state to 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b489d422
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000625be63b nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000625be63b
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c5c6ab20 state to 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c5c6ab20
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002c3dceb6
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:27 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:27 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007d724781 state to 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005de4c18b state to 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005de4c18b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000007bd8d3d state to 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000eca3e6fa state to 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000061a54d24 state to 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000061a54d24
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000447a5f09 state to 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000447a5f09
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c847d743 state to 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c847d743
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003f44fea3 state to 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003f44fea3
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000222ee09b state to 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000222ee09b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003f44fea3 state to 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003f44fea3
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f5a4cd0c nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c847d743 state to 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c847d743
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000318ed5e2 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000447a5f09 state to 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000447a5f09
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000318ed5e2 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000318ed5e2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d154f6af state to 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d154f6af
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f5a4cd0c nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f5a4cd0c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000af62d355 state to 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000af62d355
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005d1c8fcc state to 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005d1c8fcc
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b9a1b07b state to 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b9a1b07b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000713d8390
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000007e8f7be3
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003038e7c7 state to 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003038e7c7
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000048339448
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000037eb0da5
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000e680270 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000e680270
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000007e8f7be3
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000007e8f7be3
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000013438a34 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000013438a34
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000008c60a79f state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000008c60a79f
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f446a6f3 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f446a6f3
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000042b77a2 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000042b77a2
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004b5c0797 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004b5c0797
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1d7ceef state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000d1d7ceef
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000371fcb3f
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000051ecdc7b state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000051ecdc7b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000026bb0bd1
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000115be5a9 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000115be5a9
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000044956180
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cd2eef1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000033495208
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007b07c9bc state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000007b07c9bc
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b959091
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001f57ea4c state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000080717fa state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000080717fa
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a5a3926a state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a5a3926a
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007b07c9bc state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007b07c9bc
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000ef60a981 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000ef60a981
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000115be5a9 state to 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000115be5a9
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003038e7c7 state to 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003038e7c7
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000bbf1293b state to 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000bbf1293b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000b1f1885 state to 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b489d422 state to 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b489d422
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f72b0345 state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f72b0345
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ab5ac403 state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b482e32 state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000009b482e32
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000008687b26e state to 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083b9b408 state to 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000083b9b408
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000598f994d state to 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000598f994d
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cc2b2e88 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000f72b0345
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cc2b2e88
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ae6103e3 state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000582eab6e state to 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000582eab6e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006de00349 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006de00349
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000089a4e45b state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b67fad7c state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b67fad7c
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000598f994d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000001a5163c0 state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000019f8f4e7 state to 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000019f8f4e7
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000db261ca6 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000db261ca6
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000003e029483 state to 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d1df648a state to 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d1df648a
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000081f4bbfb nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000a54fdccc state to 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000a8ce734 state to 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000a8ce734
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000a3e7062
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007381f951 state to 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004039327e state to 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000004039327e
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ad00989
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f669232d state to 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b162f8be state to 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b162f8be
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000081f4bbfb nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fcf39945
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081f4bbfb
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000953f4a1b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000aac3f1ba state to 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000aac3f1ba
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003d043726 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003d043726
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000048339448 state to 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000048339448
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007388d915 nonblocking
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007388d915
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d65c98fc
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cd4d19bb
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:28 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:28 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c847d743
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083b9b408
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000425413dc
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000051ecdc7b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000eca3e6fa state to 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000bbf1293b state to 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c601f537
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af41391b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e4a458fd state to 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000363e23c2 state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 00000000363e23c2 to [NOCRTC]
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb -1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   3,   3,   4,   6,   8,   8,  10,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks   16,  16,  16,  16,  16,  18,  18,  22,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb   17,  17,  17,  17,  17,  19,  19,  23,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_commit [drm]] committing 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000bbf1293b state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 00000000bbf1293b to [CRTC:48:pipe A]
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   3,   3,   4,   6,   8,   8,  10,   0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16,  16,  16,  16,  16,  18,  18,  22,   0
>Okt 03 14:05:29 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   17,  17,  17,  17,  17,  19,  19,  23,   0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_commit [drm]] committing 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5c6ab20
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000001f59138a
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000222ee09b state to 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000222ee09b
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000cbe9e448
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d1d7ceef
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c847d743 state to 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c847d743
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005bacf510 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c5944b08
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003f44fea3
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005bacf510
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000628510c9 state to 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000628510c9
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000055331ff nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c601f537
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c601f537
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c601f537
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000c601f537
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000363e23c2
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000055331ff
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000236b2e06
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000052879686
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000a43f84e state to 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005de4c18b state to 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005de4c18b
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e661b2c1
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f34ea00d state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f34ea00d
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006a612426
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000249bbc52 state to 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009daf5044
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:29 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006560b1eb
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:29 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009b1e12c9 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009b1e12c9
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000249bbc52 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a182345c state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003cd1810b state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003cd1810b
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bf0ce4e3
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d171f717
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:30 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:30 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d5629867
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000042b77a2
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000447a5f09
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000360d82f3 state to 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000360d82f3
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b9a1b07b state to 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b9a1b07b
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005d1c8fcc state to 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005d1c8fcc
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000002fb0fe0a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ac81e3cb state to 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000713d8390 state to 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000713d8390
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f5a4cd0c nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cc7fee5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f5a4cd0c
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e86b16de state to 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b9a1b07b state to 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b9a1b07b
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000318ed5e2 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000af62d355
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000318ed5e2
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000249bbc52 state to 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000249bbc52
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009b1e12c9
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003cd1810b
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b489d422 state to 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b489d422
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000055331ff nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000055331ff
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000862a6ed6 state to 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c601f537 state to 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c601f537
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b8d8d539 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b8d8d539
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000bbf1293b
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c5c6ab20 state to 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c5c6ab20
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002df4753a nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002df4753a
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b489d422 state to 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000b489d422
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090343c28 nonblocking
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090343c28
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000dac0fdd5
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b4b88ce7
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:31 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:31 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000086af1945 state to 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000043162fc8 state to 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000043162fc8
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:32 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a0f9ee29 state to 0000000094baf6cf
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a0f9ee29
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:32 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:32 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:32 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:32 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007ac95957 state to 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000083855e67 state to 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000083855e67
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000061a54d24
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 00000000fb3854ab state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000a43f84e state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 00000000fb3854ab to [NOCRTC]
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb -1
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   3,   3,   4,   6,   8,   8,  10,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks   16,  16,  16,  16,  16,  18,  18,  22,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb   17,  17,  17,  17,  17,  19,  19,  23,   0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_commit [drm]] committing 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:45:cursor A] 000000000f6f9853 state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000d9aa2d6 state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:45:cursor A] state 000000000f6f9853 to [CRTC:48:pipe A]
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7, twm
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0 ->    0,   3,   3,   4,   6,   8,   8,  10,   0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   16,  16,  16,  16,  16,  18,  18,  22,   0
>Okt 03 14:05:33 T480s kernel: [drm:skl_compute_wm [i915]] [PLANE:45:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0 ->   17,  17,  17,  17,  17,  19,  19,  23,   0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_commit [drm]] committing 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fb3854ab state to 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000fb3854ab
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:33 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:33 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000f6f9853
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000360d82f3
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000d154f6af
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a182345c
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000732088e0
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e67f6379 state to 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007e8f7be3 state to 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007e8f7be3
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000e680270
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000e680270
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000e680270
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000fb3854ab
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000005de4c18b
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:34 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:34 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000000b1f1885
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000035351693
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ef8e34d8
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000035351693
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000747098fe state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000747098fe
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000037eb0da5
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000037eb0da5
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000013438a34
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000006e46c2f5
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000290285e7
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000d171f717 state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000d171f717
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000df992d68 state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000009ce363da state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000009ce363da
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005eb0f68e state to 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000132832c nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000aac3f1ba
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a64d44db state to 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a64d44db
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000132832c nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000132832c
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000865e6a9e state to 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000865e6a9e
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002a6a9b69 state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000357ca3f9 state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000357ca3f9
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bf6782d5 state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066d67226 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066d67226
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000b67a79f1
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000107bad4d state to 00000000b67a79f1
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000107bad4d
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:35 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:35 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:35 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b0ae4ff state to 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000447a5f09 state to 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000447a5f09
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000318ed5e2 nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000318ed5e2
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000034dcc059 state to 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c847d743 state to 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c847d743
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f5a4cd0c nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f5a4cd0c
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b41a8a04 state to 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000425413dc state to 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000425413dc
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001eb2106e nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001eb2106e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000d5e5f756 state to 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003f44fea3 state to 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000003f44fea3
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000537b555 nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000537b555
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000466d3890 state to 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001f59138a state to 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000001f59138a
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bf64e nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bf64e
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b489d422 state to 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000b489d422
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f382947d nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f382947d
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d7ac078
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000791d1efb state to 000000007d7ac078
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000bbf1293b state to 000000007d7ac078
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000bbf1293b
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000007d7ac078
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:36 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007d7ac078 nonblocking
>Okt 03 14:05:36 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d7ac078
>Okt 03 14:05:36 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d7ac078
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000093703d87 state to 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c5c6ab20 state to 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000c5c6ab20
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000992b9359 nonblocking
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000992b9359
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000de89388b state to 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000c601f537 state to 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000c601f537
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000058d557a1 nonblocking
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000058d557a1
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002d8c315f state to 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000027da9bdf state to 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000027da9bdf
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000001648c80 nonblocking
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000001648c80
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000473d4c82
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005c9a80a3 state to 00000000473d4c82
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000003e822a60 state to 00000000473d4c82
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000003e822a60
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000473d4c82
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:37 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000473d4c82 nonblocking
>Okt 03 14:05:37 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000473d4c82
>Okt 03 14:05:37 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000473d4c82
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000038497bac state to 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000007e8f7be3 state to 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000007e8f7be3
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005a8acae7 state to 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000732088e0 state to 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000732088e0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fb3854ab state to 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000fb3854ab
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000107bad4d state to 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000107bad4d
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e99e0fa nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e99e0fa
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000006e2b3f4a state to 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000fb3854ab state to 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000fb3854ab
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b67a79f1 nonblocking
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b67a79f1
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 0000000018344f65 state to 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000000f6f9853 state to 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000000f6f9853
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000008379aa0
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:38 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:38 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000008379aa0 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000008379aa0
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000008379aa0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000765944e3 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000723120f1 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000723120f1
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000f9d34d72 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000e3e73b92 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000e3e73b92
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000e3635bd3 state to 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a182345c state to 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a182345c
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009e920106 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009e920106
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000006ab4fb5f state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 000000006ab4fb5f
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000c57b2f43 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000005e79c556 state to 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 000000005e79c556
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:39 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:39 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:39 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000007b1ebe06 state to 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000a182345c state to 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000a182345c
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000249bbc52
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000bd86f3b2 state to 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 0000000090611404 state to 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 0000000090611404
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f3516f93 nonblocking
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3516f93
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000723120f1
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000e3e73b92
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:40 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:40 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000003038e7c7
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000b489d422
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000005eb0f68e state to 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000953f4a1b state to 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000953f4a1b
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000132832c nonblocking
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000132832c
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000865e6a9e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ddbce77e
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:41 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:41 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000747098fe
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000008c60a79f
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000000270a93a state to 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000f446a6f3 state to 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:31:plane 1A] state 00000000f446a6f3
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 119
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000083855e67
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a0f9ee29
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 000000002ab64471 state to 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000042b77a2 state to 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:31:plane 1A] state 00000000042b77a2
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_check_only [drm]] checking 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 118
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000094baf6cf nonblocking
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a4c3fa91
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000094baf6cf
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000107bad4d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000ee94c43d
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000a64d44db
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 000000009ce363da
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 00000000361f6d06
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>Okt 03 14:05:42 T480s kernel: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:121] for [PLANE:45:cursor A] state 0000000043162fc8
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:45:cursor A] with fb 121
>Okt 03 14:05:42 T480s kernel: [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:45:cursor A] visible 1 -> 1, off 0, on 0, ms 0

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Attachments on bug 111812: 145526 | 145624 | 145625 | 145630 | 145634 | 145635 | 145636 | 145637 | 145638 | 145731 | 145732 | 145877 | 145996

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