Attachment 14995 Details for Bug 14787 – Xorg.0.log file

Xorg.0.log file

Xorg.0.log.mar9.2.log (text/x-log), 82.40 KB, created by Bill D on 2008-03-09 21:11:23 UTC

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Creator: Bill D

Created: 2008-03-09 21:11:23 UTC

Size: 82.40 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.4.0.90
>Release Date: 5 September 2007
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.25-rc3-git1 i686 
>Current Operating System: Linux P5E 2.6.25-rc4-git3 #1 SMP PREEMPT Sun Mar 9 12:01:12 CDT 2008 i686
>Build Date: 29 February 2008  08:55:31AM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Sun Mar  9 22:39:11 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "tmds"
>(**) |   |-->Device "Card0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) The directory "/usr/share/fonts/TTF/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/OTF" does not exist.
>	Entry deleted from font path.
>(==) Including the default font path /usr/share/fonts/misc/,/usr/share/fonts/TTF/,/usr/share/fonts/OTF,/usr/share/fonts/Type1/,/usr/share/fonts/100dpi/,/usr/share/fonts/75dpi/.
>(**) FontPath set to:
>	/usr/share/fonts/misc/,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi/,
>	/usr/share/fonts/75dpi/,
>	/usr/share/fonts/misc/,
>	/usr/share/fonts/TTF/,
>	/usr/share/fonts/OTF,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi/,
>	/usr/share/fonts/75dpi/
>(**) RgbPath set to "/usr/share/X11/rgb"
>(**) ModulePath set to "/usr/local/lib/xorg/modules,/usr/lib/xorg/modules"
>(WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>(II) No APM support in BIOS or kernel
>(II) Loader magic: 0x81d6500
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,2980 card 1043,8295 rev 03 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,2982 card 1043,8276 rev 03 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,2983 card 1043,8276 rev 03 class 03,80,00 hdr 80
>(II) PCI: 00:1a:0: chip 8086,2937 card 1043,8277 rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1a:1: chip 8086,2938 card 1043,8277 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:2: chip 8086,2939 card 1043,8277 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:7: chip 8086,293c card 1043,8277 rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1b:0: chip 8086,293e card 1043,829f rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,2940 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:4: chip 8086,2948 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:5: chip 8086,294a card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2934 card 1043,8277 rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2935 card 1043,8277 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,2936 card 1043,8277 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,293a card 1043,8277 rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev 92 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,2916 card 1043,8277 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:2: chip 8086,2922 card 1043,8277 rev 02 class 01,06,01 hdr 00
>(II) PCI: 00:1f:3: chip 8086,2930 card 1043,8277 rev 02 class 0c,05,00 hdr 00
>(II) PCI: 01:00:0: chip 1969,1048 card 1043,8226 rev b0 class 02,00,00 hdr 00
>(II) PCI: 02:00:0: chip 197b,2368 card 1043,827e rev 00 class 01,01,85 hdr 00
>(II) PCI: 04:00:0: chip 14f1,8800 card 7063,5500 rev 05 class 04,00,00 hdr 80
>(II) PCI: 04:00:1: chip 14f1,8801 card 7063,5500 rev 05 class 04,80,00 hdr 80
>(II) PCI: 04:00:2: chip 14f1,8802 card 7063,5500 rev 05 class 04,80,00 hdr 80
>(II) PCI: 04:00:4: chip 14f1,8804 card 7063,5500 rev 05 class 04,80,00 hdr 80
>(II) PCI: 04:03:0: chip 1106,3044 card 1043,81fe rev c0 class 0c,00,10 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,4), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:0), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 3 prefetchable memory range:
>	[0] -1	0	0xf8f00000 - 0xf8ffffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:4), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x0000d000 - 0x0000dfff (0x1000) IX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:28:5), (0,1,1), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xf9f00000 - 0xf9ffffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:30:0), (0,4,4), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 4 I/O range:
>	[0] -1	0	0x0000e000 - 0x0000efff (0x1000) IX[B]
>(II) Bus 4 non-prefetchable memory range:
>	[0] -1	0	0xfa000000 - 0xfebfffff (0x4c00000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 965 G1 Integrated Graphics Controller rev 3, Mem @ 0xf9d00000/20, 0xd0000000/28, I/O @ 0xcc00/3
>(--) PCI: (0:2:1) Intel Corporation unknown chipset (0x2983) rev 3, Mem @ 0xf9e00000/20
>(--) PCI: (4:0:0) unknown vendor (0x14f1) unknown chipset (0x8800) rev 5, Mem @ 0xfa000000/24
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[1] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[2] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[3] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[4] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[5] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[6] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[7] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[8] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[9] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[10] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[11] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[12] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[14] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[15] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[16] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[17] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[18] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[19] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[20] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[21] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[22] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[23] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[24] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[25] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[26] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[27] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[28] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[29] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[31] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[32] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[1] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[2] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[3] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[4] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[5] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[6] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[7] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[8] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[9] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[10] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[11] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[12] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[14] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[15] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[16] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[17] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[18] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[19] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[20] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[21] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[22] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[23] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[24] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[25] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[26] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[27] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[28] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[29] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[31] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[32] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[5] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[6] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[7] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[8] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[9] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[10] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[11] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[12] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[13] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[14] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[15] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[16] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[17] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[20] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[21] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[22] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[23] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[24] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[25] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[26] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[27] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[28] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[29] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[30] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[31] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[32] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[33] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[34] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[35] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[36] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[37] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[38] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "type1" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "xtrap"
>(II) Loading /usr/lib/xorg/modules/extensions//libxtrap.so
>(II) Module xtrap: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DEC-XTRAP
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.0.90, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules/fonts//libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "intel"
>(II) Loading /usr/local/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 2.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device
>(II) Primary Device is: PCI 00:02:0
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset G35 found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[5] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[6] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[7] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[8] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[9] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[10] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[11] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[12] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[13] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[14] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[15] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[16] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[17] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[20] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[21] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[22] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[23] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[24] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[25] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[26] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[27] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[28] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[29] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[30] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[31] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[32] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[33] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[34] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[35] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[36] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[37] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[38] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[5] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[6] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[7] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[8] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[9] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[10] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[11] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[12] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[13] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[14] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[15] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[16] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[17] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[18] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[19] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[20] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[21] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[22] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[23] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[24] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[25] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[26] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[27] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[28] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[29] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[30] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[31] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[32] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[33] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[34] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[35] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[36] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[37] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[38] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[39] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[40] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[41] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>	[42] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[43] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "yes"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) G35
>(--) intel(0): Chipset: "G35"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xF9D00000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x70000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x8000009c (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x8000009c (enabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0d551000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEASTAT: 0x80020207 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4040c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020206 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x00
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section vga
>(**) intel(0): Option "Ignore" "true"
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 04 AE 00 02 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-1 using monitor section tmds
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 74 40             (Success)
>(II) intel(0): SDVO device VID/DID: 04:AE.00, clock range 25.0MHz - 165.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 18 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 18 00 00 00 (Success)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Manufacturer: GWY  Model: 9b6  Serial#: 0
>(II) intel(0): Year: 2007  Week: 33
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 52  vert.: 33
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.645 redY: 0.348   greenX: 0.288 greenY: 0.603
>(II) intel(0): blueX: 0.142 blueY: 0.076   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@72Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@56Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@72Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@70Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) intel(0): #1: hsize: 1600  vsize 1200  refresh: 60  vid: 16553
>(II) intel(0): #2: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) intel(0): #3: hsize: 1400  vsize 1050  refresh: 60  vid: 16528
>(II) intel(0): #4: hsize: 1440  vsize 900  refresh: 60  vid: 149
>(II) intel(0): #5: hsize: 1680  vsize 1050  refresh: 60  vid: 179
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 154.0 MHz   Image Size:  519 x 324 mm
>(II) intel(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>(II) intel(0): v_active: 1200  v_sync: 1203  v_sync_end 1209 v_blanking: 1235 v_border: 0
>(II) intel(0): Monitor name: FPD2485W
>(II) intel(0): Ranges: V min: 56  V max: 76 Hz, H min: 30  H max: 83 kHz, PixClock max 160 MHz
>(II) intel(0): Serial No: MXH78D0C01351
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff001ef9b60900000000
>(II) intel(0): 	21110103803421782a0d65a559499a24
>(II) intel(0): 	135054afcf008180a940714f90409500
>(II) intel(0): 	b30001010101283c80a070b023403020
>(II) intel(0): 	360007442100001a000000fc00465044
>(II) intel(0): 	32343835570a20202020000000fd0038
>(II) intel(0): 	4c1e5310000a202020202020000000ff
>(II) intel(0): 	004d584837384430433031333531009c
>(II) intel(0): EDID vendor "GWY", prod id 2486
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1200"x0.0  154.00  1920 1968 2000 2080  1200 1203 1209 1235 +hsync -vsync (74.0 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>(II) intel(0): Modeline "1600x1200"x59.9  161.00  1600 1712 1880 2160  1200 1203 1207 1245 -hsync +vsync (74.5 kHz)
>(II) intel(0): Modeline "1152x864"x74.8  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync (67.7 kHz)
>(II) intel(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>(II) intel(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>(II) intel(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>(II) intel(0): EDID vendor "GWY", prod id 2486
>(II) intel(0): Not using default mode "640x350" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "720x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x864" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "832x624" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Printing probed modes for output TMDS-1
>(II) intel(0): Modeline "1920x1200"x60.0  154.00  1920 1968 2000 2080  1200 1203 1209 1235 +hsync -vsync (74.0 kHz)
>(II) intel(0): Modeline "1600x1200"x59.9  161.00  1600 1712 1880 2160  1200 1203 1207 1245 -hsync +vsync (74.5 kHz)
>(II) intel(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>(II) intel(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>(II) intel(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>(II) intel(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>(II) intel(0): Modeline "1152x864"x74.8  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync (67.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output TMDS-1 using initial mode 1920x1200
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 10 60 A2 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(**) intel(0): Display dimensions: (520, 330) mm
>(**) intel(0): DPI set to (93, 147)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MS[B]
>	[1] 0	0	0xf9d00000 - 0xf9dfffff (0x100000) MS[B]
>	[2] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0xfebff800 - 0xfebfffff (0x800) MX[B]
>	[7] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[8] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[9] -1	0	0xfb000000 - 0xfbffffff (0x1000000) MX[B]
>	[10] -1	0	0xf9fc0000 - 0xf9ffffff (0x40000) MX[B]
>	[11] -1	0	0xf9cfb400 - 0xf9cfb4ff (0x100) MX[B]
>	[12] -1	0	0xf9cfa800 - 0xf9cfafff (0x800) MX[B]
>	[13] -1	0	0xf9cfb800 - 0xf9cfbbff (0x400) MX[B]
>	[14] -1	0	0xf9cf4000 - 0xf9cf7fff (0x4000) MX[B]
>	[15] -1	0	0xf9cfbc00 - 0xf9cfbfff (0x400) MX[B]
>	[16] -1	0	0xfa000000 - 0xfaffffff (0x1000000) MX[B](B)
>	[17] -1	0	0xf9e00000 - 0xf9efffff (0x100000) MX[B](B)
>	[18] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[19] -1	0	0xf9d00000 - 0xf9dfffff (0x100000) MX[B](B)
>	[20] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[21] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[22] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[23] 0	0	0x0000cc00 - 0x0000cc07 (0x8) IS[B]
>	[24] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[25] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[26] -1	0	0x0000ec00 - 0x0000ec7f (0x80) IX[B]
>	[27] -1	0	0x0000d400 - 0x0000d40f (0x10) IX[B]
>	[28] -1	0	0x0000d480 - 0x0000d483 (0x4) IX[B]
>	[29] -1	0	0x0000d800 - 0x0000d807 (0x8) IX[B]
>	[30] -1	0	0x0000d880 - 0x0000d883 (0x4) IX[B]
>	[31] -1	0	0x0000dc00 - 0x0000dc07 (0x8) IX[B]
>	[32] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[33] -1	0	0x0000b080 - 0x0000b09f (0x20) IX[B]
>	[34] -1	0	0x0000b400 - 0x0000b403 (0x4) IX[B]
>	[35] -1	0	0x0000b480 - 0x0000b487 (0x8) IX[B]
>	[36] -1	0	0x0000b800 - 0x0000b803 (0x4) IX[B]
>	[37] -1	0	0x0000b880 - 0x0000b887 (0x8) IX[B]
>	[38] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[39] -1	0	0x0000c080 - 0x0000c09f (0x20) IX[B]
>	[40] -1	0	0x0000c000 - 0x0000c01f (0x20) IX[B]
>	[41] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[42] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[43] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[44] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>	[45] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[46] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 489216 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1956860 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: drmOpenMinor returns 8
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xf9d00000
>(II) intel(0): [drm] ring buffer = 0xd0000000
>(II) intel(0): [drm] mapped front buffer at 0xd0100000, handle = 0xd0100000
>(II) intel(0): [drm] mapped back buffer at 0xd3940000, handle = 0xd3940000
>(II) intel(0): [drm] mapped depth buffer at 0xd4750000, handle = 0xd4750000
>(II) intel(0): [drm] mapped classic textures at 0xd5560000, handle = 0xd5560000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0xd0000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 44236800 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 18 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 18 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x00f10000 (pgoffset 3856)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x03940000 (pgoffset 14656)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x04750000 (pgoffset 18256)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x05560000 (pgoffset 21856)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00042000-0x00042fff: overlay registers (4 kB)
>(II) intel(0): 0x00100000-0x00f0ffff: front buffer (14400 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x00f10000-0x0393ffff: exa offscreen (43200 kB)
>(II) intel(0): 0x03940000-0x0474ffff: back buffer (14400 kB) X tiled
>(II) intel(0): 0x04750000-0x0555ffff: depth buffer (14400 kB) Y tiled
>(II) intel(0): 0x05560000-0x0755ffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1920x1200"x60.0  154.00  1920 1968 2000 2080  1200 1203 1209 1235 +hsync -vsync (74.0 kHz)
>chosen: dotclock 153600 vco 1536000 ((m 80, m1 12, m2 8), n 3, (p 10, p1 1, p2 10))
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 28 3C 80 A0 70 B0 23 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 28 3C 80 A0 70 B0 23 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 30 20 36 00 1A 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x20800000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x80000084 (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x80000084 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0d551000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd8000400 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001e00 (7680 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x077f04af (1920, 1200)
>(II) intel(0):            PIPEASTAT: 0x80020207 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00030c08 (n = 3, m1 = 12, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x081f077f (1920 active, 2080 total)
>(II) intel(0):             HBLANK_A: 0x081f077f (1920 start, 2080 end)
>(II) intel(0):              HSYNC_A: 0x07cf07af (1968 start, 2000 end)
>(II) intel(0):             VTOTAL_A: 0x04d204af (1200 active, 1235 total)
>(II) intel(0):             VBLANK_A: 0x04d204af (1200 start, 1235 end)
>(II) intel(0):              VSYNC_A: 0x04b804b2 (1203 start, 1209 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020206 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x00
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 153600 n 3 m1 12 m2 8 p1 1 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms" "true"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: drmOpenMinor returns 9
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(EE) AIGLX error: dlopen of /usr/lib/dri/i965_dri.so failed (/usr/lib/dri/i965_dri.so: cannot open shared object file: No such file or directory)
>(EE) AIGLX: reverting to software rendering
>(II) Loading sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /usr/lib/xorg/modules/extensions//libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) intel(0): Setting screen physical size to 519 x 324
>(**) Option "Protocol" "auto"
>(**) Mouse0: Device: "/dev/input/mice"
>(**) Mouse0: Protocol: "auto"
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5 6 7"
>(**) Mouse0: ZAxisMapping: buttons 4, 5, 6 and 7
>(**) Mouse0: Buttons: 11
>(**) Mouse0: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) Keyboard0: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) evaluating device (Mouse0)
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(--) Mouse0: PnP-detected protocol: "ExplorerPS/2"
>(II) Mouse0: ps2EnableDataReporting: succeeded
>Could not init font path element /usr/share/fonts/TTF/, removing from list!
>Could not init font path element /usr/share/fonts/OTF, removing from list!
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 10 60 A2 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x70000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x8000009c (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x8000009c (enabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0d551000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEASTAT: 0x80020207 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4040c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020206 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x00
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xf9b40000 at 0xb7b06000
>(II) intel(0): [drm] Closed DRM master.
>FreeFontPath: FPE "/usr/share/fonts/misc/" refcount is 2, should be 1; fixing.

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Attachments on bug 14787: 14776 | 14777 | 14778 | 14995

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