Attachment 1592 Details for Bug 2144 – FIx MCLK / SCLK calculation

[patch] FIx MCLK / SCLK calculation

mspll_probe.diff (text/plain), 1.76 KB, created by Benjamin Herrenschmidt on 2004-12-24 01:10:14 UTC

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Creator: Benjamin Herrenschmidt

Created: 2004-12-24 01:10:14 UTC

Size: 1.76 KB

patch

obsolete

>Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
>===================================================================
>--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c	2004-12-20 16:48:30.000000000 +0100
>+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c	2004-12-24 10:00:56.333159784 +0100
>@@ -1357,23 +1357,19 @@
>     }
> 
>     /* Calculate "base" xclk straight from MPLL, though that isn't
>-     * really useful (hopefully)
>+     * really useful (hopefully). This isn't called XCLK anymore on
>+     * radeon's...
>      */
>     mpll_fb_div = (tmp & 0xff00) >> 8;
>     spll_fb_div = (tmp & 0xff0000) >> 16;
>     M = (tmp & 0xff);
>-    xclk = RADEONDiv((2 * mpll_fb_div * xtal), (2 * M));
>+    xclk = RADEONDiv((2 * mpll_fb_div * xtal), (M));
> 
>     /*
>-     * Calculate MCLK based on MCLK-A and SCLK
>-     *
>-     * NOTE: It is not clear at this point wether we should put in sclk and
>-     * mclk the raw SPLL and MPLL output values, or the divided values according
>-     * to the source selection iN MCLK_CNTL and SCLK_CNTL. I'm putting the divided
>-     * values for now, waiting for a definitive answer from ATI
>+     * Calculate MCLK based on MCLK-A
>      */
>-    mpll = ((float)mpll_fb_div * (float)(xtal / 100.0)) / (float)M;
>-    spll = ((float)spll_fb_div * (float)(xtal / 100.0)) / (float)M;
>+    mpll = (2.0 * (float)mpll_fb_div * (xtal / 100.0)) / (float)M;
>+    spll = (2.0 * (float)spll_fb_div * (xtal / 100.0)) / (float)M;
> 
>     tmp = INPLL(pScrn, RADEON_MCLK_CNTL) & 0x7;
>     switch(tmp) {
>@@ -1388,6 +1384,9 @@
>                       " setting %d, can't probe MCLK value !\n", tmp);
>     }
> 
>+    /*
>+     * Calculate SCLK
>+     */
>     tmp = INPLL(pScrn, RADEON_SCLK_CNTL) & 0x7;
>     switch(tmp) {
>     case 1: info->sclk = spll; break;

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