Attachment 1748 Details for Bug 2373 – the actual patch for the changes that were needed.

[patch] the actual patch for the changes that were needed.

xorg-legacyIO-altix-5.patch (text/plain), 36.89 KB, created by shrijeet on 2005-01-25 13:50:46 UTC

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Creator: shrijeet

Created: 2005-01-25 13:50:46 UTC

Size: 36.89 KB

patch

obsolete

>Index: GL/dri/dri.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/GL/dri/dri.c,v
>retrieving revision 1.7
>diff -u -r1.7 dri.c
>--- GL/dri/dri.c	8 Dec 2004 05:52:20 -0000	1.7
>+++ GL/dri/dri.c	25 Jan 2005 21:48:11 -0000
>@@ -284,7 +284,7 @@
> 	return FALSE;
>     }
>     DRIDrvMsg(pScreen->myNum, X_INFO,
>-	      "[drm] added %d byte SAREA at 0x%08lx\n",
>+	      "[drm] added %d byte SAREA at %p\n",
> 	      pDRIPriv->pDriverInfo->SAREASize, pDRIPriv->hSAREA);
> 
>     if (drmMap( pDRIPriv->drmFD,
>@@ -300,7 +300,7 @@
> 	return FALSE;
>     }
>     memset(pDRIPriv->pSAREA, 0, pDRIPriv->pDriverInfo->SAREASize);
>-    DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] mapped SAREA 0x%08lx to %p\n",
>+    DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] mapped SAREA %p to %p\n",
> 	      pDRIPriv->hSAREA, pDRIPriv->pSAREA);
> 
>     if (drmAddMap( pDRIPriv->drmFD,
>@@ -318,7 +318,7 @@
>                   "[drm] drmAddMap failed\n");
> 	return FALSE;
>     }
>-    DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] framebuffer handle = 0x%08lx\n",
>+    DRIDrvMsg(pScreen->myNum, X_INFO, "[drm] framebuffer handle = %p\n",
> 	      pDRIPriv->hFrameBuffer);
> 
> 				/* Add tags for reserved contexts */
>@@ -381,7 +381,7 @@
>     pDRIPriv->myContextPriv = pDRIContextPriv;
> 
>     DRIDrvMsg(pScreen->myNum, X_INFO,
>-	      "X context handle = 0x%08lx\n", pDRIPriv->myContext);
>+	      "X context handle = %p\n", pDRIPriv->myContext);
> 
>     /* Now that we have created the X server's context, we can grab the
>      * hardware lock for the X server.
>@@ -565,14 +565,14 @@
> 	drmUnlock(pDRIPriv->drmFD, pDRIPriv->myContext);
> 	lockRefCount=0;
> 	DRIDrvMsg(pScreen->myNum, X_INFO,
>-		  "[drm] unmapping %d bytes of SAREA 0x%08lx at %p\n",
>+		  "[drm] unmapping %d bytes of SAREA %p at %p\n",
> 		  pDRIInfo->SAREASize,
> 		  pDRIPriv->hSAREA,
> 		  pDRIPriv->pSAREA);
> 	if (drmUnmap(pDRIPriv->pSAREA, pDRIInfo->SAREASize)) {
> 	    DRIDrvMsg(pScreen->myNum, X_ERROR,
> 		      "[drm] unable to unmap %d bytes"
>-		      " of SAREA 0x%08lx at %p\n",
>+		      " of SAREA %p at %p\n",
> 		      pDRIInfo->SAREASize,
> 		      pDRIPriv->hSAREA,
> 		      pDRIPriv->pSAREA);
>Index: GL/dri/dri.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/GL/dri/dri.h,v
>retrieving revision 1.3
>diff -u -r1.3 dri.h
>--- GL/dri/dri.h	16 Jun 2004 09:37:58 -0000	1.3
>+++ GL/dri/dri.h	25 Jan 2005 21:48:12 -0000
>@@ -141,7 +141,7 @@
>     int			ddxDriverMajorVersion;
>     int			ddxDriverMinorVersion;
>     int			ddxDriverPatchVersion;
>-    CARD32		frameBufferPhysicalAddress;
>+    pointer		frameBufferPhysicalAddress;
>     long		frameBufferSize;
>     long		frameBufferStride;
>     long		SAREASize;
>Index: hw/xfree86/common/compiler.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/compiler.h,v
>retrieving revision 1.4
>diff -u -r1.4 compiler.h
>--- hw/xfree86/common/compiler.h	13 Jan 2005 01:22:53 -0000	1.4
>+++ hw/xfree86/common/compiler.h	25 Jan 2005 21:48:12 -0000
>@@ -124,7 +124,8 @@
> 
> #  if !defined(__arm__)
> #   if !defined(__sparc__) && !defined(__arm32__) \
>-      && !(defined(__alpha__) && defined(linux))
>+      && !(defined(__alpha__) && defined(linux)) \
>+      && !(defined(__ia64__) && defined(linux)) \
> 
> extern void outb(unsigned short, unsigned char);
> extern void outw(unsigned short, unsigned short);
>@@ -464,10 +465,12 @@
> #    ifndef __INTEL_COMPILER  
> #      define mem_barrier()        __asm__ __volatile__ ("mf" ::: "memory")
> #      define write_mem_barrier()  __asm__ __volatile__ ("mf" ::: "memory")
>+#      define io_mem_barrier()     __asm__ __volatile__ ("mf.a" ::: "memory")
> #    else
> #      include "ia64intrin.h"
> #      define mem_barrier() __mf()
> #      define write_mem_barrier() __mf()
>+#      define io_mem_barrier() __mfa
> #    endif
> 
> /*
>@@ -494,11 +497,16 @@
> #    undef outb
> #    undef outw
> #    undef outl
>+#    undef inb
>+#    undef inw
>+#    undef inl
>+extern void outb(unsigned long port, unsigned char val);
>+extern void outw(unsigned long port, unsigned short val);
>+extern void outl(unsigned long port, unsigned int val);
>+extern unsigned int inb(unsigned long port);
>+extern unsigned int inw(unsigned long port);
>+extern unsigned int inl(unsigned long port);
>  
>-#    define outb(a,b)	_outb(b,a)
>-#    define outw(a,b)	_outw(b,a)
>-#    define outl(a,b)	_outl(b,a) 
>-
> #   elif defined(linux) && defined(__amd64__) 
>  
> #    include <inttypes.h>
>Index: hw/xfree86/common/xf86Bus.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c,v
>retrieving revision 1.3
>diff -u -r1.3 xf86Bus.c
>--- hw/xfree86/common/xf86Bus.c	6 Jul 2004 14:49:13 -0000	1.3
>+++ hw/xfree86/common/xf86Bus.c	25 Jan 2005 21:48:12 -0000
>@@ -1771,8 +1771,8 @@
> 	    range.type = (range.type & ~ResAccMask) | (access & ResAccMask);
> 	}
>  	range.type &= ~ResEstimated;	/* Not allowed for drivers */
>-#if !(defined(__alpha__) && defined(linux))
>-	/* On Alpha Linux, do not check for conflicts, trust the kernel. */
>+	/* On Alpha or IA64 Linux, do not check for conflicts, trust the kernel. */
>+#if !((defined(__alpha__) || (defined(__ia64__))) && defined(linux))
> 	if (checkConflict(&range, Acc, entityIndex, SETUP,TRUE)) 
> 	    res = xf86AddResToList(res,&range,entityIndex);
> 	else
>@@ -2391,13 +2391,13 @@
> #endif
>     }
>     xf86FreeResList(acc);
>-
>-#if !(defined(__alpha__) && defined(linux)) && \
>-    !(defined(__sparc64__) && defined(__OpenBSD__))
>     /* 
>-     * No need to validate on Alpha Linux or OpenBSD/sparc64, 
>+     * No need to validate on Alpha, IA64 Linux or OpenBSD/sparc64, 
>      * trust the kernel.
>      */
>+#if !(defined(__alpha__) && defined(linux)) && \
>+    !(defined(__ia64__) && defined(linux)) && \
>+    !(defined(__sparc64__) && defined(__OpenBSD__))
>     ValidatePci();
> #endif
>     
>Index: hw/xfree86/common/xf86pciBus.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c,v
>retrieving revision 1.6
>diff -u -r1.6 xf86pciBus.c
>--- hw/xfree86/common/xf86pciBus.c	11 Nov 2004 20:10:28 -0000	1.6
>+++ hw/xfree86/common/xf86pciBus.c	25 Jan 2005 21:48:12 -0000
>@@ -1682,10 +1682,12 @@
> 	    m = m->next;
> 	}
>     } else {
>+#if !defined(__ia64__)
> 	if (!xf86IsSubsetOf(range, m) || 
> 	    ChkConflict(&range, avoid, SETUP) 
> 	    || (mem && ChkConflict(&range, mem, SETUP))) 
> 	    ret = 0;
>+#endif 
>     }
> 
>     xf86FreeResList(avoid);
>Index: hw/xfree86/drivers/ati/radeon_dri.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v
>retrieving revision 1.11
>diff -u -r1.11 radeon_dri.c
>--- hw/xfree86/drivers/ati/radeon_dri.c	17 Dec 2004 16:50:36 -0000	1.11
>+++ hw/xfree86/drivers/ati/radeon_dri.c	25 Jan 2005 21:48:12 -0000
>@@ -853,7 +853,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] %d kB allocated with handle 0x%08lx\n",
>+	       "[agp] %d kB allocated with handle 0x%016lx\n",
> 	       info->gartSize*1024, info->agpMemHandle);
> 
>     if (drmAgpBind(info->drmFD,
>@@ -871,7 +871,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] ring handle = 0x%08lx\n", info->ringHandle);
>+	       "[agp] ring handle = 0x%016lx\n", info->ringHandle);
> 
>     if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
> 	       (drmAddressPtr)&info->ring) < 0) {
>@@ -879,7 +879,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] Ring mapped at 0x%08lx\n",
>+	       "[agp] Ring mapped at 0x%016lx\n",
> 	       (unsigned long)info->ring);
> 
>     if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
>@@ -889,7 +889,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] ring read ptr handle = 0x%08lx\n",
>+	       "[agp] ring read ptr handle = 0x%016lx\n",
> 	       info->ringReadPtrHandle);
> 
>     if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
>@@ -899,7 +899,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] Ring read ptr mapped at 0x%08lx\n",
>+	       "[agp] Ring read ptr mapped at 0x%016lx\n",
> 	       (unsigned long)info->ringReadPtr);
> 
>     if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
>@@ -909,7 +909,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] vertex/indirect buffers handle = 0x%08lx\n",
>+	       "[agp] vertex/indirect buffers handle = 0x%016lx\n",
> 	       info->bufHandle);
> 
>     if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,
>@@ -919,7 +919,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] Vertex/indirect buffers mapped at 0x%08lx\n",
>+	       "[agp] Vertex/indirect buffers mapped at 0x%016lx\n",
> 	       (unsigned long)info->buf);
> 
>     if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize,
>@@ -929,7 +929,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] GART texture map handle = 0x%08lx\n",
>+	       "[agp] GART texture map handle = 0x%016lx\n",
> 	       info->gartTexHandle);
> 
>     if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize,
>@@ -939,7 +939,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[agp] GART Texture map mapped at 0x%08lx\n",
>+	       "[agp] GART Texture map mapped at 0x%016lx\n",
> 	       (unsigned long)info->gartTex);
> 
>     RADEONSetAgpBase(info);
>@@ -962,7 +962,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] %d kB allocated with handle 0x%08lx\n",
>+	       "[pci] %d kB allocated with handle 0x%016lx\n",
> 	       info->gartSize*1024, info->pciMemHandle);
> 
>     RADEONDRIInitGARTValues(info);
>@@ -974,7 +974,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] ring handle = 0x%08lx\n", info->ringHandle);
>+	       "[pci] ring handle = 0x%016lx\n", info->ringHandle);
> 
>     if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
> 	       (drmAddressPtr)&info->ring) < 0) {
>@@ -982,10 +982,10 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Ring mapped at 0x%08lx\n",
>+	       "[pci] Ring mapped at 0x%016lx\n",
> 	       (unsigned long)info->ring);
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Ring contents 0x%08lx\n",
>+	       "[pci] Ring contents 0x%016lx\n",
> 	       *(unsigned long *)(pointer)info->ring);
> 
>     if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
>@@ -995,7 +995,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] ring read ptr handle = 0x%08lx\n",
>+	       "[pci] ring read ptr handle = 0x%016lx\n",
> 	       info->ringReadPtrHandle);
> 
>     if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
>@@ -1005,10 +1005,10 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Ring read ptr mapped at 0x%08lx\n",
>+	       "[pci] Ring read ptr mapped at 0x%016lx\n",
> 	       (unsigned long)info->ringReadPtr);
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Ring read ptr contents 0x%08lx\n",
>+	       "[pci] Ring read ptr contents 0x%016lx\n",
> 	       *(unsigned long *)(pointer)info->ringReadPtr);
> 
>     if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
>@@ -1018,7 +1018,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] vertex/indirect buffers handle = 0x%08lx\n",
>+	       "[pci] vertex/indirect buffers handle = 0x%016lx\n",
> 	       info->bufHandle);
> 
>     if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,
>@@ -1028,10 +1028,10 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Vertex/indirect buffers mapped at 0x%08lx\n",
>+	       "[pci] Vertex/indirect buffers mapped at 0x%016lx\n",
> 	       (unsigned long)info->buf);
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] Vertex/indirect buffers contents 0x%08lx\n",
>+	       "[pci] Vertex/indirect buffers contents 0x%016lx\n",
> 	       *(unsigned long *)(pointer)info->buf);
> 
>     if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize,
>@@ -1041,7 +1041,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] GART texture map handle = 0x%08lx\n",
>+	       "[pci] GART texture map handle = 0x%016lx\n",
> 	       info->gartTexHandle);
> 
>     if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize,
>@@ -1051,7 +1051,7 @@
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[pci] GART Texture map mapped at 0x%08lx\n",
>+	       "[pci] GART Texture map mapped at 0x%016lx\n",
> 	       (unsigned long)info->gartTex);
> 
>     return TRUE;
>@@ -1064,12 +1064,16 @@
> {
> 				/* Map registers */
>     info->registerSize = RADEON_MMIOSIZE;
>-    if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize,
>-		  DRM_REGISTERS, DRM_READ_ONLY, &info->registerHandle) < 0) {
>+    if (drmAddMap(info->drmFD, 
>+		  pciBusAddrToHostAddr(info->PciTag, PCI_MEM, info->MMIOAddr), 
>+		  info->registerSize,
>+		  DRM_REGISTERS, 
>+		  DRM_READ_ONLY,
>+		  &info->registerHandle) < 0) {
> 	return FALSE;
>     }
>     xf86DrvMsg(pScreen->myNum, X_INFO,
>-	       "[drm] register handle = 0x%08lx\n", info->registerHandle);
>+	       "[drm] register handle = 0x%016lx\n", info->registerHandle);
> 
>     return TRUE;
> }
>@@ -1319,7 +1323,9 @@
>     pDRIInfo->ddxDriverMajorVersion      = RADEON_VERSION_MAJOR;
>     pDRIInfo->ddxDriverMinorVersion      = RADEON_VERSION_MINOR;
>     pDRIInfo->ddxDriverPatchVersion      = RADEON_VERSION_PATCH;
>-    pDRIInfo->frameBufferPhysicalAddress = info->LinearAddr;
>+    pDRIInfo->frameBufferPhysicalAddress = pciBusAddrToHostAddr(info->PciTag, 
>+								PCI_MEM,
>+								info->LinearAddr);
>     pDRIInfo->frameBufferSize            = info->FbMapSize;
>     pDRIInfo->frameBufferStride          = (pScrn->displayWidth *
> 					    info->CurrentLayout.pixel_bytes);
>@@ -1329,6 +1335,10 @@
> 					    ? SAREA_MAX_DRAWABLES
> 					    : RADEON_MAX_DRAWABLES);
> 
>+    xf86DrvMsg(pScreen->myNum, X_INFO,
>+	       "[drm] frameBuffer handle = 0x%016lx\n", 
>+	       pDRIInfo->frameBufferPhysicalAddress);
>+
> #ifdef PER_CONTEXT_SAREA
>     /* This is only here for testing per-context SAREAs.  When used, the
>        magic number below would be properly defined in a header file. */
>Index: hw/xfree86/loader/xf86sym.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v
>retrieving revision 1.8
>diff -u -r1.8 xf86sym.c
>--- hw/xfree86/loader/xf86sym.c	29 Oct 2004 02:07:15 -0000	1.8
>+++ hw/xfree86/loader/xf86sym.c	25 Jan 2005 21:48:12 -0000
>@@ -1093,12 +1093,12 @@
> #endif
> #endif
> #if defined(__ia64__)
>-    SYMFUNC(_outw)
>-    SYMFUNC(_outb)
>-    SYMFUNC(_outl)
>-    SYMFUNC(_inb)
>-    SYMFUNC(_inw)
>-    SYMFUNC(_inl)
>+    SYMFUNC(outw)
>+    SYMFUNC(outb)
>+    SYMFUNC(outl)
>+    SYMFUNC(inb)
>+    SYMFUNC(inw)
>+    SYMFUNC(inl)
> #endif
> #if defined(__arm__)
>     SYMFUNC(outw)
>Index: hw/xfree86/os-support/xf86_OSproc.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v
>retrieving revision 1.2
>diff -u -r1.2 xf86_OSproc.h
>--- hw/xfree86/os-support/xf86_OSproc.h	23 Apr 2004 19:54:07 -0000	1.2
>+++ hw/xfree86/os-support/xf86_OSproc.h	25 Jan 2005 21:48:12 -0000
>@@ -256,6 +256,8 @@
> #endif /* NEED_OS_RAC_PROTOS */
> 
> extern Bool xf86GetPciSizeFromOS(PCITAG tag, int indx, int* bits);
>+extern Bool xf86GetPciOffsetFromOS(PCITAG tag, int indx, unsigned long* bases);
>+extern unsigned long xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base);
> 
> extern void xf86MakeNewMapping(int, int, unsigned long, unsigned long, pointer);
> extern void xf86InitVidMem(void);
>Index: hw/xfree86/os-support/bus/Imakefile
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v
>retrieving revision 1.5
>diff -u -r1.5 Imakefile
>--- hw/xfree86/os-support/bus/Imakefile	15 Sep 2004 09:23:58 -0000	1.5
>+++ hw/xfree86/os-support/bus/Imakefile	25 Jan 2005 21:48:12 -0000
>@@ -126,8 +126,8 @@
> PCIARCHOBJ = sparcPci.o
> # endif
> #elif defined(ia64Architecture)
>-PCIARCHSRC = 460gxPCI.c e8870PCI.c zx1PCI.c
>-PCIARCHOBJ = 460gxPCI.o e8870PCI.o zx1PCI.o
>+PCIARCHSRC = 460gxPCI.c e8870PCI.c zx1PCI.c altixPCI.c
>+PCIARCHOBJ = 460gxPCI.o e8870PCI.o zx1PCI.o altixPCI.o
> #endif
> 
> SRCS = Pci.c $(PCIDRVRSRC) $(SBUSDRVSRC) $(PCIARCHSRC)
>Index: hw/xfree86/os-support/bus/Pci.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v
>retrieving revision 1.4
>diff -u -r1.4 Pci.h
>--- hw/xfree86/os-support/bus/Pci.h	11 Aug 2004 21:14:17 -0000	1.4
>+++ hw/xfree86/os-support/bus/Pci.h	25 Jan 2005 21:48:12 -0000
>@@ -254,7 +254,7 @@
> # if defined(linux)
> #  define ARCH_PCI_INIT linuxPciInit
> #  define INCLUDE_XF86_MAP_PCI_MEM
>-#  define INCLUDE_XF86_NO_DOMAIN
>+/*   #  define INCLUDE_XF86_NO_DOMAIN */
> # elif defined(FreeBSD)
> #  define ARCH_PCI_INIT freebsdPciInit
> #  define INCLUDE_XF86_MAP_PCI_MEM
>Index: hw/xfree86/os-support/bus/linuxPci.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v
>retrieving revision 1.4
>diff -u -r1.4 linuxPci.c
>--- hw/xfree86/os-support/bus/linuxPci.c	30 Nov 2004 08:38:44 -0000	1.4
>+++ hw/xfree86/os-support/bus/linuxPci.c	25 Jan 2005 21:48:12 -0000
>@@ -59,13 +59,14 @@
> static CARD32 linuxPciCfgRead(PCITAG tag, int off);
> static void linuxPciCfgWrite(PCITAG, int off, CARD32 val);
> static void linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits);
>+static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr);
> 
> static pciBusFuncs_t linuxFuncs0 = {
> /* pciReadLong      */	linuxPciCfgRead,
> /* pciWriteLong     */	linuxPciCfgWrite,
> /* pciSetBitsLong   */	linuxPciCfgSetBits,
> /* pciAddrHostToBus */	pciAddrNOOP,
>-/* pciAddrBusToHost */	pciAddrNOOP
>+/* pciAddrBusToHost */	linuxTransAddrBusToHost
> };
> 
> static pciBusInfo_t linuxPci0 = {
>@@ -179,6 +180,26 @@
> 	}
> }
> 
>+/* 
>+ * This function will convert a BAR address into a host address
>+ * suitable for passing into the mmap function of a /proc/bus 
>+ * device.
>+ */
>+ADDRESS
>+linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr)
>+{
>+    ADDRESS ret = xf86GetOSOffsetFromPCI(tag, PCI_MEM|PCI_IO, addr);
>+    if (ret)
>+	return ret;
>+    else 
>+	/* 
>+	 * if it is not a BAR address, it must be legacy, (or wrong)
>+	 * return it as is ..
>+	 */
>+	return addr;
>+}
>+
>+
> #ifndef INCLUDE_XF86_NO_DOMAIN
> 
> /*
>@@ -376,7 +397,7 @@
> 	if (Flags & VIDMEM_FRAMEBUFFER)
> 	    mmapflags = MAP_SHARED | MAP_WRITECOMBINED;
> 	else
>-	    mmapflags = MAP_SHARED | MAP_NONCACHED
>+	    mmapflags = MAP_SHARED | MAP_NONCACHED;
> 
> #else /* !__ia64__ */
> 
>@@ -414,33 +435,80 @@
>     return NULL;
> }
> 
>+#define MAX_DOMAINS 257
>+static pointer DomainMmappedIO[MAX_DOMAINS];
>+static pointer DomainMmappedMem[MAX_DOMAINS];
>+
> pointer
> xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
> 		    ADDRESS Base, unsigned long Size)
> {
>-    return linuxMapPci(ScreenNum, Flags, Tag, Base, Size, PCIIOC_MMAP_IS_MEM);
>-}
>+    char path[38]; /* /sys/class/pci_bus/DDDD:BB/legacy_mem */
>+    int domain = xf86GetPciDomain(Tag);
>+    int bus = PCI_BUS_FROM_TAG(Tag);
>+    int fd;
>+    struct stat st;
> 
>-#define MAX_DOMAINS 257
>-static pointer DomainMmappedIO[MAX_DOMAINS];
>+    /* 
>+     * If we are running a new enough linux kernel (2.6.11+)
>+     * then we can open the legacy space through the /sys interface
>+     * this allows us to open the device and use a read/write/seek
>+     * interface to read/write bytes into legacy space.
>+     * 
>+     * We will use this interface for accesses to IO mapped regions
>+     * on the graphics card and all vga accesses
>+     */
>+    
>+    /* Hack, need to deal with domains correctly */
>+    sprintf(path, "/sys/class/pci_bus/%04x:%02x/legacy_mem", 0, bus);
>+    
>+    /*
>+    * if the /sys/...../legacy_mem structure is not supported in the 
>+    * running linux kernel, switch to the previous method
>+    */
>+    if ((Base > 1024*1024 /* 1MB since that is legacy space*/) ||
>+	(stat(path, &st) < 0))
>+        return linuxMapPci(ScreenNum, Flags, Tag, Base, Size, PCIIOC_MMAP_IS_MEM);
>+    
>+    if ((domain <= 0) || (domain >= MAX_DOMAINS))
>+	FatalError("xf86MapDomainMem():  domain out of range\n");
>+    
>+    /* Permanently map all of memory space */
>+    if (!DomainMmappedMem[domain]) {
>+        fd = open(path, O_RDWR);
>+	DomainMmappedMem[domain] = mmap(0, 1024*1024 /* 1MB, all of legacy space */,
>+					PROT_READ|PROT_WRITE,
>+					MAP_SHARED, fd, 0);
>+        close(fd);
>+	if (!DomainMmappedMem[domain])
>+	    FatalError("xf86MapDomainMem():  mmap() failure\n");
>+    }
>+    
>+    return (pointer)((char *)DomainMmappedMem[domain] + Base);
>+}
> 
> /* This has no means of returning failure, so all errors are fatal */
> IOADDRESS
> xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
> 		IOADDRESS Base, unsigned long Size)
> {
>+    char path[37]; /* /sys/class/pci_bus/DDDD:BB/legacy_io */
>     int domain = xf86GetPciDomain(Tag);
>+    int bus = PCI_BUS_FROM_TAG(Tag);
>+    int fd;
> 
>     if ((domain <= 0) || (domain >= MAX_DOMAINS))
> 	FatalError("xf86MapDomainIO():  domain out of range\n");
> 
>+    /* Hack, need to deal with domains properly */
>+    sprintf(path, "/sys/class/pci_bus/%04x:%02x/legacy_io", 0, bus);
>+
>     /* Permanently map all of I/O space */
>     if (!DomainMmappedIO[domain]) {
>-	DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag,
>-					      0, linuxGetIOSize(Tag),
>-					      PCIIOC_MMAP_IS_IO);
>-	if (!DomainMmappedIO[domain])
>-	    FatalError("xf86MapDomainIO():  mmap() failure\n");
>+        fd = open(path, O_RDWR);
>+	if (fd == -1)
>+	    FatalError("xf86MapDomainIO():  open() failure\n");
>+	DomainMmappedIO[domain] = fd << 24; /* encode fd in address */
>     }
> 
>     return (IOADDRESS)DomainMmappedIO[domain] + Base;
>@@ -454,6 +522,52 @@
>     unsigned long size;
>     int len, pagemask = getpagesize() - 1;
> 
>+    unsigned int i, dom, bus, dev, func;
>+    unsigned int fd;
>+    char file[256];
>+    unsigned char *head = Buf;
>+    char *enable = "1";
>+    char *disable = "0";
>+    struct stat st;
>+
>+    /*
>+     * Need to handle PCI bridges, which will have an additional path
>+     * element at the end, e.g.
>+     * /sys/devices/pci<dom>:<bus>/<bridge>/<dev>/rom instead of
>+     * /sys/devices/pci<dom>:<bus>/<dev>/rom
>+     */
>+    dom  = PCI_DOM_FROM_TAG(Tag);
>+    bus  = PCI_BUS_FROM_TAG(Tag);
>+    dev  = PCI_DEV_FROM_TAG(Tag);
>+    func = PCI_FUNC_FROM_TAG(Tag);
>+    sprintf(file, "/sys/devices/pci%04x:%02x/%04x:%02x:%02x.%1x/rom",
>+	    dom, bus, dom, bus, dev, func);
>+
>+    /* 
>+     * we need to check that the current linux implementation supports
>+     * the /sys/...../rom interface, if it does not, then we revert
>+     * to the previous behaviour
>+     */
>+    if (((Base & 0xfffff) == 0xC0000) && (stat(file, &st) == 0)) {
>+	
>+        if ((fd = open(file, O_RDWR))) {
>+            Base = 0x0;
>+        }
>+
>+	/* enable the ROM first */
>+	write(fd, enable, 2);
>+
>+        /* copy the ROM */
>+        for (i = 0; (i<Len),read(fd, Buf, 1); Buf++,i++)
>+            ;
>+
>+	write(fd, disable, 2);
>+	close(fd);
>+
>+        return Len;
>+
>+    }
>+
>     /* Ensure page boundaries */
>     offset = Base & ~pagemask;
>     size = ((Base + Len + pagemask) & ~pagemask) - offset;
>Index: hw/xfree86/os-support/linux/lnx_ia64.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ia64.c,v
>retrieving revision 1.1
>diff -u -r1.1 lnx_ia64.c
>--- hw/xfree86/os-support/linux/lnx_ia64.c	15 Sep 2004 09:23:59 -0000	1.1
>+++ hw/xfree86/os-support/linux/lnx_ia64.c	25 Jan 2005 21:48:12 -0000
>@@ -26,6 +26,7 @@
> 
> #include <sys/types.h>
> #include <sys/stat.h>
>+#include <sys/utsname.h>
> #include <unistd.h>
> 
> #include "ia64Pci.h"
>@@ -35,11 +36,24 @@
> IA64Chipset OS_PROBE_PCI_CHIPSET(scanpciWrapperOpt flags)
> {
>     struct stat unused;
>+    struct utsname utsName;
> 
>     if (!stat("/proc/bus/mckinley/zx1",&unused) 
> 	|| !stat("/proc/bus/mckinley/zx2",&unused))
> 	return ZX1_CHIPSET;
> 
>+    if (!stat("/proc/sgi_sn/licenseID", &unused)) {
>+
>+	/* get the UTS information */
>+	uname(&utsName);
>+	if ((strstr(utsName.release, "2.6.11") == NULL) &&
>+	    (strcmp(utsName.sysname, "Linux") == 0))
>+	    /* warn if the system has potential for instability */
>+	    ErrorF("Altix support is not present in the linux kernel before 2.6.11\n");
>+	
>+	return ALTIX_CHIPSET;
>+    }
>+
>     return NONE_CHIPSET;
> }
> #endif
>Index: hw/xfree86/os-support/linux/lnx_pci.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v
>retrieving revision 1.2
>diff -u -r1.2 lnx_pci.c
>--- hw/xfree86/os-support/linux/lnx_pci.c	23 Apr 2004 19:54:08 -0000	1.2
>+++ hw/xfree86/os-support/linux/lnx_pci.c	25 Jan 2005 21:48:12 -0000
>@@ -83,3 +83,141 @@
>     fclose(file);
>     return FALSE;
> }
>+
>+
>+
>+/* Query the kvirt address (64bit) of a BAR range from TAG */
>+Bool
>+xf86GetPciOffsetFromOS(PCITAG tag, int index, unsigned long* bases)
>+{
>+    FILE *file;
>+    char c[0x200];
>+    char *res;
>+    unsigned int bus, devfn, dev, fn;
>+    unsigned PCIADDR_TYPE offset[7];
>+    unsigned int num;
>+
>+    if (index > 7)
>+        return FALSE;
>+
>+    if (!(file = fopen("/proc/bus/pci/devices","r")))
>+        return FALSE;
>+    do {
>+        res = fgets(c,0x1ff,file);
>+        if (res) {
>+            num = sscanf(res,
>+                         /*bus+dev vendorid deviceid irq */
>+                         "%02x%02x\t%*04x%*04x\t%*x"
>+                         /* 7 PCI resource base addresses */
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         /* 7 PCI resource sizes, and then optionally a driver name */
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT
>+                         "\t" PCIADDR_IGNORE_FMT,
>+                         &bus,&devfn,&offset[0],&offset[1],&offset[2],&offset[3],
>+                         &offset[4],&offset[5],&offset[6]);
>+            if (num != 9) {  /* apparantly not 2.3 style */
>+                fclose(file);
>+                return FALSE;
>+            }
>+
>+            dev = devfn >> 3;
>+            fn = devfn & 0x7;
>+            if (tag == pciTag(bus,dev,fn)) {
>+                /* return the offset for the index requested */
>+                *bases = offset[index];
>+                fclose(file);
>+                return TRUE;
>+            }
>+        }
>+    } while (res);
>+
>+    fclose(file);
>+    return FALSE;
>+}
>+
>+/* Query the kvirt address (64bit) of a BAR range from size for a given TAG */
>+unsigned long
>+xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base)
>+{
>+    FILE *file;
>+    char c[0x200];
>+    char *res;
>+    unsigned int bus, devfn, dev, fn;
>+    unsigned PCIADDR_TYPE offset[7];
>+    unsigned PCIADDR_TYPE size[7];
>+    unsigned int num;
>+    unsigned int ndx;
>+
>+    if (!(file = fopen("/proc/bus/pci/devices","r")))
>+        return NULL;
>+    do {
>+        res = fgets(c,0x1ff,file);
>+        if (res) {
>+            num = sscanf(res,
>+                         /*bus+dev vendorid deviceid irq */
>+                         "%02x%02x\t%*04x%*04x\t%*x"
>+                         /* 7 PCI resource base addresses */
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         /* 7 PCI resource sizes, and then optionally a driver name */
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT
>+                         "\t" PCIADDR_FMT,
>+                         &bus,&devfn,&offset[0],&offset[1],&offset[2],&offset[3],
>+                         &offset[4],&offset[5],&offset[6], &size[0], &size[1], &size[2],
>+		         &size[3], &size[4], &size[5], &size[6]);
>+            if (num != 16) {  /* apparantly not 2.3 style */
>+                fclose(file);
>+                return NULL;
>+            }
>+
>+            dev = devfn >> 3;
>+            fn = devfn & 0x7;
>+            if (tag == pciTag(bus,dev,fn)) {
>+                /* ok now look through all the BAR values of this device */
>+                for (ndx=0; ndx<7; ndx++) {
>+                    unsigned long savePtr;
>+                    /*
>+		     * remember to lop of the last 4bits of the BAR values as they are
>+		     * memory attributes
>+		     */
>+		    if (ndx == 6) 
>+			savePtr = (0xFFFFFFF0) & 
>+			    pciReadLong(tag, PCI_CMD_BIOS_REG);
>+		    else /* this the ROM bar */
>+			savePtr = (0xFFFFFFF0) & 
>+			    pciReadLong(tag, PCI_CMD_BASE_REG + (0x4 * ndx));
>+                    /* find the index of the incoming base */
>+                    if (base >= savePtr && base <= (savePtr + size[ndx])) {
>+                        fclose(file);
>+                        return ( ~(0xFUL) & (offset[ndx] + (base - savePtr)));
>+                    }
>+                }
>+            }
>+        }
>+    } while (res);
>+
>+    fclose(file);
>+    return NULL;
>+
>+}
>Index: hw/xfree86/os-support/shared/ia64Pci.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c,v
>retrieving revision 1.1
>diff -u -r1.1 ia64Pci.c
>--- hw/xfree86/os-support/shared/ia64Pci.c	15 Sep 2004 09:23:59 -0000	1.1
>+++ hw/xfree86/os-support/shared/ia64Pci.c	25 Jan 2005 21:48:12 -0000
>@@ -29,19 +29,170 @@
>  * This file contains the glue needed to support various IA-64 chipsets.
>  */
> 
>+#include <fcntl.h>
>+#include <unistd.h>
>+#include <signal.h>
>+#include <dirent.h>
>+#include <sys/types.h>
>+#include <sys/stat.h>
>+#include <sys/ioctl.h>
>+#include <linux/pci.h>
>+
>+#include "compiler.h"
> #include "460gxPCI.h"
> #include "e8870PCI.h"
> #include "zx1PCI.h"
>+#include "altixPCI.h"
> #include "Pci.h"
> #include "ia64Pci.h"
> 
>+static int ia64_port_to_fd(unsigned long port) 
>+{
>+	return (port >> 24) & 0xffffffff;
>+}
>+ 
>+void outb(unsigned long port, unsigned char val) 
>+{
>+	int fd = ia64_port_to_fd(port);
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		_outb((port & 0xffff), val);
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		goto out;
>+	}
>+	if (write(fd, &val, 1) != 1) {
>+		ErrorF("I/O write failed\n");
>+		goto out;
>+	}
>+ out:
>+	return;
>+}
>+
>+void outw(unsigned long port, unsigned short val)
>+{
>+	int fd = ia64_port_to_fd(port);
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		_outw((port & 0xffff), val);
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		goto out;
>+	}
>+	if (write(fd, &val, 2) != 2) {
>+		ErrorF("I/O write failed\n");
>+		goto out;
>+	}
>+ out:
>+	return;
>+}
>+
>+void outl(unsigned long port, unsigned int val)
>+{
>+	int fd = ia64_port_to_fd(port);
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		_outl((port & 0xffff), val);
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		goto out;
>+	}
>+	if (write(fd, &val, 4) != 4) {
>+		ErrorF("I/O write failed\n");
>+		goto out;
>+	}
>+ out:
>+	return;
>+}
>+
>+unsigned int inb(unsigned long port)
>+{
>+	int fd = ia64_port_to_fd(port);
>+	unsigned char val;
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		val = _inb((port & 0xffff));
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+	if (read(fd, &val, 1) != 1) {
>+		ErrorF("I/O read failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+ out:
>+        return val;
>+}
>+
>+unsigned int inw(unsigned long port)
>+{
>+	int fd = ia64_port_to_fd(port);
>+	unsigned short val;
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		val = _inw((port & 0xffff));
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+	if (read(fd, &val, 2) != 2) {
>+		ErrorF("I/O read failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+ out:
>+        return val;
>+}
>+
>+unsigned int inl(unsigned long port)
>+{
>+	int fd = ia64_port_to_fd(port);
>+	unsigned int val;
>+
>+	if (!fd) {
>+		ErrorF("bad I/O context, using builtin \n");
>+		val = _inl((port & 0xffff));
>+		goto out;
>+	}
>+	if (lseek(fd, port & 0xffff, SEEK_SET) == -1) {
>+		ErrorF("I/O lseek failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+	if (read(fd, &val, 4) != 4) {
>+		ErrorF("I/O read failed\n");
>+		val = -1;
>+		goto out;
>+	}
>+ out:
>+        return val;
>+}
>+
> void
> ia64ScanPCIWrapper(scanpciWrapperOpt flags)
> {
>     static IA64Chipset chipset = NONE_CHIPSET;
>     
>     if (flags == SCANPCI_INIT) {
>-
>+	
> 	/* PCI configuration space probes should be done first */
> 	if (xorgProbe460GX(flags)) {
> 	    chipset = I460GX_CHIPSET;
>@@ -55,27 +206,35 @@
> #ifdef OS_PROBE_PCI_CHIPSET
> 	chipset = OS_PROBE_PCI_CHIPSET(flags);
> 	switch (chipset) {
>-	    case ZX1_CHIPSET:
>-		xf86PreScanZX1();
>-		return;
>-	    default:
>-		return;
>+	case ZX1_CHIPSET:
>+	    xf86PreScanZX1();
>+	    return;
>+	case ALTIX_CHIPSET:
>+	    xf86PreScanAltix();
>+	    return;
>+	default:
>+	    return;
> 	}
> #endif
>     } else /* if (flags == SCANPCI_TERM) */ {
> 
> 	switch (chipset) {
>-	    case I460GX_CHIPSET:
>-		xf86PostScan460GX();
>-		return;
>-	    case E8870_CHIPSET:
>-		xf86PostScanE8870();
>-		return;
>-	    case ZX1_CHIPSET:
>-		xf86PostScanZX1();
>-		return;
>-	    default:
>-		return;
>+	case I460GX_CHIPSET:
>+	    xf86PostScan460GX();
>+	    return;
>+	case E8870_CHIPSET:
>+	    xf86PostScanE8870();
>+	    return;
>+	case ZX1_CHIPSET:
>+	    xf86PostScanZX1();
>+	    return;
>+	case ALTIX_CHIPSET:
>+	    xf86PostScanAltix();
>+	    return;
>+	default:
>+	    return;
> 	}
>     }
> }
>+
>+
>Index: hw/xfree86/os-support/shared/ia64Pci.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h,v
>retrieving revision 1.1
>diff -u -r1.1 ia64Pci.h
>--- hw/xfree86/os-support/shared/ia64Pci.h	15 Sep 2004 09:23:59 -0000	1.1
>+++ hw/xfree86/os-support/shared/ia64Pci.h	25 Jan 2005 21:48:12 -0000
>@@ -32,7 +32,8 @@
>     NONE_CHIPSET,
>     I460GX_CHIPSET,
>     E8870_CHIPSET,
>-    ZX1_CHIPSET
>+    ZX1_CHIPSET,
>+    ALTIX_CHIPSET
> } IA64Chipset;
> 
> # ifdef OS_PROBE_PCI_CHIPSET
>--- /dev/null	1969-12-31 16:00:00.000000000 -0800
>+++ ./hw/xfree86/os-support/bus/altixPCI.h	2005-01-14 12:22:04.000000000 -0800
>@@ -0,0 +1,16 @@
>+#ifndef PCI_ALTIX_H
>+#define PCI_ALTIX_H 1
>+
>+#include <X11/Xdefs.h>
>+#include <Pci.h>
>+
>+Bool xorgProbeAltix(scanpciWrapperOpt flags);
>+void xf86PreScanAltix(void);
>+void xf86PostScanAltix(void);
>+
>+/* Some defines for PCI */
>+#define VENDOR_SGI 0x10A9
>+#define CHIP_TIO_CA 0x1010
>+#define CHIP_PIC_PCI 0x1011
>+
>+#endif
>--- /dev/null	1969-12-31 16:00:00.000000000 -0800
>+++ ./hw/xfree86/os-support/bus/altixPCI.c	2005-01-18 13:57:44.000000000 -0800
>@@ -0,0 +1,61 @@
>+/*
>+ * This file contains the glue necessary for support of SGI's Altix chipset.
>+ */
>+
>+#include "altixPCI.h"
>+#include "xf86.h"
>+#include "Pci.h"
>+
>+void
>+xf86PreScanAltix(void)
>+{
>+    /* XXX Fill me in... */
>+}
>+
>+void
>+xf86PostScanAltix(void)
>+{
>+    pciConfigPtr pPCI, *ppPCI, *ppPCI2;
>+    pciBusInfo_t *pBusInfo;
>+    int idx=0;
>+    int prevBusNum, curBusNum;
>+
>+    /* since the Altix IO infrastructure does not have an explicit Bridge
>+     * we will create a bridge device (for now one per Bus)
>+     *
>+     * We will store the bus num and insert a fake device for every 
>+     * new bus that we encounter. Then we need to make the pciBusInfo->primary_bus 
>+     * and ->bridge pointers, point to the "fake" device that we just created. 
>+     */
>+
>+    pBusInfo = pciBusInfo[0];
>+    ppPCI = ppPCI2 = xf86scanpci(0);
>+    prevBusNum = curBusNum = ppPCI[0]->busnum;
>+    pBusInfo = pciBusInfo[curBusNum];
>+    pBusInfo->bridge = ppPCI2[idx];
>+    pBusInfo->secondary = FALSE;
>+    pBusInfo->primary_bus = curBusNum;
>+
>+    /* Add a fake PCI-to-PCI bridge to represent each Bus */
>+    while (ppPCI2[idx] != NULL) {
>+	
>+	if (ppPCI2[idx]->busnum != prevBusNum) {
>+	    curBusNum = ppPCI2[idx]->busnum;
>+
>+	    pBusInfo = pciBusInfo[curBusNum];
>+	    pBusInfo->bridge = ppPCI2[idx];
>+	    pBusInfo->secondary = FALSE;
>+	    pBusInfo->primary_bus = curBusNum;
>+	    ppPCI2[idx]->businfo = pBusInfo;
>+	    ppPCI2[idx]->pci_base_class = PCI_CLASS_DISPLAY;
>+	    ppPCI2[idx]->pci_sub_class = PCI_SUBCLASS_PREHISTORIC_VGA;
>+
>+	    prevBusNum = curBusNum;
>+
>+	}
>+
>+	/* increment the index */
>+	idx ++;
>+    }
>+    return;
>+}

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Attachments on bug 2373: 1748 | 2425 | 2432 | 2461 | 2464 | 2478 | 2480 | 2483 | 2498 | 2508 | 2645 | 2673 | 2902 | 4983

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