Attachment 18987 Details for Bug 16638 – DVI/HDMI - Intrepid log file

DVI/HDMI - Intrepid log file

Xorg.0.log (text/plain), 129.76 KB, created by elupus on 2008-09-18 11:09:06 UTC

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Creator: elupus

Created: 2008-09-18 11:09:06 UTC

Size: 129.76 KB

patch

obsolete

>(WW) Failed to open protocol names file /etc/X11/xserver/protocol.txt
>X.Org X Server 1.5.0
>Release Date: 
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.24-15-server i686 Ubuntu
>Current Operating System: Linux htpc 2.6.27-3-generic #1 SMP Wed Sep 10 16:02:00 UTC 2008 i686
>Build Date: 11 September 2008  06:24:46PM
>xorg-server 2:1.5.0-1ubuntu1 (buildd@rothera.buildd) 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Thu Sep 18 17:55:58 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Screen1" (0)
>(**) |   |-->Monitor "dvi"
>(**) |   |-->Device "Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller"
>(**) |-->Input Device "Generic Keyboard"
>(**) |-->Input Device "Configured Mouse"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(==) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi,
>	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81d8a40
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 4.1
>	X.Org XInput driver : 2.1
>	X.Org Server Extension : 1.1
>	X.Org Font Renderer : 0.6
>(II) Loader running on linux
>(++) using VT number 7
>
>(--) PCI:*(0@0:2:0) Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller rev 3, Mem @ 0xfdb00000/0, 0xd0000000/0, I/O @ 0x0000ff00/0
>(--) PCI: (0@0:2:1) Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller rev 3, Mem @ 0xfde00000/0
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) LoadModule: "extmod"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.5.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.6
>(II) Loading font FreeType
>(II) LoadModule: "record"
>
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "intel"
>
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 2.4.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 4.1
>(II) LoadModule: "kbd"
>
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.3.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(II) LoadModule: "mouse"
>
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile Intel® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 4.1
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 965GM
>(--) intel(0): Chipset: "965GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xFDB00000
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) intel(0): initializing int10
>(WW) intel(0): Bad V_BIOS checksum
>(II) intel(0): Primary V_BIOS segment is: 0xc000
>(II) intel(0): VESA BIOS detected
>(II) intel(0): VESA VBE Version 3.0
>(II) intel(0): VESA VBE Total Mem: 7616 kB
>(II) intel(0): VESA VBE OEM: Intel(r)GM965/PM965/GL960 Graphics Chip Accelerated VGA BIOS
>(II) intel(0): VESA VBE OEM Software Rev: 1.0
>(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
>(II) intel(0): VESA VBE OEM Product: Intel(r)GM965/PM965/GL960 Graphics Controller
>(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section vga
>(**) intel(0): Option "Ignore" "true"
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): Output TMDS-1 using monitor section dvi
>(**) intel(0): Option "PreferredMode" "1920x1080"
>(II) intel(0): SDVOB: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz
>(II) intel(0): SDVOB: 1 input channel
>(II) intel(0): SDVOB: TMDS0 output reported
>(II) intel(0): Output TV using monitor section tv
>(**) intel(0): Option "PreferredMode" "1024x576"
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output TV disconnected
>(II) intel(0): Using user preference for initial modes
>(II) intel(0): Output TMDS-1 using initial mode 1920x1080
>(II) intel(0): Monitoring connected displays enabled
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(**) intel(0): Display dimensions: (408, 229) mm
>(WW) intel(0): Probed monitor is 160x90 mm, using Displaysize 408x229 mm
>(**) intel(0): DPI set to (127, 227)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 2.4.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000206 to 0x00000000
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status:
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000c0 to 0x000d0000
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30113
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0745053f
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05e10200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0353031c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06dc0200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00606000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x00ed00ed
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x0040035f
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80490020
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x0080034c
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x011e1819
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00050506
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x800f0001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x0008011d
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x0008011e
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x0009011e
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x0009011d
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc27600a8
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x5091487d
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x026801f4
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x80000850
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x0000cccd
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00006666
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 488960 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1955836 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: drmOpenMinor returns 12
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] loaded kernel module for "i915" driver.
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression enabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xfdb00000
>(II) intel(0): [drm] ring buffer = 0xd0000000
>(II) intel(0): [drm] mapped front buffer at 0xd0700000, handle = 0xd0700000
>(II) intel(0): [drm] mapped back buffer at 0xd4700000, handle = 0xd4700000
>(II) intel(0): [drm] mapped depth buffer at 0xd5700000, handle = 0xd5700000
>(II) intel(0): [drm] mapped classic textures at 0xd6700000, handle = 0xd6700000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 50331648 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01700000 (pgoffset 5888)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04700000 (pgoffset 18176)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05700000 (pgoffset 22272)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06700000 (pgoffset 26368)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00644fff: exa G965 state buffer (72 kB)
>(II) intel(0): 0x00645000-0x00645fff: overlay registers (4 kB)
>(II) intel(0): 0x00646000-0x00646fff: power context (4 kB)
>(II) intel(0): 0x00700000-0x016fffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01700000-0x046fffff: exa offscreen (49152 kB)
>(II) intel(0): 0x04700000-0x056fffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x05700000-0x066fffff: depth buffer (16384 kB) Y tiled
>(II) intel(0): 0x06700000-0x086fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(WW) intel(0): Option "monitor-LVDS" is not used
>(WW) intel(0): Option "PreferredMode" is not used
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(II) AIGLX: Screen 0 is not DRI2 capable
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: enabled GLX_texture_from_pixmap with driver support
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 408 x 229
>(**) Option "CoreKeyboard"
>(**) Generic Keyboard: always reports core events
>(**) Option "Protocol" "standard"
>(**) Generic Keyboard: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Generic Keyboard: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Generic Keyboard: XkbModel: "pc105"
>(**) Option "XkbLayout" "se"
>(**) Generic Keyboard: XkbLayout: "se"
>(**) Option "CustomKeycodes" "off"
>(**) Generic Keyboard: CustomKeycodes disabled
>(**) Option "Protocol" "ImPS/2"
>(**) Configured Mouse: Device: "/dev/input/mice"
>(**) Configured Mouse: Protocol: "ImPS/2"
>(**) Option "CorePointer"
>(**) Configured Mouse: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Emulate3Buttons" "true"
>(**) Configured Mouse: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5"
>(**) Configured Mouse: ZAxisMapping: buttons 4 and 5
>(**) Configured Mouse: Buttons: 9
>(**) Configured Mouse: Sensitivity: 1
>(II) evaluating device (Generic Keyboard)
>(II) XINPUT: Adding extended input device "Generic Keyboard" (type: KEYBOARD)
>(II) evaluating device (Configured Mouse)
>(II) XINPUT: Adding extended input device "Configured Mouse" (type: MOUSE)
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(II) config/hal: Adding input device Logitech USB Receiver
>(II) LoadModule: "evdev"
>
>(II) Loading /usr/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.5.0, module version = 2.0.99
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(**) Logitech USB Receiver: always reports core events
>(**) Logitech USB Receiver: Device: "/dev/input/event5"
>(II) Logitech USB Receiver: Found x and y relative axes
>(II) Logitech USB Receiver: Found 16 mouse buttons
>(II) Logitech USB Receiver: Configuring as mouse
>(II) XINPUT: Adding extended input device "Logitech USB Receiver" (type: MOUSE)
>(**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>(**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) config/hal: Adding input device Compaq Compaq Internet Keyboard
>(**) Compaq Compaq Internet Keyboard: always reports core events
>(**) Compaq Compaq Internet Keyboard: Device: "/dev/input/event4"
>(II) Compaq Compaq Internet Keyboard: Found keys
>(II) Compaq Compaq Internet Keyboard: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Compaq Compaq Internet Keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Compaq Compaq Internet Keyboard: xkb_rules: "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Compaq Compaq Internet Keyboard: xkb_model: "pc105"
>(**) Option "xkb_layout" "se"
>(**) Compaq Compaq Internet Keyboard: xkb_layout: "se"
>(II) config/hal: Adding input device Compaq Compaq Internet Keyboard
>(**) Compaq Compaq Internet Keyboard: always reports core events
>(**) Compaq Compaq Internet Keyboard: Device: "/dev/input/event3"
>(II) Compaq Compaq Internet Keyboard: Found keys
>(II) Compaq Compaq Internet Keyboard: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Compaq Compaq Internet Keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Compaq Compaq Internet Keyboard: xkb_rules: "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Compaq Compaq Internet Keyboard: xkb_model: "pc105"
>(**) Option "xkb_layout" "se"
>(**) Compaq Compaq Internet Keyboard: xkb_layout: "se"
>(II) config/hal: Adding input device Macintosh mouse button emulation
>(**) Macintosh mouse button emulation: always reports core events
>(**) Macintosh mouse button emulation: Device: "/dev/input/event0"
>(II) Macintosh mouse button emulation: Found x and y relative axes
>(II) Macintosh mouse button emulation: Found 3 mouse buttons
>(II) Macintosh mouse button emulation: Configuring as mouse
>(II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE)
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>AUDIT: Thu Sep 18 19:56:19 2008: 6261 X: client 9 rejected from local host ( uid=1000 gid=1000 pid=6738 )
>AUDIT: Thu Sep 18 19:56:19 2008: 6261 X: client 9 rejected from local host ( uid=1000 gid=1000 pid=6739 )
>AUDIT: Thu Sep 18 19:56:19 2008: 6261 X: client 9 rejected from local host ( uid=1000 gid=1000 pid=6740 )
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01700000 (pgoffset 5888)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04700000 (pgoffset 18176)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05700000 (pgoffset 22272)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06700000 (pgoffset 26368)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00644fff: exa G965 state buffer (72 kB)
>(II) intel(0): 0x00645000-0x00645fff: overlay registers (4 kB)
>(II) intel(0): 0x00646000-0x00646fff: power context (4 kB)
>(II) intel(0): 0x00700000-0x016fffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01700000-0x046fffff: exa offscreen (49152 kB)
>(II) intel(0): 0x04700000-0x056fffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x05700000-0x066fffff: depth buffer (16384 kB) Y tiled
>(II) intel(0): 0x06700000-0x086fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] mapped front buffer at 0xd0700000, handle = 0x2a0e0000
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>(**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01700000 (pgoffset 5888)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04700000 (pgoffset 18176)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05700000 (pgoffset 22272)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06700000 (pgoffset 26368)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00644fff: exa G965 state buffer (72 kB)
>(II) intel(0): 0x00645000-0x00645fff: overlay registers (4 kB)
>(II) intel(0): 0x00646000-0x00646fff: power context (4 kB)
>(II) intel(0): 0x00700000-0x016fffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01700000-0x046fffff: exa offscreen (49152 kB)
>(II) intel(0): 0x04700000-0x056fffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x05700000-0x066fffff: depth buffer (16384 kB) Y tiled
>(II) intel(0): 0x06700000-0x086fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>(**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
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>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01700000 (pgoffset 5888)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04700000 (pgoffset 18176)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05700000 (pgoffset 22272)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06700000 (pgoffset 26368)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00644fff: exa G965 state buffer (72 kB)
>(II) intel(0): 0x00645000-0x00645fff: overlay registers (4 kB)
>(II) intel(0): 0x00646000-0x00646fff: power context (4 kB)
>(II) intel(0): 0x00700000-0x016fffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01700000-0x046fffff: exa offscreen (49152 kB)
>(II) intel(0): 0x04700000-0x056fffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x05700000-0x066fffff: depth buffer (16384 kB) Y tiled
>(II) intel(0): 0x06700000-0x086fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>(**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(EE) intel(0): underrun on pipe A!
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01700000 (pgoffset 5888)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04700000 (pgoffset 18176)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05700000 (pgoffset 22272)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06700000 (pgoffset 26368)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00644fff: exa G965 state buffer (72 kB)
>(II) intel(0): 0x00645000-0x00645fff: overlay registers (4 kB)
>(II) intel(0): 0x00646000-0x00646fff: power context (4 kB)
>(II) intel(0): 0x00700000-0x016fffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01700000-0x046fffff: exa offscreen (49152 kB)
>(II) intel(0): 0x04700000-0x056fffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x05700000-0x066fffff: depth buffer (16384 kB) Y tiled
>(II) intel(0): 0x06700000-0x086fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>(**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): EDID vendor "SAM", prod id 956
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1360x768"x0.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.88  1280 1360 1496 1712  1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  160.96  1600 1704 1880 2160  1200 1201 1204 1242 -hsync +vsync (74.5 kHz)
>(II) intel(0): EDID vendor "SAM", prod id 956

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Attachments on bug 16638: 17573 | 18571 | 18987 | 19231 | 20531 | 20532 | 20533 | 20534

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