Attachment 20111 Details for Bug 18407 – diff -u between Xfree and Xorg

diff -u between Xfree and Xorg

diff-between-Xfree-and-Xorg.txt (text/plain), 9.99 KB, created by Andrew Randrianasulu on 2008-11-06 05:20:33 UTC

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Creator: Andrew Randrianasulu

Created: 2008-11-06 05:20:33 UTC

Size: 9.99 KB

patch

obsolete

>--- logs/radeontool-XFree-after-server-kill.txt	2008-11-06 19:01:03.000000000 +0300
>+++ logs/radeontool-after-Xorg-console-darkened.txt	2008-11-06 19:05:21.000000000 +0300
>@@ -19,9 +19,9 @@
> AUX2_SC_LEFT (1674)	0x00000000 (0)
> AUX2_SC_RIGHT (1678)	0x00000000 (0)
> AUX2_SC_TOP (167c)	0x00000000 (0)
>-AUX3_SC_BOTTOM (1690)	0x00002121 (8481)
>-AUX3_SC_LEFT (1684)	0x00000421 (1057)
>-AUX3_SC_RIGHT (1688)	0x00006003 (24579)
>+AUX3_SC_BOTTOM (1690)	0x00000707 (1799)
>+AUX3_SC_LEFT (1684)	0x00000706 (1798)
>+AUX3_SC_RIGHT (1688)	0x00000000 (0)
> AUX3_SC_TOP (168c)	0x00000000 (0)
> AUX_WINDOW_HORZ_CNTL (02d8)	0x4a000000 (1241513984)
> AUX_WINDOW_VERT_CNTL (02dc)	0x00000000 (0)
>@@ -30,7 +30,7 @@
> BIOS_1_SCRATCH (0014)	0x0100c000 (16826368)
> BIOS_2_SCRATCH (0018)	0x04040400 (67372032)
> BIOS_3_SCRATCH (001c)	0x00000000 (0)
>-BIOS_4_SCRATCH (0020)	0x02000002 (33554434)
>+BIOS_4_SCRATCH (0020)	0x00000002 (2)
> BIOS_5_SCRATCH (0024)	0x02000002 (33554434)
> BIOS_6_SCRATCH (0028)	0x00010000 (65536)
> BIOS_7_SCRATCH (002c)	0x00000000 (0)
>@@ -44,8 +44,8 @@
> CAP1_TRIG_CNTL (09c0)	0x00000000 (0)
> CAPABILITIES_ID (0f50)	0x06020001 (100794369)
> CAPABILITIES_PTR (0f34)	0x00000058 (88)
>-CLOCK_CNTL_DATA (000c)	0x000000c3 (195)
>-CLOCK_CNTL_INDEX (0008)	0x00000388 (904)
>+CLOCK_CNTL_DATA (000c)	0xc0006400 (-1073716224)
>+CLOCK_CNTL_INDEX (0008)	0x000003a2 (930)
> CLR_CMP_CLR_3D (1a24)	0x00000000 (0)
> CLR_CMP_CLR_DST (15c8)	0x00000000 (0)
> CLR_CMP_CLR_SRC (15c4)	0x00000000 (0)
>@@ -67,29 +67,29 @@
> CONSTANT_COLOR_C (1d34)	0x00000000 (0)
> CRC_CMDFIFO_ADDR (0740)	0x02010080 (33620096)
> CRC_CMDFIFO_DOUT (0744)	0x00004d4d (19789)
>-CRTC_CRNT_FRAME (0214)	0x0000fcbd (64701)
>+CRTC_CRNT_FRAME (0214)	0x0000e07b (57467)
> CRTC_DEBUG (021c)	0x00000000 (0)
> CRTC_EXT_CNTL (0054)	0x0d008000 (218136576)
> CRTC_EXT_CNTL_DPMS_BYTE (0055)	0x020d0080 (34406528)
> CRTC_GEN_CNTL (0050)	0x02000200 (33554944)
>-CRTC2_GEN_CNTL (03f8)	0x04000000 (67108864)
>+CRTC2_GEN_CNTL (03f8)	0x00000000 (0)
> CRTC_GUI_TRIG_VLINE (0218)	0x00000000 (0)
> CRTC_H_SYNC_STRT_WID (0204)	0x000102a8 (66216)
> CRTC2_H_SYNC_STRT_WID (0304)	0x00000000 (0)
> CRTC_H_TOTAL_DISP (0200)	0x004f005f (5177439)
> CRTC2_H_TOTAL_DISP (0300)	0x00000000 (0)
>-CRTC_OFFSET (0224)	0x00000500 (1280)
>-CRTC2_OFFSET (0324)	0x00000000 (0)
>+CRTC_OFFSET (0224)	0x00002d00 (11520)
>+CRTC2_OFFSET (0324)	0x40000000 (1073741824)
> CRTC_OFFSET_CNTL (0228)	0x10000000 (268435456)
>-CRTC2_OFFSET_CNTL (0328)	0x10000000 (268435456)
>+CRTC2_OFFSET_CNTL (0328)	0x50000000 (1342177280)
> CRTC_PITCH (022c)	0x00000028 (40)
> CRTC2_PITCH (032c)	0x00000000 (0)
>-CRTC_STATUS (005c)	0x00000002 (2)
>+CRTC_STATUS (005c)	0x0000000a (10)
> CRTC_V_SYNC_STRT_WID (020c)	0x000e019c (917916)
> CRTC2_V_SYNC_STRT_WID (030c)	0x00000000 (0)
> CRTC_V_TOTAL_DISP (0208)	0x018f01bf (26149311)
> CRTC2_V_TOTAL_DISP (0308)	0x00000000 (0)
>-CRTC_VLINE_CRNT_VLINE (0210)	0x015d03ff (22873087)
>+CRTC_VLINE_CRNT_VLINE (0210)	0x016803ff (23593983)
> CRTC2_CRNT_FRAME (0314)	0x00000000 (0)
> CRTC2_DEBUG (031c)	0x00000000 (0)
> CRTC2_GUI_TRIG_VLINE (0318)	0x80000000 (-2147483648)
>@@ -100,8 +100,8 @@
> CUR_CLR0 (026c)	0x00000000 (0)
> CUR_CLR1 (0270)	0x00000000 (0)
> CUR_HORZ_VERT_OFF (0268)	0x00000000 (0)
>-CUR_HORZ_VERT_POSN (0264)	0x018600d4 (25559252)
>-CUR_OFFSET (0260)	0x00302000 (3153920)
>+CUR_HORZ_VERT_POSN (0264)	0x00c200d1 (12714193)
>+CUR_OFFSET (0260)	0x00000000 (0)
> CUR2_CLR0 (036c)	0x00000000 (0)
> CUR2_CLR1 (0370)	0x00000000 (0)
> CUR2_HORZ_VERT_OFF (0368)	0x00000000 (0)
>@@ -120,49 +120,49 @@
> DAC_W_INDEX (03c8)	0x00000000 (0)
> DDA_CONFIG (02e0)	0x00000000 (0)
> DDA_ON_OFF (02e4)	0x00000000 (0)
>-DEFAULT_OFFSET (16e0)	0x10000000 (268435456)
>+DEFAULT_OFFSET (16e0)	0x00000000 (0)
> DEFAULT_PITCH (16e4)	0x00000000 (0)
> DEFAULT_SC_BOTTOM_RIGHT (16e8)	0x1fff1fff (536813567)
> DESTINATION_3D_CLR_CMP_VAL (1820)	0x00000000 (0)
> DESTINATION_3D_CLR_CMP_MSK (1824)	0x00000000 (0)
> DEVICE_ID (0f02)	0x00075964 (481636)
> DISP_MISC_CNTL (0d00)	0x5b300600 (1529873920)
>-DP_BRUSH_BKGD_CLR (1478)	0x00ffffff (16777215)
>+DP_BRUSH_BKGD_CLR (1478)	0x00000000 (0)
> DP_BRUSH_FRGD_CLR (147c)	0x00000000 (0)
>-DP_CNTL (16c0)	0x00000003 (3)
>+DP_CNTL (16c0)	0x0000000b (11)
> DP_CNTL_XDIR_YDIR_YMAJOR (16d0)	0x00000000 (0)
> DP_DATATYPE (16c4)	0x00000000 (0)
> DP_GUI_MASTER_CNTL (146c)	0x00000000 (0)
> DP_GUI_MASTER_CNTL_C (1c84)	0x00000000 (0)
>-DP_MIX (16c8)	0x00f00000 (15728640)
>+DP_MIX (16c8)	0x00cc0200 (13369856)
> DP_SRC_BKGD_CLR (15dc)	0x00000000 (0)
>-DP_SRC_FRGD_CLR (15d8)	0x00ffffff (16777215)
>+DP_SRC_FRGD_CLR (15d8)	0xffffffff (-1)
> DP_WRITE_MASK (16cc)	0x00000000 (0)
> DST_BRES_DEC (1630)	0x00000000 (0)
> DST_BRES_ERR (1628)	0x00000000 (0)
> DST_BRES_INC (162c)	0x00000000 (0)
> DST_BRES_LNTH (1634)	0x00000000 (0)
> DST_BRES_LNTH_SUB (1638)	0x00000000 (0)
>-DST_HEIGHT (1410)	0x0000013e (318)
>+DST_HEIGHT (1410)	0x00000002 (2)
> DST_HEIGHT_WIDTH (143c)	0x00000000 (0)
> DST_HEIGHT_WIDTH_8 (158c)	0x00000000 (0)
> DST_HEIGHT_WIDTH_BW (15b4)	0x00000000 (0)
> DST_HEIGHT_Y (15a0)	0x00000000 (0)
> DST_LINE_START (1600)	0x00000000 (0)
> DST_LINE_END (1604)	0x00000000 (0)
>-DST_LINE_PATCOUNT (1608)	0x00005500 (21760)
>-DST_OFFSET (1404)	0x00000000 (0)
>-DST_PITCH (1408)	0x00000000 (0)
>+DST_LINE_PATCOUNT (1608)	0x00000000 (0)
>+DST_OFFSET (1404)	0xd0000000 (-805306368)
>+DST_PITCH (1408)	0x00001000 (4096)
> DST_PITCH_OFFSET (142c)	0x00000000 (0)
> DST_PITCH_OFFSET_C (1c80)	0x51fa1845 (1375344709)
>-DST_WIDTH (140c)	0x000001e6 (486)
>+DST_WIDTH (140c)	0x00000002 (2)
> DST_WIDTH_HEIGHT (1598)	0x00000000 (0)
> DST_WIDTH_X (1588)	0x00000000 (0)
> DST_WIDTH_X_INCY (159c)	0x00000000 (0)
>-DST_X (141c)	0x00000000 (0)
>+DST_X (141c)	0x000001e4 (484)
> DST_X_SUB (15a4)	0x00000000 (0)
> DST_X_Y (1594)	0x00000000 (0)
>-DST_Y (1420)	0x00000000 (0)
>+DST_Y (1420)	0x0000013c (316)
> DST_Y_SUB (15a8)	0x00000000 (0)
> DST_Y_X (1438)	0x00000000 (0)
> FLUSH_1 (1704)	0x00000000 (0)
>@@ -203,13 +203,13 @@
> GENS0 (03c2)	0x00000000 (0)
> GENS1 (03da)	0x00000000 (0)
> GPIO_MONID (0068)	0x00000000 (0)
>-GPIO_MONIDB (006c)	0x00030000 (196608)
>-GPIO_CRT2_DDC (006c)	0x00030000 (196608)
>-GPIO_DVI_DDC (0064)	0x00030000 (196608)
>-GPIO_VGA_DDC (0060)	0x00030000 (196608)
>+GPIO_MONIDB (006c)	0x00000300 (768)
>+GPIO_CRT2_DDC (006c)	0x00000300 (768)
>+GPIO_DVI_DDC (0064)	0x00000300 (768)
>+GPIO_VGA_DDC (0060)	0x00000300 (768)
> GRPH8_DATA (03cf)	0x00000000 (0)
> GRPH8_IDX (03ce)	0x00000000 (0)
>-GUI_DEBUG0 (16a0)	0xffffff00 (-256)
>+GUI_DEBUG0 (16a0)	0xff00ff00 (-16711936)
> GUI_DEBUG1 (16a4)	0x013d0790 (20776848)
> GUI_DEBUG2 (16a8)	0x00000000 (0)
> GUI_DEBUG3 (16ac)	0x000000f0 (240)
>@@ -232,7 +232,7 @@
> HOST_DATA6 (17d8)	0x00000000 (0)
> HOST_DATA7 (17dc)	0x00000000 (0)
> HOST_DATA_LAST (17e0)	0x00000000 (0)
>-HOST_PATH_CNTL (0130)	0x70000000 (1879048192)
>+HOST_PATH_CNTL (0130)	0x70800000 (1887436800)
> HW_DEBUG (0128)	0x00000000 (0)
> HW_DEBUG2 (011c)	0x80000003 (-2147483645)
> I2C_CNTL_1 (0094)	0x00000000 (0)
>@@ -241,14 +241,14 @@
> INTERRUPT_PIN (0f3d)	0x00000801 (2049)
> IO_BASE (0f14)	0x0000b801 (47105)
> LATENCY (0f0d)	0x08008040 (134250560)
>-LEAD_BRES_DEC (1608)	0x00005500 (21760)
>+LEAD_BRES_DEC (1608)	0x00000000 (0)
> LEAD_BRES_LNTH (161c)	0x00000000 (0)
> LEAD_BRES_LNTH_SUB (1624)	0x00000000 (0)
> LVDS_GEN_CNTL (02d0)	0x08000008 (134217736)
> MAX_LATENCY (0f3f)	0x00000000 (0)
> MC_AGP_LOCATION (014c)	0x27ff2000 (671031296)
> MC_FB_LOCATION (0148)	0x1fff0000 (536805376)
>-MC_STATUS (0150)	0x01e1fa3b (31586875)
>+MC_STATUS (0150)	0x01e1fa3f (31586879)
> MDGPIO_A_REG (01ac)	0x00000000 (0)
> MDGPIO_EN_REG (01b0)	0x00000000 (0)
> MDGPIO_MASK (0198)	0x00000000 (0)
>@@ -266,8 +266,8 @@
> MEM_VGA_RP_SEL (003c)	0x00010000 (65536)
> MEM_VGA_WP_SEL (0038)	0x00010000 (65536)
> MIN_GRANT (0f3e)	0x00000008 (8)
>-MM_DATA (0004)	0x00000000 (0)
>-MM_INDEX (0000)	0x00000124 (292)
>+MM_DATA (0004)	0x02000200 (33554944)
>+MM_INDEX (0000)	0x00000050 (80)
> MPP_TB_CONFIG (01c0)	0x05ff0000 (100597760)
> MPP_GP_CONFIG (01c8)	0x00000000 (0)
> N_VIF_COUNT (0248)	0x00000000 (0)
>@@ -304,7 +304,7 @@
> OV0_P1_X_START_END (0494)	0x00000000 (0)
> OV0_P2_X_START_END (0498)	0x00000000 (0)
> OV0_P3_X_START_END (049c)	0x00000000 (0)
>-OV0_FILTER_CNTL (04a0)	0x0000000f (15)
>+OV0_FILTER_CNTL (04a0)	0x00000000 (0)
> OV0_FOUR_TAP_COEF_0 (04b0)	0x00000000 (0)
> OV0_FOUR_TAP_COEF_1 (04b4)	0x00000000 (0)
> OV0_FOUR_TAP_COEF_2 (04b8)	0x00000000 (0)
>@@ -318,7 +318,7 @@
> OV0_KEY_CNTL (04f4)	0x00000020 (32)
> OV0_TEST (04f8)	0x00000000 (0)
> PALETTE_DATA (00b4)	0x00000000 (0)
>-PALETTE_30_DATA (00b8)	0x000002aa (682)
>+PALETTE_30_DATA (00b8)	0x000000a8 (168)
> PALETTE_INDEX (00b0)	0x00020002 (131074)
> PCI_GART_PAGE (017c)	0x0aac0aac (179047084)
> PIXCLKS_CNTL (CL: 002d)	0x0000f8c0 (63680)
>@@ -326,7 +326,7 @@
> PPLL_DIV_0 (CL: 0004)	0x00070086 (458886)
> PPLL_CNTL (CL: 0002)	0x0000a700 (42752)
> CLK_PIN_CNTL (CL: 0001)	0x00018015 (98325)
>-SCLK_CNTL (CL: 000d)	0xffff800a (-32758)
>+SCLK_CNTL (CL: 000d)	0x00817ffa (8486906)
> PWRMAN_MISC (CL: 0016)	0x00000000 (0)
> SS_INT_CNTL (CL: 0033)	0x00200000 (2097152)
> PLANE_3D_MASK_C (1d44)	0x94022486 (-1811798906)
>@@ -345,12 +345,12 @@
> REG_BASE (0f18)	0xdfef0000 (-537985024)
> REGPROG_INF (0f09)	0x08030000 (134414336)
> REVISION_ID (0f08)	0x03000001 (50331649)
>-SC_BOTTOM (164c)	0x00000037 (55)
>+SC_BOTTOM (164c)	0x00000000 (0)
> SC_BOTTOM_RIGHT (16f0)	0x00000000 (0)
> SC_BOTTOM_RIGHT_C (1c8c)	0x08088440 (134775872)
>-SC_LEFT (1640)	0x00000045 (69)
>-SC_RIGHT (1644)	0x0000004b (75)
>-SC_TOP (1648)	0x0000002a (42)
>+SC_LEFT (1640)	0x00000000 (0)
>+SC_RIGHT (1644)	0x00000000 (0)
>+SC_TOP (1648)	0x00000000 (0)
> SC_TOP_LEFT (16ec)	0x00000000 (0)
> SC_TOP_LEFT_C (1c88)	0x00000000 (0)
> SDRAM_MODE_REG (0158)	0x75320032 (1966211122)
>@@ -359,15 +359,15 @@
> SNAPSHOT_F_COUNT (0244)	0x00000000 (0)
> SNAPSHOT_VH_COUNTS (0240)	0x00000000 (0)
> SNAPSHOT_VIF_COUNT (024c)	0x00000000 (0)
>-SRC_OFFSET (15ac)	0x00000000 (0)
>-SRC_PITCH (15b0)	0x00000000 (0)
>+SRC_OFFSET (15ac)	0xd0408000 (-801079296)
>+SRC_PITCH (15b0)	0x00000040 (64)
> SRC_PITCH_OFFSET (1428)	0x00000000 (0)
> SRC_SC_BOTTOM (165c)	0x00000000 (0)
> SRC_SC_BOTTOM_RIGHT (16f4)	0x00000000 (0)
> SRC_SC_RIGHT (1654)	0x00000000 (0)
>-SRC_X (1414)	0x000001dc (476)
>+SRC_X (1414)	0x00000000 (0)
> SRC_X_Y (1590)	0x00000000 (0)
>-SRC_Y (1418)	0x00000003 (3)
>+SRC_Y (1418)	0x00000000 (0)
> SRC_Y_X (1434)	0x00000000 (0)
> STATUS (0f06)	0x000102b0 (66224)
> SUBPIC_CNTL (0540)	0x00000000 (0)

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Attachments on bug 18407: 20101 | 20102 | 20103 | 20104 | 20105 | 20106 | 20107 | 20108 | 20109 | 20110 | 20111 | 39593 | 39594

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