Attachment 21237 Details for Bug 18974 – intel driver failing to load on :1 while :0 is occupied with intelfb/fbdev driver

intel driver failing to load on :1 while :0 is occupied with intelfb/fbdev driver

Xorg.1.log (text/x-log), 37.44 KB, created by Marques Johansson on 2008-12-17 03:30:38 UTC

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Creator: Marques Johansson

Created: 2008-12-17 03:30:38 UTC

Size: 37.44 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.5.99.3
>Release Date: (unreleased)
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.24-19-server i686 Ubuntu
>Current Operating System: Linux bang 2.6.28-2-generic #3-Ubuntu SMP Thu Dec 4 21:49:06 UTC 2008 i686
>Build Date: 17 December 2008  03:10:17AM
>xorg-server 2:1.5.99.3-0ubuntu3 (buildd@rothera.buildd) 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.1.log", Time: Wed Dec 17 06:14:29 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) No Layout section.  Using the first Screen section.
>(**) |-->Screen "Default Screen" (0)
>(**) |   |-->Monitor "Configured Monitor"
>(**) |   |-->Device "Configured Video Device"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(==) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi,
>	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(II) Cannot locate a core pointer device.
>(II) Cannot locate a core keyboard device.
>(II) The server relies on HAL to provide the list of input devices.
>	If no devices become available, reconfigure HAL or disable AllowEmptyInput.
>(II) Loader magic: 0x1ac0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(--) using VT number 2
>
>(--) PCI:*(0@0:2:0) Intel Corporation 82865G Integrated Graphics Controller rev 2, Mem @ 0xf0000000/0, 0xfeb80000/0, I/O @ 0x0000ed98/0
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 2.5.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): Creating default Display subsection in Screen section
>	"Default Screen" for depth/fbbpp 24/32
>(==) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "true"
>(**) intel(0): Option "FallbackDebug" "true"
>(**) intel(0): Option "TripleBuffer" "true"
>(**) intel(0): Option "XvMC" "true"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 865G
>(--) intel(0): Chipset: "865G"
>(--) intel(0): Linear framebuffer at 0xF0000000
>(--) intel(0): IO registers at addr 0xFEB80000
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(==) intel(0): Using EXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x64030000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x58027602 (0x7602)
>(II) intel(0):               C0DRB1: 0x5c025802 (0x5802)
>(II) intel(0):               C0DRB2: 0x80025c02 (0x5c02)
>(II) intel(0):               C0DRB3: 0x102f8002 (0x8002)
>(II) intel(0):               C1DRB0: 0x630d285d (0x285d)
>(II) intel(0):               C1DRB1: 0xa3ba630d (0x630d)
>(II) intel(0):               C1DRB2: 0x00ffa3ba (0xa3ba)
>(II) intel(0):               C1DRB3: 0x080800ff (0x00ff)
>(II) intel(0):              C0DRA01: 0xffff102f (0x102f)
>(II) intel(0):              C0DRA23: 0xe800ffff (0xffff)
>(II) intel(0):              C1DRA01: 0x08080808 (0x0808)
>(II) intel(0):              C1DRA23: 0x08080808 (0x0808)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):         CACHE_MODE_0: 0x00000000
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x0000005f
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x003ff2ff
>(II) intel(0):          DVOC_SRCDIM: 0x003ff2ff
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):                 FPA0: 0x0008140d (n = 8, m1 = 20, m2 = 13)
>(II) intel(0):                 FPA1: 0x0008140d (n = 8, m1 = 20, m2 = 13)
>(II) intel(0):               DPLL_A: 0x90800000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x052f03ff (1024 active, 1328 total)
>(II) intel(0):             HBLANK_A: 0x052f03ff (1024 start, 1328 end)
>(II) intel(0):              HSYNC_A: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_A: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_A: 0x030902ff (768 start, 778 end)
>(II) intel(0):              VSYNC_A: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x00000000 (1, 1)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):                 FPB0: 0x00000000 (n = 0, m1 = 0, m2 = 0)
>(II) intel(0):                 FPB1: 0x00000000 (n = 0, m1 = 0, m2 = 0)
>(II) intel(0):               DPLL_B: 0x00000000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x00000000 (1 active, 1 total)
>(II) intel(0):             HBLANK_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):              HSYNC_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):             VTOTAL_B: 0x00000000 (1 active, 1 total)
>(II) intel(0):             VBLANK_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):              VSYNC_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x8000008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000000
>(II) intel(0):         MI_ARB_STATE: 0x00000000
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 75000 n 8 m1 20 m2 13 p1 2 p2 4
>(II) intel(0): pipe B dot 72000 n 0 m1 0 m2 0 p1 2 p2 2
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 1 display pipe available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Configured Monitor
>(II) intel(0): I2C bus "DVODDC_D" initialized.
>(II) Loading sub module "sil164"
>(II) LoadModule: "sil164"
>(II) Loading /usr/lib/xorg/modules/drivers//sil164.so
>(II) Module sil164: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(II) Loading sub module "ch7xxx"
>(II) LoadModule: "ch7xxx"
>(II) Loading /usr/lib/xorg/modules/drivers//ch7xxx.so
>(II) Module ch7xxx: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): I2C bus "DVOI2C_E" removed.
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(II) Loading sub module "ivch"
>(II) LoadModule: "ivch"
>(II) Loading /usr/lib/xorg/modules/drivers//ivch.so
>(II) Module ivch: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): I2C bus "DVOI2C_E" removed.
>(II) intel(0): I2C bus "DVOI2C_B" initialized.
>(II) Loading sub module "tfp410"
>(II) LoadModule: "tfp410"
>(II) Loading /usr/lib/xorg/modules/drivers//tfp410.so
>(II) Module tfp410: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): I2C bus "DVOI2C_B" removed.
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(II) Loading sub module "ch7017"
>(II) LoadModule: "ch7017"
>(II) Loading /usr/lib/xorg/modules/drivers//ch7017.so
>(II) Module ch7017: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel(0): I2C bus "DVOI2C_E" removed.
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(II) intel(0): I2C bus "DVOI2C_E" removed.
>(II) intel(0): I2C bus "DVODDC_D" removed.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4))
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
>(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): EDID for output VGA
>(II) intel(0): Manufacturer: DEL  Model: a00a  Serial#: 1128352344
>(II) intel(0): Year: 2004  Week: 23
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Analog Display Input,  Input Voltage Level: 0.700/0.700 V
>(II) intel(0): Sync:  Separate
>(II) intel(0): Max Image Size [cm]: horiz.: 34  vert.: 27
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.637 redY: 0.344   greenX: 0.310 greenY: 0.582
>(II) intel(0): blueX: 0.143 blueY: 0.100   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) intel(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 108.0 MHz   Image Size:  338 x 270 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1440 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1066 v_border: 0
>(II) intel(0): Serial No: J1806461CAJX
>(II) intel(0): Monitor name: DELL E172FP
>(II) intel(0): Ranges: V min: 56 V max: 76 Hz, H min: 31 H max: 80 kHz, PixClock max 140 MHz
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0010ac0aa0584a4143
>(II) intel(0): 	170e010368221b78ea04a5a3584f9524
>(II) intel(0): 	195054a54b00714f8180010101010101
>(II) intel(0): 	010101010101302a009851002a403070
>(II) intel(0): 	1300520e1100001e000000ff004a3138
>(II) intel(0): 	303634363143414a580a000000fc0044
>(II) intel(0): 	454c4c204531373246500a20000000fd
>(II) intel(0): 	00384c1f500e000a20202020202000ae
>(II) intel(0): EDID vendor "DEL", prod id 40970
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): EDID vendor "DEL", prod id 40970
>(II) intel(0): Printing probed modes for output VGA
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Output VGA connected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output VGA using initial mode 1280x1024
>(II) intel(0): detected 128 kB GTT.
>(II) intel(0): detected 8060 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(**) intel(0): Intel XvMC decoder enabled
>(==) intel(0): Will not try to enable page flipping
>(**) intel(0): Triple buffering enabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(**) intel(0): Display dimensions: (340, 270) mm
>(**) intel(0): DPI set to (95, 120)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 2.4.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x80000207 to 0x00000207
>(WW) intel(0): PIPEASTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 875520 total, 17 used
>(II) intel(0): I830CheckAvailableMemory: 3502012 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 131072 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xfeb80000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 31457280 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x041ff000 (pgoffset 16895)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04200000 (pgoffset 16896)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x06000000 (pgoffset 24576)
>(EE) intel(0): Failed to pin front buffer: Cannot allocate memory
>
>Fatal server error:
>Couldn't bind memory for BO front buffer
>
>
>Please consult the The X.Org Foundation support 
>	 at http://wiki.x.org
> for help. 
>Please also check the log file at "/var/log/Xorg.1.log" for additional information.
>
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x80000207 to 0x00000000
>(WW) intel(0): PIPEASTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x64030000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x58027602 (0x7602)
>(II) intel(0):               C0DRB1: 0x5c025802 (0x5802)
>(II) intel(0):               C0DRB2: 0x80025c02 (0x5c02)
>(II) intel(0):               C0DRB3: 0x102f8002 (0x8002)
>(II) intel(0):               C1DRB0: 0x630d285d (0x285d)
>(II) intel(0):               C1DRB1: 0xa3ba630d (0x630d)
>(II) intel(0):               C1DRB2: 0x00ffa3ba (0xa3ba)
>(II) intel(0):               C1DRB3: 0x080800ff (0x00ff)
>(II) intel(0):              C0DRA01: 0xffff102f (0x102f)
>(II) intel(0):              C0DRA23: 0xe800ffff (0xffff)
>(II) intel(0):              C1DRA01: 0x08080808 (0x0808)
>(II) intel(0):              C1DRA23: 0x08080808 (0x0808)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):         CACHE_MODE_0: 0x00000000
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x0000005f
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x003ff2ff
>(II) intel(0):          DVOC_SRCDIM: 0x003ff2ff
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x0008140d (n = 8, m1 = 20, m2 = 13)
>(II) intel(0):                 FPA1: 0x0008140d (n = 8, m1 = 20, m2 = 13)
>(II) intel(0):               DPLL_A: 0x90800000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x052f03ff (1024 active, 1328 total)
>(II) intel(0):             HBLANK_A: 0x052f03ff (1024 start, 1328 end)
>(II) intel(0):              HSYNC_A: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_A: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_A: 0x030902ff (768 start, 778 end)
>(II) intel(0):              VSYNC_A: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x00000000 (1, 1)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):                 FPB0: 0x00000000 (n = 0, m1 = 0, m2 = 0)
>(II) intel(0):                 FPB1: 0x00000000 (n = 0, m1 = 0, m2 = 0)
>(II) intel(0):               DPLL_B: 0x00000000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x00000000 (1 active, 1 total)
>(II) intel(0):             HBLANK_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):              HSYNC_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):             VTOTAL_B: 0x00000000 (1 active, 1 total)
>(II) intel(0):             VBLANK_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):              VSYNC_B: 0x00000000 (1 start, 1 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x8000008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000000
>(II) intel(0):         MI_ARB_STATE: 0x00000000
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 75000 n 8 m1 20 m2 13 p1 2 p2 4
>(II) intel(0): pipe B dot 72000 n 0 m1 0 m2 0 p1 2 p2 2
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
> ddxSigGiveUp: Closing log

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Attachments on bug 18974: 20941 | 21237 | 21481 | 21482 | 22281

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