Attachment 21307 Details for Bug 19174 – xorg.0.log

xorg.0.log

Xorg.0.log (text/plain), 106.29 KB, created by zhao jian on 2008-12-19 01:45:29 UTC

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Creator: zhao jian

Created: 2008-12-19 01:45:29 UTC

Size: 106.29 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.5.99.3
>Release Date: (unreleased)
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.21-1.3194.fc7 i686 
>Current Operating System: Linux x-gm45a 2.6.28-rc8 #2 SMP Tue Dec 16 17:43:26 CST 2008 i686
>Build Date: 17 December 2008  09:10:24AM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/opt/X11R7/var/log/Xorg.0.log", Time: Fri Dec 19 14:22:22 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Videocard0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(**) Option "AllowEmptyInput" "false"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) Including the default font path built-ins.
>(**) FontPath set to:
>	unix/:7100,
>	built-ins
>(**) ModulePath set to "/opt/X11R7/lib/xorg/modules"
>(II) Loader magic: 0x660
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(--) using VT number 7
>
>(--) PCI:*(0@0:2:0) Intel Corporation Cantiga Integrated Graphics Controller rev 7, Mem @ 0x98000000/0, 0x80000000/0, I/O @ 0x000070f0/0
>(--) PCI: (0@0:2:1) Intel Corporation Cantiga Integrated Graphics Controller rev 7, Mem @ 0x98400000/0
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded by default.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri2" will be loaded by default.
>(II) LoadModule: "dbe"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "extmod"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "fbdevhw"
>(II) Loading /opt/X11R7/lib/xorg/modules/linux//libfbdevhw.so
>(II) Module fbdevhw: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 0.0.2
>	ABI class: X.Org Video Driver, version 5.0
>(II) LoadModule: "glx"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(WW) Warning, couldn't open module freetype
>(II) UnloadModule: "freetype"
>(EE) Failed to load module "freetype" (module does not exist, 0)
>(II) LoadModule: "type1"
>(WW) Warning, couldn't open module type1
>(II) UnloadModule: "type1"
>(EE) Failed to load module "type1" (module does not exist, 0)
>(II) LoadModule: "dri"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "record"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dri2"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /opt/X11R7/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 2.5.99
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) LoadModule: "mouse"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.5.99.1, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(II) LoadModule: "kbd"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.5.99.1, module version = 1.3.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /opt/X11R7/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "AccelMethod" "UXA"
>(**) intel(0): Option "ModeDebug" "on"
>(**) intel(0): Option "XvMC" "on"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) Mobile IntelÂ® GM45 Express Chipset
>(--) intel(0): Chipset: "Mobile IntelÂ® GM45 Express Chipset"
>(--) intel(0): Linear framebuffer at 0x80000000
>(--) intel(0): IO registers at addr 0x98000000
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(**) intel(0): Using UXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0xa0000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000206 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x19000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x80000206 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00021309 (n = 2, m1 = 19, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98046c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x100000d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xf700f800
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 69047 n 2 m1 19 m2 9 p1 3 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:E-EDID segment register" registered at address 0x60.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): No SDVO device found on SDVOB
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" removed.
>(II) intel(0): Output HDMI-1 has no monitor section
>(II) intel(0): I2C bus "HDMIDDC_B" initialized.
>(II) intel(0): HDMI output 1 detected
>(II) intel(0): Output TV has no monitor section
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Output HDMI-1 disconnected
>(II) intel(0): Output TV disconnected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output LVDS using initial mode 1280x800
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 65532 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /opt/X11R7/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.5.99.3, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000120 to 0x38000120
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000400 to 0x18000400
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000206 to 0x00000000
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEASTAT after: status:
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000206 to 0x00000206
>(WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000d0 to 0x000c00d0
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00404000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710087
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x6b405140
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x8000085e
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x321b (FBC_FENCE_OFF) changed from 0xcd01ed00 to 0xf700f800
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 474624 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1898492 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) intel(0): [DRI2] Setup complete
>(**) intel(0): Framebuffer compression enabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): Page Flipping disabled
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) UXA(0): Driver registered support for the following operations:
>(II)         solid
>(II)         copy
>(II)         composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00063fff: compressed frame buffer (400 kB, 0x000000007c000000 physical
>)
>(II) intel(0): 0x00064000-0x00064fff: power context (4 kB)
>(II) intel(0): 0x03fff000:            end of stolen memory
>(II) intel(0): 0x03fff000-0x0f9fefff: DRI memory manager (190464 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x03fff000:            start of memory manager
>(II) intel(0): 0x04100000-0x0473ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x04020000-0x0402efff: exa G965 state buffer (60 kB)
>(II) intel(0): 0x04030000-0x04037fff: logical 3D context (32 kB)
>(II) intel(0): 0x04038000-0x04041fff: HW cursors (40 kB)
>(II) intel(0): 0x0f9ff000:            end of memory manager
>(II) intel(0): using SSC reference clock of 100 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): chosen: dotclock 69285 vco 1940000 ((m 97, m1 16, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x1004000c (clock gates disabled: VRHUNIT DSSUNIT OVRUNIT OVCUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x000002c0
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x38000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x18000400
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x04100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800000 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x04100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031005 (n = 3, m1 = 16, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x000c00d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00404000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00012d2d
>(II) intel(0):      TV_FILTER_CTL_3: 0x00009696
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x20000080
>(II) intel(0):          FBC_COMMAND: 0x08c80032
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xf700f800
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): SDVO phase shift 0 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): SDVO phase shift 0 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 69285 n 3 m1 16 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output HDMI-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(==) intel(0): Intel XvMC decoder disabled
>(II) intel(0): Set up textured video
>(II) intel(0): direct rendering: DRI2 Enabled
>(--) RandR disabled
>(II) Initializing built-in extension Generic Event Extension
>(II) Initializing built-in extension SHAPE
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension BIG-REQUESTS
>(II) Initializing built-in extension SYNC
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-MISC
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>(II) AIGLX: Loaded and initialized /opt/X11R7/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI2 GL provider for screen 0
>(II) intel(0): Setting screen physical size to 261 x 163
>[dix] Could not init font path element unix/:7100, removing from list!
>(**) Option "Protocol" "IMPS/2"
>(**) Mouse0: Device: "/dev/input/mice"
>(**) Mouse0: Protocol: "IMPS/2"
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Emulate3Buttons" "yes"
>(**) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5"
>(**) Mouse0: ZAxisMapping: buttons 4 and 5
>(**) Mouse0: Buttons: 9
>(**) Mouse0: Sensitivity: 1
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(**) Mouse0: (accel) keeping acceleration scheme 1
>(**) Mouse0: (accel) filter chain progression: 2.00
>(**) Mouse0: (accel) filter stage 0: 20.00 ms
>(**) Mouse0: (accel) set acceleration profile 0
>(II) Mouse0: ps2EnableDataReporting: succeeded
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) Keyboard0: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) config/hal: Adding input device AT Translated Set 2 keyboard
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 0.0.0, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(EE) module ABI major version (2) doesn't match the server's version (4)
>(II) UnloadModule: "evdev"
>(II) Unloading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(EE) Failed to load module "evdev" (module requirement mismatch, 0)
>(EE) No input driver matching `evdev'
>(EE) config/hal: NewInputDeviceRequest failed (15)
>(II) config/hal: Adding input device Power Button (FF)
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 0.0.0, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(EE) module ABI major version (2) doesn't match the server's version (4)
>(II) UnloadModule: "evdev"
>(II) Unloading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(EE) Failed to load module "evdev" (module requirement mismatch, 0)
>(EE) No input driver matching `evdev'
>(EE) config/hal: NewInputDeviceRequest failed (15)
>(II) config/hal: Adding input device Sleep Button (CM)
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 0.0.0, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(EE) module ABI major version (2) doesn't match the server's version (4)
>(II) UnloadModule: "evdev"
>(II) Unloading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(EE) Failed to load module "evdev" (module requirement mismatch, 0)
>(EE) No input driver matching `evdev'
>(EE) config/hal: NewInputDeviceRequest failed (15)
>(II) config/hal: Adding input device Macintosh mouse button emulation
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 0.0.0, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(EE) module ABI major version (2) doesn't match the server's version (4)
>(II) UnloadModule: "evdev"
>(II) Unloading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(EE) Failed to load module "evdev" (module requirement mismatch, 0)
>(EE) No input driver matching `evdev'
>(EE) config/hal: NewInputDeviceRequest failed (15)
>(II) config/hal: Adding input device SynPS/2 Synaptics TouchPad
>(II) LoadModule: "synaptics"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 4.3.99.902, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(EE) module ABI major version (2) doesn't match the server's version (4)
>(II) UnloadModule: "synaptics"
>(II) Unloading /opt/X11R7/lib/xorg/modules/input//synaptics_drv.so
>(EE) Failed to load module "synaptics" (module requirement mismatch, 0)
>(EE) No input driver matching `synaptics'
>(EE) config/hal: NewInputDeviceRequest failed (15)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): Detected Component TV connection
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output TV
>(II) intel(0): Modeline "1024x768"x30.0   26.89  1024 1025 1088 1120  768 769 800 801 (24.0 kHz)
>(II) intel(0): Modeline "800x600"x30.0   17.00  800 801 864 896  600 601 632 633 (19.0 kHz)
>(II) intel(0): Modeline "848x480"x30.0   14.51  848 849 912 944  480 481 512 513 (15.4 kHz)
>(II) intel(0): Modeline "640x480"x30.0   11.31  640 641 704 736  480 481 512 513 (15.4 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4941  Serial#: 0
>(II) intel(0): Year: 2008  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 26  vert.: 16
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 69.3 MHz   Image Size:  261 x 163 mm
>(II) intel(0): h_active: 1280  h_sync: 1296  h_sync_end 1344 h_blank_end 1415 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 801  v_sync_end 804 v_blanking: 816 v_border: 0
>(WW) intel(0): Unknown vendor-specific block f
>(II) intel(0):  SAMSUNG
>(II) intel(0):  121AT02-A01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3414900000000
>(II) intel(0): 	00120103801a10780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101121b0087502010301030
>(II) intel(0): 	130005a3100000190000000f00000000
>(II) intel(0): 	00000000002387026400000000fe0053
>(II) intel(0): 	414d53554e470a2020202020000000fe
>(II) intel(0): 	00313231415430322d4130310a200018
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID vendor "SEC", prod id 18753
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000120 to 0x38000120
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000400 to 0x18000400
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000206 to 0x00040000
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000206 to 0x80440000
>(WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000d0 to 0x000c00d0
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00404000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710087
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x6b405140
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x8000085e
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x320c (FBC_COMMAND) changed from 0x00000000 to 0x08c80032
>(WW) intel(0): Register 0x321b (FBC_FENCE_OFF) changed from 0xcd01ed00 to 0xf700f800
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0xa0000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x38000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x18000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x19000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x80440000 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):                 FPB0: 0x00021309 (n = 2, m1 = 19, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98046c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x000c00d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00404000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x08c80032
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xcd01ed00
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 69047 n 2 m1 19 m2 9 p1 3 p2 14
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00063fff: compressed frame buffer (400 kB, 0x000000007c000000 physical
>)
>(II) intel(0): 0x00064000-0x00064fff: power context (4 kB)
>(II) intel(0): 0x03fff000:            end of stolen memory
>(II) intel(0): 0x03fff000-0x0f9fefff: DRI memory manager (190464 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x03fff000:            start of memory manager
>(II) intel(0): 0x04100000-0x0473ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x04020000-0x0402efff: exa G965 state buffer (60 kB)
>(II) intel(0): 0x04030000-0x04037fff: logical 3D context (32 kB)
>(II) intel(0): 0x04038000-0x04041fff: HW cursors (40 kB)
>(II) intel(0): 0x0f9ff000:            end of memory manager
>(WW) intel(0): ESR is 0x00000011, page table error
>(WW) intel(0): PGTBL_ER is 0x00100000, CS instruction GTT PTE
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): using SSC reference clock of 100 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline ""x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): chosen: dotclock 69285 vco 1940000 ((m 97, m1 16, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x1004000c (clock gates disabled: VRHUNIT DSSUNIT OVRUNIT OVCUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x000002c0
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x38000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x18000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x04100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031005 (n = 3, m1 = 16, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x000c00d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00404000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x08c80032
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xf700f800
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): SDVO phase shift 0 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 69285 n 3 m1 16 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output HDMI-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) Mouse0: ps2EnableDataReporting: succeeded
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000120 to 0x38000120
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000400 to 0x18000400
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000206 to 0x00000000
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEASTAT after: status:
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000206 to 0x00400206
>(WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000d0 to 0x000c00d0
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00404000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710087
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x6b405140
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x8000085e
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x320c (FBC_COMMAND) changed from 0x00000000 to 0x08c80032
>(WW) intel(0): Register 0x321b (FBC_FENCE_OFF) changed from 0xcd01ed00 to 0xf700f800
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0xa0000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x38000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x18000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x19000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00021309 (n = 2, m1 = 19, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98046c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x000c00d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00404000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x08c80032
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xcd01ed00
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 69047 n 2 m1 19 m2 9 p1 3 p2 14
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00063fff: compressed frame buffer (400 kB, 0x000000007c000000 physical
>)
>(II) intel(0): 0x00064000-0x00064fff: power context (4 kB)
>(II) intel(0): 0x03fff000:            end of stolen memory
>(II) intel(0): 0x03fff000-0x0f9fefff: DRI memory manager (190464 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x03fff000:            start of memory manager
>(II) intel(0): 0x04100000-0x0473ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x04020000-0x0402efff: exa G965 state buffer (60 kB)
>(II) intel(0): 0x04030000-0x04037fff: logical 3D context (32 kB)
>(II) intel(0): 0x04038000-0x04041fff: HW cursors (40 kB)
>(II) intel(0): 0x0f9ff000:            end of memory manager
>(WW) intel(0): ESR is 0x00000011, page table error
>(WW) intel(0): PGTBL_ER is 0x00100000, CS instruction GTT PTE
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): using SSC reference clock of 100 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline ""x60.0   69.30  1280 1296 1344 1415  800 801 804 816 -hsync -vsync (49.0 kHz)
>(II) intel(0): chosen: dotclock 69285 vco 1940000 ((m 97, m1 16, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0400 (0x0400)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x00e00000 (0x0000)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x000300e0 (0x00e0)
>(II) intel(0):              C0DRA23: 0x001c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x1004000c (clock gates disabled: VRHUNIT DSSUNIT OVRUNIT OVCUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x000002c0
>(II) intel(0):                SDVOB: 0x0000001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00000898 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00000898 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0834
>(II) intel(0):        PP_OFF_DELAYS: 0x015e07d0
>(II) intel(0):           PP_DIVISOR: 0x0056b705
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x08000800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x38000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x18000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x04100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031005 (n = 3, m1 = 16, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x058604ff (1280 active, 1415 total)
>(II) intel(0):             HBLANK_B: 0x058604ff (1280 start, 1415 end)
>(II) intel(0):              HSYNC_B: 0x053f050f (1296 start, 1344 end)
>(II) intel(0):             VTOTAL_B: 0x032f031f (800 active, 816 total)
>(II) intel(0):             VBLANK_B: 0x032f031f (800 start, 816 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x000c00d0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00404000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x08c80032
>(II) intel(0):           FBC_STATUS: 0x00000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0xf700f800
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000018
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x0000001c
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): SDVO phase shift 0 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 69285 n 3 m1 16 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output HDMI-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) Mouse0: ps2EnableDataReporting: succeeded

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Attachments on bug 19174: 21304 | 21307 | 21309

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