Attachment 22108 Details for Bug 19620 – (hopefully) final patch

[patch] (hopefully) final patch

0001-rand12-lock-independent-crtc-base-registers-separat.patch (text/plain), 3.01 KB, created by Stuart Bennett on 2009-01-19 15:47:40 UTC

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Creator: Stuart Bennett

Created: 2009-01-19 15:47:40 UTC

Size: 3.01 KB

patch

obsolete

>From 9f9b3ab7549a81c6a2c9c3e9efd3f684c0fb5165 Mon Sep 17 00:00:00 2001
>From: Stuart Bennett <sb476@cam.ac.uk>
>Date: Mon, 19 Jan 2009 23:02:09 +0000
>Subject: [PATCH] rand12: lock independent crtc base registers separately (#19620)
>
>Surprising nobody noticed it earlier
>---
> src/nv_crtc.c  |    2 ++
> src/nv_hw.c    |   23 ++++++++++++++---------
> src/nv_proto.h |    1 +
> 3 files changed, 17 insertions(+), 9 deletions(-)
>
>diff --git a/src/nv_crtc.c b/src/nv_crtc.c
>index 320b8f9..d410d4b 100644
>--- a/src/nv_crtc.c
>+++ b/src/nv_crtc.c
>@@ -1326,8 +1326,10 @@ static void nv_crtc_load_state_vga(xf86CrtcPtr crtc, RIVA_HW_STATE *state)
> 	for (i = 0; i < 5; i++)
> 		NVWriteVgaSeq(pNv, nv_crtc->head, i, regp->Sequencer[i]);
> 
>+	nv_lock_vga_crtc_base(pNv, nv_crtc->head, false);
> 	for (i = 0; i < 25; i++)
> 		crtc_wr_cio_state(crtc, regp, i);
>+	nv_lock_vga_crtc_base(pNv, nv_crtc->head, true);
> 
> 	for (i = 0; i < 9; i++)
> 		NVWriteVgaGr(pNv, nv_crtc->head, i, regp->Graphics[i]);
>diff --git a/src/nv_hw.c b/src/nv_hw.c
>index 2786e0d..adeed21 100644
>--- a/src/nv_hw.c
>+++ b/src/nv_hw.c
>@@ -278,29 +278,34 @@ bool nv_heads_tied(NVPtr pNv)
> 	return (NVReadVgaCrtc(pNv, 0, NV_CIO_CRE_44) == 0x4);
> }
> 
>-static void NVLockVgaCrtc(NVPtr pNv, int head, bool lock)
>+/* makes cr0-7 on the specified head read-only */
>+bool nv_lock_vga_crtc_base(NVPtr pNv, int head, bool lock)
> {
>-	uint8_t cr11;
>+	uint8_t cr11 = NVReadVgaCrtc(pNv, head, NV_CIO_CR_VRE_INDEX);
>+	bool waslocked = cr11 & 0x80;
> 
>-	NVWriteVgaCrtc(pNv, head, NV_CIO_SR_LOCK_INDEX,
>-		       lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
>-
>-	cr11 = NVReadVgaCrtc(pNv, head, NV_CIO_CR_VRE_INDEX);
> 	if (lock)
> 		cr11 |= 0x80;
> 	else
> 		cr11 &= ~0x80;
> 	NVWriteVgaCrtc(pNv, head, NV_CIO_CR_VRE_INDEX, cr11);
>+
>+	return waslocked;
> }
> 
>+/* renders the extended crtc regs (cr19+) on all crtcs impervious:
>+ * immutable and unreadable
>+ */
> bool NVLockVgaCrtcs(NVPtr pNv, bool lock)
> {
> 	bool waslocked = !NVReadVgaCrtc(pNv, 0, NV_CIO_SR_LOCK_INDEX);
> 
>-	NVLockVgaCrtc(pNv, 0, lock);
>-	/* NV11 has independently lockable crtcs, except when tied */
>+	NVWriteVgaCrtc(pNv, 0, NV_CIO_SR_LOCK_INDEX,
>+		       lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
>+	/* NV11 has independently lockable extended crtcs, except when tied */
> 	if (pNv->NVArch == 0x11 && !(nvReadMC(pNv, NV_PBUS_DEBUG_1) & (1 << 28)))
>-		NVLockVgaCrtc(pNv, 1, lock);
>+		NVWriteVgaCrtc(pNv, 1, NV_CIO_SR_LOCK_INDEX,
>+			       lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
> 
> 	return waslocked;
> }
>diff --git a/src/nv_proto.h b/src/nv_proto.h
>index 3bf075f..fee760c 100644
>--- a/src/nv_proto.h
>+++ b/src/nv_proto.h
>@@ -114,6 +114,7 @@ void NVVgaSeqReset(NVPtr pNv, int head, bool start);
> void NVVgaProtect(NVPtr pNv, int head, bool protect);
> void NVSetOwner(NVPtr pNv, int owner);
> bool nv_heads_tied(NVPtr pNv);
>+bool nv_lock_vga_crtc_base(NVPtr pNv, int head, bool lock);
> bool NVLockVgaCrtcs(NVPtr pNv, bool lock);
> void NVBlankScreen(NVPtr pNv, int head, bool blank);
> void nv_fix_nv40_hw_cursor(NVPtr pNv, int head);
>-- 
>1.5.4.4
>

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