Attachment 26668 Details for Bug 22228 – Xorg.0.log

Xorg.0.log

Xorg.0.log (text/x-log), 63.00 KB, created by Yifei Chen on 2009-06-11 02:27:42 UTC

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Creator: Yifei Chen

Created: 2009-06-11 02:27:42 UTC

Size: 63.00 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.6.1.901 (1.6.2 RC 1)
>Release Date: 2009-5-8
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.18.8-xen x86_64 
>Current Operating System: Linux x-g45b 2.6.30-rc8-KMS #1 SMP Wed Jun 10 18:19:53 CST 2009 x86_64
>Build Date: 10 June 2009  05:54:54PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/opt/X11R7/var/log/Xorg.0.log", Time: Fri Jun 12 00:45:52 2009
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Videocard0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(**) Option "AllowEmptyInput" "false"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(**) FontPath set to:
>	unix/:7100,
>	/opt/X11R7/lib/X11/fonts/misc/,
>	/opt/X11R7/lib/X11/fonts/TTF/,
>	/opt/X11R7/lib/X11/fonts/OTF,
>	/opt/X11R7/lib/X11/fonts/Type1/,
>	/opt/X11R7/lib/X11/fonts/100dpi/,
>	/opt/X11R7/lib/X11/fonts/75dpi/,
>	built-ins
>(**) ModulePath set to "/opt/X11R7/lib/xorg/modules"
>(II) Loader magic: 0xd20
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(--) using VT number 7
>
>(--) PCI:*(0@0:2:0) Intel Corporation unknown chipset (0x2e22) rev 3, Mem @ 0xfe400000/4194304, 0xd0000000/268435456, I/O @ 0x0000cc00/8
>(--) PCI: (0@0:2:1) Intel Corporation unknown chipset (0x2e23) rev 3, Mem @ 0xfe800000/1048576
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded by default.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri2" will be loaded by default.
>(II) LoadModule: "dbe"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "extmod"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "fbdevhw"
>(II) Loading /opt/X11R7/lib/xorg/modules/linux//libfbdevhw.so
>(II) Module fbdevhw: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 0.0.2
>	ABI class: X.Org Video Driver, version 5.0
>(II) LoadModule: "glx"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(WW) Warning, couldn't open module freetype
>(II) UnloadModule: "freetype"
>(EE) Failed to load module "freetype" (module does not exist, 0)
>(II) LoadModule: "type1"
>(WW) Warning, couldn't open module type1
>(II) UnloadModule: "type1"
>(EE) Failed to load module "type1" (module does not exist, 0)
>(II) LoadModule: "dri"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "record"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dri2"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /opt/X11R7/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 2.7.99
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.6.0, module version = 2.2.99
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, IGD_GM, IGD_G, 965G, G35,
>	965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41, IGDNG_D,
>	IGDNG_M
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /opt/X11R7/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenByBusid: drmOpenMinor returns 10
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "on"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) G45/G43
>(--) intel(0): Chipset: "G45/G43"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xFE400000 size 4194304
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(--) intel(0): Using UXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C1DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB3: 0x02020010 (0x0010)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x00000001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80008000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000120
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000206 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0020008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000010
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x0000001c
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000018
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): No SDVO device found on SDVOB
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" removed.
>(II) intel(0): Output HDMI-1 has no monitor section
>(II) intel(0): I2C bus "HDMIDDC_B" initialized.
>(II) intel(0): HDMI output 1 detected
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): Output HDMI-2 has no monitor section
>(II) intel(0): I2C bus "HDMIDDC_C" initialized.
>(II) intel(0): HDMI output 2 detected
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
>(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): EDID for output VGA
>(II) intel(0): Manufacturer: DEL  Model: 3010  Serial#: 1145195083
>(II) intel(0): Year: 2004  Week: 10
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Analog Display Input,  Input Voltage Level: 0.700/0.300 V
>(II) intel(0): Sync:  Separate  Composite  SyncOnGreen
>(II) intel(0): Max Image Size [cm]: horiz.: 34  vert.: 27
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): Default color space is primary color space
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.646 redY: 0.359   greenX: 0.278 greenY: 0.612
>(II) intel(0): blueX: 0.145 blueY: 0.117   whiteX: 0.310 whiteY: 0.330
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) intel(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 108.0 MHz   Image Size:  338 x 270 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1440 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1066 v_border: 0
>(II) intel(0): Serial No: F0848432DBJK
>(II) intel(0): Monitor name: DELL 1703FP
>(II) intel(0): Ranges: V min: 56 V max: 76 Hz, H min: 30 H max: 80 kHz, PixClock max 140 MHz
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0010ac10304b4a4244
>(II) intel(0): 	0a0e01030e221b78ee8706a55c479c25
>(II) intel(0): 	1e4f54a54b00714f8180010101010101
>(II) intel(0): 	010101010101302a009851002a403070
>(II) intel(0): 	1300520e1100001e000000ff00463038
>(II) intel(0): 	343834333244424a4b0a000000fc0044
>(II) intel(0): 	454c4c203137303346500a20000000fd
>(II) intel(0): 	00384c1e500e000a20202020202000b9
>(II) intel(0): EDID vendor "DEL", prod id 12304
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): EDID vendor "DEL", prod id 12304
>(II) intel(0): Printing probed modes for output VGA
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): EDID for output HDMI-1
>(II) intel(0): EDID for output HDMI-2
>(II) intel(0): Output VGA connected
>(II) intel(0): Output HDMI-1 disconnected
>(II) intel(0): Output HDMI-2 disconnected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output VGA using initial mode 1280x1024
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 32764 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(**) intel(0): Display dimensions: (340, 270) mm
>(**) intel(0): DPI set to (152, 192)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /opt/X11R7/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000120 to 0x38000120
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000b00 to 0x00540b00
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 482816 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1931260 kB available
>(II) intel(0): [DRI2] Setup complete
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) UXA(0): Driver registered support for the following operations:
>(II)         solid
>(II)         copy
>(II)         composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x01fff000:            end of stolen memory
>(II) intel(0): 0x01fff000-0x0fffffff: DRI memory manager (229380 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x01fff000:            start of memory manager
>(II) intel(0): 0x02020000-0x0301ffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x03020000-0x03029fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(WW) intel(0): ESR is 0x00000010, page table error
>(WW) intel(0): PGTBL_ER is 0x00100000, CS instruction GTT PTE
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 3240000 ((m 135, m1 23, m2 8), n 2, (p 30, p1 3, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C1DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB3: 0x02020010 (0x0010)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x00000001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x1000000c (clock gates disabled: VRHUNIT OVRUNIT OVCUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x000002c0
>(II) intel(0):                SDVOB: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x3e040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000300
>(II) intel(0):             DSPACNTR: 0xd8000400 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x02020000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):            PIPEASTAT: 0x00000206 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021708 (n = 2, m1 = 23, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x94040c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x069704ff (1280 active, 1688 total)
>(II) intel(0):             HBLANK_A: 0x069704ff (1280 start, 1688 end)
>(II) intel(0):              HSYNC_A: 0x059f052f (1328 start, 1440 end)
>(II) intel(0):             VTOTAL_A: 0x042903ff (1024 active, 1066 total)
>(II) intel(0):             VBLANK_A: 0x042903ff (1024 start, 1066 end)
>(II) intel(0):              VSYNC_A: 0x04030400 (1025 start, 1028 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8020008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000010
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x0000001c
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000018
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 108000 n 2 m1 23 m2 8 p1 3 p2 10
>(II) intel(0): pipe B dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe A
>(II) intel(0):   Output HDMI-1 is connected to pipe none
>(II) intel(0):   Output HDMI-2 is connected to pipe none
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(==) intel(0): Intel XvMC decoder disabled
>(II) intel(0): Set up textured video
>(II) intel(0): direct rendering: DRI2 Enabled
>(WW) intel(0): Option "AccelMethod" is not used
>(WW) intel(0): Option "Atmosphere" is not used
>(--) RandR disabled
>(II) Initializing built-in extension Generic Event Extension
>(II) Initializing built-in extension SHAPE
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension BIG-REQUESTS
>(II) Initializing built-in extension SYNC
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-MISC
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>(II) AIGLX: Loaded and initialized /opt/X11R7/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI2 GL provider for screen 0
>(II) intel(0): Setting screen physical size to 338 x 270
>(II) intel(0): Allocate new frame buffer 1280x1024 stride 1280
>(II) intel(0): New front buffer at 0x3046000
>[dix] Could not init font path element unix/:7100, removing from list!
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Mouse0: Device: "/dev/input/event0"
>(II) Mouse0: Found 3 mouse buttons
>(II) Mouse0: Found x and y relative axes
>(II) Mouse0: Configuring as mouse
>(**) Mouse0: YAxisMapping: buttons 4 and 5
>(**) Mouse0: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(**) Mouse0: (accel) keeping acceleration scheme 1
>(**) Mouse0: (accel) filter chain progression: 2.00
>(**) Mouse0: (accel) filter stage 0: 20.00 ms
>(**) Mouse0: (accel) set acceleration profile 0
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Keyboard0: Device: "/dev/input/event1"
>(II) Keyboard0: Found keys
>(II) Keyboard0: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "evdev"
>(**) Option "xkb_layout" "us"
>(II) config/hal: Adding input device Macintosh mouse button emulation
>(**) Macintosh mouse button emulation: always reports core events
>(**) Macintosh mouse button emulation: Device: "/dev/input/event0"
>(WW) Macintosh mouse button emulation: device file already in use. Ignoring.
>(II) UnloadModule: "evdev"
>(EE) PreInit returned NULL for "Macintosh mouse button emulation"
>(EE) config/hal: NewInputDeviceRequest failed (8)
>(II) config/hal: Adding input device Logitech USB-PS/2 Optical Mouse
>(**) Logitech USB-PS/2 Optical Mouse: always reports core events
>(**) Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event3"
>(II) Logitech USB-PS/2 Optical Mouse: Found 3 mouse buttons
>(II) Logitech USB-PS/2 Optical Mouse: Found x and y relative axes
>(II) Logitech USB-PS/2 Optical Mouse: Found scroll wheel(s)
>(II) Logitech USB-PS/2 Optical Mouse: Configuring as mouse
>(**) Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5
>(**) Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE)
>(**) Logitech USB-PS/2 Optical Mouse: (accel) keeping acceleration scheme 1
>(**) Logitech USB-PS/2 Optical Mouse: (accel) filter chain progression: 2.00
>(**) Logitech USB-PS/2 Optical Mouse: (accel) filter stage 0: 20.00 ms
>(**) Logitech USB-PS/2 Optical Mouse: (accel) set acceleration profile 0
>(II) config/hal: Adding input device ATEN ATEN  CS-1716/08/04
>(**) ATEN ATEN  CS-1716/08/04: always reports core events
>(**) ATEN ATEN  CS-1716/08/04: Device: "/dev/input/event2"
>(II) ATEN ATEN  CS-1716/08/04: Found 5 mouse buttons
>(II) ATEN ATEN  CS-1716/08/04: Found x and y relative axes
>(II) ATEN ATEN  CS-1716/08/04: Found scroll wheel(s)
>(II) ATEN ATEN  CS-1716/08/04: Configuring as mouse
>(**) ATEN ATEN  CS-1716/08/04: YAxisMapping: buttons 4 and 5
>(**) ATEN ATEN  CS-1716/08/04: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "ATEN ATEN  CS-1716/08/04" (type: MOUSE)
>(**) ATEN ATEN  CS-1716/08/04: (accel) keeping acceleration scheme 1
>(**) ATEN ATEN  CS-1716/08/04: (accel) filter chain progression: 2.00
>(**) ATEN ATEN  CS-1716/08/04: (accel) filter stage 0: 20.00 ms
>(**) ATEN ATEN  CS-1716/08/04: (accel) set acceleration profile 0
>(II) config/hal: Adding input device ATEN ATEN  CS-1716/08/04
>(**) ATEN ATEN  CS-1716/08/04: always reports core events
>(**) ATEN ATEN  CS-1716/08/04: Device: "/dev/input/event1"
>(WW) ATEN ATEN  CS-1716/08/04: device file already in use. Ignoring.
>(II) UnloadModule: "evdev"
>(EE) PreInit returned NULL for "ATEN ATEN  CS-1716/08/04"
>(EE) config/hal: NewInputDeviceRequest failed (8)
>(II) Mouse0: Close
>(II) UnloadModule: "evdev"
>(II) Keyboard0: Close
>(II) UnloadModule: "evdev"
>(II) Logitech USB-PS/2 Optical Mouse: Close
>(II) UnloadModule: "evdev"
>(II) ATEN ATEN  CS-1716/08/04: Close
>(II) UnloadModule: "evdev"
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000120 to 0x3e040200
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000b00 to 0x00000300
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000206 to 0x00040100
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE DLINE_COMPARE_STATUS
>(WW) intel(0): Register 0x3000 (FENCE  8) changed from 0x00000000 to 0x0304609d
>(WW) intel(0): FENCE  8 before: (null)
>(WW) intel(0): FENCE  8 after: (null)
>(WW) intel(0): Register 0x3004 (FENCE  9) changed from 0x00000000 to 0x03845000
>(WW) intel(0): FENCE  9 before: (null)
>(WW) intel(0): FENCE  9 after: (null)
>(WW) intel(0): Register 0x3000 (FENCE START 0) changed from 0x00000000 to 0x0304609d
>(WW) intel(0): FENCE START 0 before: disabled, X tile walk,    0 pitch, 0x00000000 start
>(WW) intel(0): FENCE START 0 after:  enabled, X tile walk, 4992 pitch, 0x03046000 start
>(WW) intel(0): Register 0x3004 (FENCE END 0) changed from 0x00000000 to 0x03845000
>(WW) intel(0): FENCE END 0 before:                                    0x00000000 end
>(WW) intel(0): FENCE END 0 after:                                    0x03845000 end
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C1DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C1DRB3: 0x02020010 (0x0010)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x00000001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x0000089c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00000000
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x150f0f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80008000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x0000089c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x3e040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000300
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040100 (status: SVBLANK_INT_ENABLE DLINE_COMPARE_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04020c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0020008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000010
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x0000001c
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x0000001c
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000018
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00050000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x0304609d ( enabled, X tile walk, 4992 pitch, 0x03046000 start)
>(II) intel(0):          FENCE END 0: 0x03845000 (                                   0x03845000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 100800 n 3 m1 17 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd

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Attachments on bug 22228: 26666 | 26667 | 26668

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