Attachment 29345 Details for Bug 23144 – Add 16 and 32 bit RGB formats to textured video. R6xx/R7xx only.

[patch] Add 16 and 32 bit RGB formats to textured video. R6xx/R7xx only.

tex-vid-rgb.diff (text/plain), 13.38 KB, created by Kusanagi Kouichi on 2009-09-08 22:53:21 UTC

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Creator: Kusanagi Kouichi

Created: 2009-09-08 22:53:21 UTC

Size: 13.38 KB

patch

obsolete

>diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
>index b6f7b39..beea19a 100644
>--- a/src/r600_textured_videofuncs.c
>+++ b/src/r600_textured_videofuncs.c
>@@ -165,6 +165,18 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
>     Bool needgamma = FALSE;
>     float ps_alu_consts[12];
>     float vs_alu_consts[4];
>+    Bool is_rgb;
>+
>+    switch(pPriv->id) {
>+    case FOURCC_RGBA32:
>+    case FOURCC_RGB16:
>+    case FOURCC_RGBT16:
>+	is_rgb = TRUE;
>+	break;
>+    default:
>+	is_rgb = FALSE;
>+	break;
>+    }
> 
>     cont = RTFContrast(pPriv->contrast);
>     bright = RTFBrightness(pPriv->brightness);
>@@ -268,14 +280,21 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
> #if defined(XF86DRM_MODE)
>     if (info->cs) {
> 	accel_state->vs_mc_addr = accel_state->xv_vs_offset;
>-	accel_state->ps_mc_addr = accel_state->xv_ps_offset;
>+	if (is_rgb)
>+	    accel_state->ps_mc_addr = accel_state->comp_ps_offset;
>+	else
>+	    accel_state->ps_mc_addr = accel_state->xv_ps_offset;
>     } else
> #endif
>     {
> 	accel_state->vs_mc_addr = info->fbLocation + pScrn->fbOffset + accel_state->shaders->offset +
> 	    accel_state->xv_vs_offset;
>-	accel_state->ps_mc_addr = info->fbLocation + pScrn->fbOffset + accel_state->shaders->offset +
>-	    accel_state->xv_ps_offset;
>+	if (is_rgb)
>+	    accel_state->ps_mc_addr = info->fbLocation + pScrn->fbOffset +
>+		accel_state->shaders->offset + accel_state->comp_ps_offset;
>+	else
>+	    accel_state->ps_mc_addr = info->fbLocation + pScrn->fbOffset +
>+		accel_state->shaders->offset + accel_state->xv_ps_offset;
>     }
> 
>     /* PS bool constant */
>@@ -502,6 +521,67 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
> 	tex_samp.id                 = 1;
> 	set_tex_sampler             (pScrn, accel_state->ib, &tex_samp);
> 	break;
>+    case FOURCC_RGBA32:
>+    case FOURCC_RGB16:
>+    case FOURCC_RGBT16:
>+	accel_state->src_size[0] = accel_state->src_pitch[0] * pPriv->h;
>+
>+	/* flush texture cache */
>+	cp_set_surface_sync(pScrn, accel_state->ib, TC_ACTION_ENA_bit, accel_state->src_size[0],
>+			    accel_state->src_mc_addr[0],
>+			    accel_state->src_bo[0], RADEON_GEM_DOMAIN_VRAM, 0);
>+
>+	/* Y texture */
>+	tex_res.id                  = 0;
>+	tex_res.w                   = pPriv->w;
>+	tex_res.h                   = pPriv->h;
>+	tex_res.depth               = 0;
>+	tex_res.dim                 = SQ_TEX_DIM_2D;
>+	tex_res.base                = accel_state->src_mc_addr[0];
>+	tex_res.mip_base            = accel_state->src_mc_addr[0];
>+	tex_res.bo                  = accel_state->src_bo[0];
>+	tex_res.mip_bo              = accel_state->src_bo[0];
>+
>+	tex_res.dst_sel_x           = SQ_SEL_Z;
>+	tex_res.dst_sel_y           = SQ_SEL_Y;
>+	tex_res.dst_sel_z           = SQ_SEL_X;
>+	tex_res.dst_sel_w           = SQ_SEL_1;
>+	switch(pPriv->id) {
>+	case FOURCC_RGBA32:
>+	    tex_res.pitch               = accel_state->src_pitch[0] >> 2;
>+	    tex_res.format              = FMT_8_8_8_8;
>+	    break;
>+	case FOURCC_RGB16:
>+	    tex_res.pitch               = accel_state->src_pitch[0] >> 1;
>+	    tex_res.format              = FMT_5_6_5;
>+	    break;
>+	case FOURCC_RGBT16:
>+	    tex_res.pitch               = accel_state->src_pitch[0] >> 1;
>+	    tex_res.format              = FMT_1_5_5_5;
>+	    break;
>+	}
>+
>+	tex_res.request_size        = 1;
>+	tex_res.base_level          = 0;
>+	tex_res.last_level          = 0;
>+	tex_res.perf_modulation     = 0;
>+	tex_res.interlaced          = 0;
>+	set_tex_resource            (pScrn, accel_state->ib, &tex_res);
>+
>+	/* Y sampler */
>+	tex_samp.id                 = 0;
>+	tex_samp.clamp_x            = SQ_TEX_CLAMP_LAST_TEXEL;
>+	tex_samp.clamp_y            = SQ_TEX_CLAMP_LAST_TEXEL;
>+	tex_samp.clamp_z            = SQ_TEX_WRAP;
>+
>+	/* xxx: switch to bicubic */
>+	tex_samp.xy_mag_filter      = SQ_TEX_XY_FILTER_BILINEAR;
>+	tex_samp.xy_min_filter      = SQ_TEX_XY_FILTER_BILINEAR;
>+
>+	tex_samp.z_filter           = SQ_TEX_Z_FILTER_NONE;
>+	tex_samp.mip_filter         = 0;			/* no mipmap */
>+	set_tex_sampler             (pScrn, accel_state->ib, &tex_samp);
>+	break;
>     }
> 
>     /* Render setup */
>diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c
>index 932759b..921df04 100644
>--- a/src/radeon_textured_video.c
>+++ b/src/radeon_textured_video.c
>@@ -305,6 +305,10 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
> 	srcPitch = (width << 1);
> 	srcPitch2 = 0;
> 	break;
>+    case FOURCC_RGBA32:
>+	srcPitch = width << 2;
>+	dstPitch = ((dst_width << 2) + hw_align) & ~hw_align;
>+	break;
>     }
> 
>     size = dstPitch * dst_height + 2 * dstPitch2 * ((dst_height + 1) >> 1);
>@@ -316,14 +320,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
>     }
> 
>     if (pPriv->video_memory == NULL) {
>-	if (info->ChipFamily >= CHIP_FAMILY_R600)
>-	    pPriv->video_offset = radeon_legacy_allocate_memory(pScrn,
>-								&pPriv->video_memory,
>-								size * 2, 256);
>-	else
>-	    pPriv->video_offset = radeon_legacy_allocate_memory(pScrn,
>-								&pPriv->video_memory,
>-								size * 2, 64);
>+	pPriv->video_offset = radeon_legacy_allocate_memory(pScrn,
>+							    &pPriv->video_memory,
>+							    size * 2, hw_align + 1);
> 	if (pPriv->video_offset == 0)
> 	    return BadAlloc;
> 
>@@ -439,6 +438,16 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
> 			   pPriv->src_addr + (top * dstPitch),
> 			   srcPitch, dstPitch, nlines, width, 2);
> 	break;
>+    case FOURCC_RGBA32:
>+	if (info->ChipFamily >= CHIP_FAMILY_R600)
>+	    R600CopyData(pScrn, buf + (top * srcPitch),
>+			 pPriv->src_addr + (top * dstPitch),
>+			 srcPitch, dstPitch, nlines, width * 4, 1);
>+	else
>+	    RADEONCopyData(pScrn, buf + (top * srcPitch),
>+			   pPriv->src_addr + (top * dstPitch),
>+			   srcPitch, dstPitch, nlines, width, 4);
>+	break;
>     }
> 
>     /* update cliplist */
>@@ -604,6 +613,17 @@ static XF86ImageRec Images[NUM_IMAGES] =
>     XVIMAGE_UYVY
> };
> 
>+static XF86ImageRec R600Images[] =
>+{
>+        XVIMAGE_RGBA32(LSBFirst),
>+        XVIMAGE_RGB16(LSBFirst),
>+        XVIMAGE_RGBT16(LSBFirst),
>+        XVIMAGE_YUY2,
>+        XVIMAGE_UYVY,
>+        XVIMAGE_YV12,
>+        XVIMAGE_I420
>+};
>+
> int
> RADEONGetTexPortAttribute(ScrnInfoPtr  pScrn,
> 		       Atom	    attribute,
>@@ -780,8 +800,13 @@ RADEONSetupImageTexturedVideo(ScreenPtr pScreen)
> 	adapt->pAttributes = Attributes;
> 	adapt->nAttributes = NUM_ATTRIBUTES;
>     }
>-    adapt->pImages = Images;
>-    adapt->nImages = NUM_IMAGES;
>+    if (IS_R600_3D) {
>+	adapt->pImages = R600Images;
>+	adapt->nImages = RADEON_ARRAY_SIZE(R600Images);
>+    } else {
>+	adapt->pImages = Images;
>+	adapt->nImages = NUM_IMAGES;
>+    }
>     adapt->PutVideo = NULL;
>     adapt->PutStill = NULL;
>     adapt->GetVideo = NULL;
>diff --git a/src/radeon_video.c b/src/radeon_video.c
>index f1fe72b..a7cb88f 100644
>--- a/src/radeon_video.c
>+++ b/src/radeon_video.c
>@@ -431,84 +431,6 @@ static XF86AttributeRec Attributes[NUM_DEC_ATTRIBUTES+1] =
> 
> #define NUM_IMAGES 8
> 
>-/* Note: GUIDs are bogus... - but nothing uses them anyway */
>-
>-#define FOURCC_RGBA32   0x41424752
>-
>-#define XVIMAGE_RGBA32(byte_order)   \
>-        { \
>-                FOURCC_RGBA32, \
>-                XvRGB, \
>-                byte_order, \
>-                { 'R', 'G', 'B', 'A', \
>-                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>-                32, \
>-                XvPacked, \
>-                1, \
>-                32, 0x00FF0000, 0x0000FF00, 0x000000FF, \
>-                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>-                {'A', 'R', 'G', 'B', \
>-                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>-                XvTopToBottom \
>-        }               
>-
>-#define FOURCC_RGB24    0x00000000
>-
>-#define XVIMAGE_RGB24   \
>-        { \
>-                FOURCC_RGB24, \
>-                XvRGB, \
>-                LSBFirst, \
>-                { 'R', 'G', 'B', 0, \
>-                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>-                24, \
>-                XvPacked, \
>-                1, \
>-                24, 0x00FF0000, 0x0000FF00, 0x000000FF, \
>-                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>-                { 'R', 'G', 'B', \
>-                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>-                XvTopToBottom \
>-        }
>-
>-#define FOURCC_RGBT16   0x54424752
>-
>-#define XVIMAGE_RGBT16(byte_order)   \
>-        { \
>-                FOURCC_RGBT16, \
>-                XvRGB, \
>-                byte_order, \
>-                { 'R', 'G', 'B', 'T', \
>-                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>-                16, \
>-                XvPacked, \
>-                1, \
>-                16, 0x00007C00, 0x000003E0, 0x0000001F, \
>-                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>-                {'A', 'R', 'G', 'B', \
>-                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>-                XvTopToBottom \
>-        }               
>-
>-#define FOURCC_RGB16    0x32424752
>-
>-#define XVIMAGE_RGB16(byte_order)   \
>-        { \
>-                FOURCC_RGB16, \
>-                XvRGB, \
>-                byte_order, \
>-                { 'R', 'G', 'B', 0x00, \
>-                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>-                16, \
>-                XvPacked, \
>-                1, \
>-                16, 0x0000F800, 0x000007E0, 0x0000001F, \
>-                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>-                {'R', 'G', 'B', \
>-                  0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>-                XvTopToBottom \
>-        }               
>-
> static XF86ImageRec Images[NUM_IMAGES] =
> {
> #if X_BYTE_ORDER == X_BIG_ENDIAN
>@@ -3070,17 +2992,23 @@ RADEONQueryImageAttributes(
>     unsigned short *w, unsigned short *h,
>     int *pitches, int *offsets
> ){
>-    int size, tmp;
>+    RADEONInfoPtr info = RADEONPTR(pScrn);
>+    int max, size, tmp;
>+
>+    if (IS_R600_3D)
>+	max = 8192;
>+    else
>+	max = 2048;
> 
>-    if(*w > 2048) *w = 2048;
>-    if(*h > 2048) *h = 2048;
>+    if(*w > max) *w = max;
>+    if(*h > max) *h = max;
> 
>-    *w = (*w + 1) & ~1;
>     if(offsets) offsets[0] = 0;
> 
>     switch(id) {
>     case FOURCC_YV12:
>     case FOURCC_I420:
>+	*w = (*w + 1) & ~1;
> 	*h = (*h + 1) & ~1;
> 	size = (*w + 3) & ~3;
> 	if(pitches) pitches[0] = size;
>@@ -3103,10 +3031,11 @@ RADEONQueryImageAttributes(
> 	if(pitches) pitches[0] = size;
> 	size *= *h;
> 	break;
>-    case FOURCC_RGBT16:
>-    case FOURCC_RGB16:
>     case FOURCC_UYVY:
>     case FOURCC_YUY2:
>+	*w = (*w + 1) & ~1;
>+    case FOURCC_RGBT16:
>+    case FOURCC_RGB16:
>     default:
> 	size = *w << 1;
> 	if(pitches) pitches[0] = size;
>diff --git a/src/radeon_video.h b/src/radeon_video.h
>index 989942c..b6adca2 100644
>--- a/src/radeon_video.h
>+++ b/src/radeon_video.h
>@@ -140,6 +140,84 @@ typedef struct tagREF_TRANSFORM
> #define RTFContrast(a)   (1.0 + ((a)*1.0)/1000.0)
> #define RTFHue(a)   (((a)*3.1416)/1000.0)
> 
>+/* Note: GUIDs are bogus... - but nothing uses them anyway */
>+
>+#define FOURCC_RGBA32   0x41424752
>+
>+#define XVIMAGE_RGBA32(byte_order)   \
>+        { \
>+                FOURCC_RGBA32, \
>+                XvRGB, \
>+                byte_order, \
>+                { 'R', 'G', 'B', 'A', \
>+                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>+                32, \
>+                XvPacked, \
>+                1, \
>+                32, 0x00FF0000, 0x0000FF00, 0x000000FF, \
>+                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>+                {'A', 'R', 'G', 'B', \
>+                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>+                XvTopToBottom \
>+        }               
>+
>+#define FOURCC_RGB24    0x00000000
>+
>+#define XVIMAGE_RGB24   \
>+        { \
>+                FOURCC_RGB24, \
>+                XvRGB, \
>+                LSBFirst, \
>+                { 'R', 'G', 'B', 0, \
>+                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>+                24, \
>+                XvPacked, \
>+                1, \
>+                24, 0x00FF0000, 0x0000FF00, 0x000000FF, \
>+                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>+                { 'R', 'G', 'B', \
>+                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>+                XvTopToBottom \
>+        }
>+
>+#define FOURCC_RGBT16   0x54424752
>+
>+#define XVIMAGE_RGBT16(byte_order)   \
>+        { \
>+                FOURCC_RGBT16, \
>+                XvRGB, \
>+                byte_order, \
>+                { 'R', 'G', 'B', 'T', \
>+                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>+                16, \
>+                XvPacked, \
>+                1, \
>+                16, 0x00007C00, 0x000003E0, 0x0000001F, \
>+                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>+                {'A', 'R', 'G', 'B', \
>+                  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>+                XvTopToBottom \
>+        }               
>+
>+#define FOURCC_RGB16    0x32424752
>+
>+#define XVIMAGE_RGB16(byte_order)   \
>+        { \
>+                FOURCC_RGB16, \
>+                XvRGB, \
>+                byte_order, \
>+                { 'R', 'G', 'B', 0x00, \
>+                  0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
>+                16, \
>+                XvPacked, \
>+                1, \
>+                16, 0x0000F800, 0x000007E0, 0x0000001F, \
>+                0, 0, 0, 0, 0, 0, 0, 0, 0, \
>+                {'R', 'G', 'B', \
>+                  0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
>+                XvTopToBottom \
>+        }               
>+
> xf86CrtcPtr
> radeon_xv_pick_best_crtc(ScrnInfoPtr pScrn,
> 			 int x1, int x2, int y1, int y2);

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