Attachment 29384 Details for Bug 23785 – Output of RADEON_DEBUG=all last 3000 lines

Output of RADEON_DEBUG=all last 3000 lines

nwn_all4.log (text/x-log), 124.71 KB, created by Krzysztof A. Sobiecki on 2009-09-10 08:08:37 UTC

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Creator: Krzysztof A. Sobiecki

Created: 2009-09-10 08:08:37 UTC

Size: 124.71 KB

patch

obsolete

>radeonEmitVec12 count 4 stride 12 out 0xe348c0a0 data 0x1212b7d0
>radeonAllocDmaRegion 48
>radeonEmitVec12 count 4 stride 12 out 0xe348c0e0 data 0x121311a0
>BEGIN_BATCH(4) at 3271, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 3275, from cp_wait:185
>BEGIN_BATCH(2) at 3276, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 3278, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 3279, from radeon_emit_atom:1038
>  emit vir[0] 2/9
>BEGIN_BATCH(2) at 3283, from radeon_emit_atom:1038
>  emit vir[1] 2/9
>BEGIN_BATCH(2) at 3285, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 3287, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 3290, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 3293, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 3297, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 3299, from radeon_emit_atom:1038
>  emit ri 2/17
>BEGIN_BATCH(2) at 3302, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 3304, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 3306, from radeon_emit_atom:1038
>  emit r500fp 25/3073
>BEGIN_BATCH(25) at 3315, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 3340, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 165/1025
>BEGIN_BATCH(165) at 3349, from radeon_emit_atom:1038
>  emit vpp 93/1025
>BEGIN_BATCH(93) at 3514, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>r300EmitAOS: nr=2, ofs=0x00000000
>BEGIN_BATCH(10) at 3607, from r300EmitAOS:229
>BEGIN_BATCH(10) at 3613, from r300FireEB:182
>BEGIN_BATCH(4) at 3621, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-3) cs ending at 3625
>r300Enable( GL_CULL_FACE = GL_FALSE )
>r300Enable( GL_COLOR_ARRAY = GL_TRUE )
>r300Enable( GL_CULL_FACE = GL_TRUE )
>r300Enable( GL_COLOR_ARRAY = GL_FALSE )
>r300Enable( GL_COLOR_MATERIAL = GL_FALSE )
>r300Clear
>BEGIN_BATCH(31) at 3625, from r300EmitClearState:301
>BEGIN_BATCH(2) at 3656, from r300EmitClearState:377
>BEGIN_BATCH(2) at 3658, from r300EmitClearState:382
>BEGIN_BATCH(14) at 3660, from r300EmitClearState:409
>BEGIN_BATCH(7) at 3674, from r300EmitClearState:460
>BEGIN_BATCH(7) at 3681, from r300EmitClearState:514
>BEGIN_BATCH(2) at 3688, from r300EmitClearState:521
>BEGIN_BATCH(2) at 3690, from r300EmitClearState:554
>BEGIN_BATCH(4) at 3692, from r300EmitClearState:565
>BEGIN_BATCH(9) at 3696, from r300EmitClearState:612
>r300ClearBuffer: buffer (nil) (0,0 1680x1050)
>BEGIN_BATCH(1) at 3705, from cp_wait:185
>BEGIN_BATCH(1) at 3706, from end_3d:162
>BEGIN_BATCH(6) at 3707, from r300ClearBuffer:179
>BEGIN_BATCH(6) at 3711, from r300ClearBuffer:190
>BEGIN_BATCH(9) at 3717, from r300ClearBuffer:237
>BEGIN_BATCH(4) at 3726, from r300EmitCacheFlush:131
>BEGIN_BATCH(1) at 3730, from cp_wait:185
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_LIGHTING = GL_FALSE )
>r300Enable( GL_BLEND = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_LIGHTING = GL_TRUE )
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_LIGHTING = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_BLEND = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_LIGHTING = GL_TRUE )
>r300Clear
>BEGIN_BATCH(31) at 3731, from r300EmitClearState:301
>BEGIN_BATCH(2) at 3762, from r300EmitClearState:377
>BEGIN_BATCH(2) at 3764, from r300EmitClearState:382
>BEGIN_BATCH(14) at 3766, from r300EmitClearState:409
>BEGIN_BATCH(7) at 3780, from r300EmitClearState:460
>BEGIN_BATCH(7) at 3787, from r300EmitClearState:514
>BEGIN_BATCH(2) at 3794, from r300EmitClearState:521
>BEGIN_BATCH(2) at 3796, from r300EmitClearState:554
>BEGIN_BATCH(4) at 3798, from r300EmitClearState:565
>BEGIN_BATCH(9) at 3802, from r300EmitClearState:612
>r300ClearBuffer: buffer (nil) (0,0 1680x1050)
>BEGIN_BATCH(1) at 3811, from cp_wait:185
>BEGIN_BATCH(1) at 3812, from end_3d:162
>BEGIN_BATCH(6) at 3813, from r300ClearBuffer:179
>BEGIN_BATCH(6) at 3817, from r300ClearBuffer:190
>BEGIN_BATCH(9) at 3823, from r300ClearBuffer:237
>BEGIN_BATCH(4) at 3832, from r300EmitCacheFlush:131
>BEGIN_BATCH(1) at 3836, from cp_wait:185
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_LIGHTING = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_TRUE )
>r300Clear
>BEGIN_BATCH(31) at 3837, from r300EmitClearState:301
>BEGIN_BATCH(2) at 3868, from r300EmitClearState:377
>BEGIN_BATCH(2) at 3870, from r300EmitClearState:382
>BEGIN_BATCH(14) at 3872, from r300EmitClearState:409
>BEGIN_BATCH(7) at 3886, from r300EmitClearState:460
>BEGIN_BATCH(7) at 3893, from r300EmitClearState:514
>BEGIN_BATCH(2) at 3900, from r300EmitClearState:521
>BEGIN_BATCH(2) at 3902, from r300EmitClearState:554
>BEGIN_BATCH(4) at 3904, from r300EmitClearState:565
>BEGIN_BATCH(9) at 3908, from r300EmitClearState:612
>r300ClearBuffer: buffer (nil) (0,0 1680x1050)
>BEGIN_BATCH(1) at 3917, from cp_wait:185
>BEGIN_BATCH(1) at 3918, from end_3d:162
>BEGIN_BATCH(6) at 3919, from r300ClearBuffer:179
>BEGIN_BATCH(6) at 3923, from r300ClearBuffer:190
>BEGIN_BATCH(9) at 3929, from r300ClearBuffer:237
>BEGIN_BATCH(4) at 3938, from r300EmitCacheFlush:131
>BEGIN_BATCH(1) at 3942, from cp_wait:185
>r300Enable( GL_NORMAL_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_NORMAL_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300Enable( GL_COLOR_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_LIGHTING = GL_TRUE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_COLOR_ARRAY = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_TRUE )
>r300Enable( GL_LIGHT3 = GL_TRUE )
>r300Enable( GL_LIGHT4 = GL_TRUE )
>r300Enable( GL_LIGHT5 = GL_TRUE )
>r300Enable( GL_LIGHT6 = GL_TRUE )
>r300Enable( GL_LIGHT7 = GL_TRUE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>r300TryDrawPrims: 1 (0-23) cs begin at 3943
>Initial vertex program:
># Vertex Program/Shader
>  0: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  1: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  2: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  3: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  4: DP3 TEMP[0].x, INPUT[2], STATE[4];
>  5: DP3 TEMP[0].y, INPUT[2], STATE[5];
>  6: DP3 TEMP[0].z, INPUT[2], STATE[6];
>  7: MOV TEMP[3], STATE[7];
>  8: MOV OUTPUT[1], TEMP[3];
>  9: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 10: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 11: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 12: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 13: SUB TEMP[6], STATE[8], TEMP[4];
> 14: DP3 TEMP[5], TEMP[6], TEMP[6];
> 15: RSQ TEMP[5], TEMP[5];
> 16: MUL TEMP[6], TEMP[6], TEMP[5];
> 17: RCP TEMP[5].yz, TEMP[5];
> 18: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 19: DP3 TEMP[5], STATE[13], TEMP[5];
> 20: RCP TEMP[7], TEMP[5];
> 21: DP3 TEMP[2], TEMP[0], TEMP[6];
> 22: LIT TEMP[1], TEMP[2];
> 23: MUL TEMP[1], TEMP[1], TEMP[7];
> 24: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 25: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 27: SUB TEMP[6], STATE[17], TEMP[4];
> 28: DP3 TEMP[5], TEMP[6], TEMP[6];
> 29: RSQ TEMP[5], TEMP[5];
> 30: MUL TEMP[6], TEMP[6], TEMP[5];
> 31: RCP TEMP[5].yz, TEMP[5];
> 32: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 33: DP3 TEMP[5], STATE[18], TEMP[5];
> 34: RCP TEMP[7], TEMP[5];
> 35: DP3 TEMP[2], TEMP[0], TEMP[6];
> 36: LIT TEMP[1], TEMP[2];
> 37: MUL TEMP[1], TEMP[1], TEMP[7];
> 38: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 39: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 41: SUB TEMP[6], STATE[22], TEMP[4];
> 42: DP3 TEMP[5], TEMP[6], TEMP[6];
> 43: RSQ TEMP[5], TEMP[5];
> 44: MUL TEMP[6], TEMP[6], TEMP[5];
> 45: RCP TEMP[5].yz, TEMP[5];
> 46: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 47: DP3 TEMP[5], STATE[23], TEMP[5];
> 48: RCP TEMP[7], TEMP[5];
> 49: DP3 TEMP[2], TEMP[0], TEMP[6];
> 50: LIT TEMP[1], TEMP[2];
> 51: MUL TEMP[1], TEMP[1], TEMP[7];
> 52: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 53: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 55: SUB TEMP[6], STATE[27], TEMP[4];
> 56: DP3 TEMP[5], TEMP[6], TEMP[6];
> 57: RSQ TEMP[5], TEMP[5];
> 58: MUL TEMP[6], TEMP[6], TEMP[5];
> 59: RCP TEMP[5].yz, TEMP[5];
> 60: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 61: DP3 TEMP[5], STATE[28], TEMP[5];
> 62: RCP TEMP[7], TEMP[5];
> 63: DP3 TEMP[2], TEMP[0], TEMP[6];
> 64: LIT TEMP[1], TEMP[2];
> 65: MUL TEMP[1], TEMP[1], TEMP[7];
> 66: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 67: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 69: SUB TEMP[6], STATE[32], TEMP[4];
> 70: DP3 TEMP[5], TEMP[6], TEMP[6];
> 71: RSQ TEMP[5], TEMP[5];
> 72: MUL TEMP[6], TEMP[6], TEMP[5];
> 73: RCP TEMP[5].yz, TEMP[5];
> 74: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 75: DP3 TEMP[5], STATE[33], TEMP[5];
> 76: RCP TEMP[7], TEMP[5];
> 77: DP3 TEMP[2], TEMP[0], TEMP[6];
> 78: LIT TEMP[1], TEMP[2];
> 79: MUL TEMP[1], TEMP[1], TEMP[7];
> 80: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 81: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 83: SUB TEMP[6], STATE[37], TEMP[4];
> 84: DP3 TEMP[5], TEMP[6], TEMP[6];
> 85: RSQ TEMP[5], TEMP[5];
> 86: MUL TEMP[6], TEMP[6], TEMP[5];
> 87: RCP TEMP[5].yz, TEMP[5];
> 88: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 89: DP3 TEMP[5], STATE[38], TEMP[5];
> 90: RCP TEMP[7], TEMP[5];
> 91: DP3 TEMP[2], TEMP[0], TEMP[6];
> 92: LIT TEMP[1], TEMP[2];
> 93: MUL TEMP[1], TEMP[1], TEMP[7];
> 94: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 95: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 97: SUB TEMP[6], STATE[42], TEMP[4];
> 98: DP3 TEMP[5], TEMP[6], TEMP[6];
> 99: RSQ TEMP[5], TEMP[5];
>100: MUL TEMP[6], TEMP[6], TEMP[5];
>101: RCP TEMP[5].yz, TEMP[5];
>102: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>103: DP3 TEMP[5], STATE[43], TEMP[5];
>104: RCP TEMP[7], TEMP[5];
>105: DP3 TEMP[2], TEMP[0], TEMP[6];
>106: LIT TEMP[1], TEMP[2];
>107: MUL TEMP[1], TEMP[1], TEMP[7];
>108: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>109: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>110: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>111: ABS OUTPUT[3].x, TEMP[4].zzzz;
>112: MOV OUTPUT[3].yzw, CONST[47];
>113: DP3 TEMP[2].x, TEMP[4], TEMP[4];
>114: RSQ TEMP[2].x, TEMP[2];
>115: MUL TEMP[1], TEMP[4], TEMP[2].xxxx;
>116: DP3 TEMP[2], TEMP[0], TEMP[1];
>117: ADD TEMP[2], TEMP[2], TEMP[2];
>118: MAD TEMP[3], TEMP[2].-x-y-z-w, TEMP[0], TEMP[1];
>119: ADD TEMP[2], TEMP[3], CONST[47].xywz;
>120: DP3 TEMP[2], TEMP[2], TEMP[2];
>121: RSQ TEMP[2], TEMP[2];
>122: MUL TEMP[5], TEMP[2], CONST[48];
>123: MAD OUTPUT[4].xy, TEMP[3], TEMP[5], CONST[48];
>124: MOV OUTPUT[4].zw, INPUT[8];
>125: END
>Vertex program after native rewrite:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[3], STATE[7];
>  9: MOV OUTPUT[1], TEMP[3];
> 10: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 13: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 14: ADD TEMP[6], STATE[8], TEMP[4].-x-y-z-w;
> 15: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 16: RSQ TEMP[5], TEMP[5];
> 17: MUL TEMP[6], TEMP[6], TEMP[5];
> 18: RCP TEMP[5].yz, TEMP[5];
> 19: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 20: DP4 TEMP[5], STATE[13].xyz0, TEMP[5].xyz0;
> 21: RCP TEMP[7], TEMP[5];
> 22: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 23: LIT TEMP[1], TEMP[2];
> 24: MUL TEMP[1], TEMP[1], TEMP[7];
> 25: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 27: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 28: ADD TEMP[6], STATE[17], TEMP[4].-x-y-z-w;
> 29: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 30: RSQ TEMP[5], TEMP[5];
> 31: MUL TEMP[6], TEMP[6], TEMP[5];
> 32: RCP TEMP[5].yz, TEMP[5];
> 33: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 34: DP4 TEMP[5], STATE[18].xyz0, TEMP[5].xyz0;
> 35: RCP TEMP[7], TEMP[5];
> 36: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 37: LIT TEMP[1], TEMP[2];
> 38: MUL TEMP[1], TEMP[1], TEMP[7];
> 39: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 41: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 42: ADD TEMP[6], STATE[22], TEMP[4].-x-y-z-w;
> 43: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 44: RSQ TEMP[5], TEMP[5];
> 45: MUL TEMP[6], TEMP[6], TEMP[5];
> 46: RCP TEMP[5].yz, TEMP[5];
> 47: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 48: DP4 TEMP[5], STATE[23].xyz0, TEMP[5].xyz0;
> 49: RCP TEMP[7], TEMP[5];
> 50: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 51: LIT TEMP[1], TEMP[2];
> 52: MUL TEMP[1], TEMP[1], TEMP[7];
> 53: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 55: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 56: ADD TEMP[6], STATE[27], TEMP[4].-x-y-z-w;
> 57: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 58: RSQ TEMP[5], TEMP[5];
> 59: MUL TEMP[6], TEMP[6], TEMP[5];
> 60: RCP TEMP[5].yz, TEMP[5];
> 61: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 62: DP4 TEMP[5], STATE[28].xyz0, TEMP[5].xyz0;
> 63: RCP TEMP[7], TEMP[5];
> 64: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 65: LIT TEMP[1], TEMP[2];
> 66: MUL TEMP[1], TEMP[1], TEMP[7];
> 67: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 69: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 70: ADD TEMP[6], STATE[32], TEMP[4].-x-y-z-w;
> 71: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 72: RSQ TEMP[5], TEMP[5];
> 73: MUL TEMP[6], TEMP[6], TEMP[5];
> 74: RCP TEMP[5].yz, TEMP[5];
> 75: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 76: DP4 TEMP[5], STATE[33].xyz0, TEMP[5].xyz0;
> 77: RCP TEMP[7], TEMP[5];
> 78: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 79: LIT TEMP[1], TEMP[2];
> 80: MUL TEMP[1], TEMP[1], TEMP[7];
> 81: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 83: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 84: ADD TEMP[6], STATE[37], TEMP[4].-x-y-z-w;
> 85: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 86: RSQ TEMP[5], TEMP[5];
> 87: MUL TEMP[6], TEMP[6], TEMP[5];
> 88: RCP TEMP[5].yz, TEMP[5];
> 89: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 90: DP4 TEMP[5], STATE[38].xyz0, TEMP[5].xyz0;
> 91: RCP TEMP[7], TEMP[5];
> 92: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 93: LIT TEMP[1], TEMP[2];
> 94: MUL TEMP[1], TEMP[1], TEMP[7];
> 95: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 97: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 98: ADD TEMP[6], STATE[42], TEMP[4].-x-y-z-w;
> 99: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
>100: RSQ TEMP[5], TEMP[5];
>101: MUL TEMP[6], TEMP[6], TEMP[5];
>102: RCP TEMP[5].yz, TEMP[5];
>103: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>104: DP4 TEMP[5], STATE[43].xyz0, TEMP[5].xyz0;
>105: RCP TEMP[7], TEMP[5];
>106: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
>107: LIT TEMP[1], TEMP[2];
>108: MUL TEMP[1], TEMP[1], TEMP[7];
>109: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>110: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>111: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>112: MAX OUTPUT[5].x, TEMP[4].zzzz, TEMP[4].-z-z-z-z;
>113: MOV OUTPUT[5]., CONST[47];
>114: DP4 TEMP[2].x, TEMP[4].xyz0, TEMP[4].xyz0;
>115: RSQ TEMP[2].x, TEMP[2];
>116: MUL TEMP[1], TEMP[4], TEMP[2].xxxx;
>117: DP4 TEMP[2], TEMP[0].xyz0, TEMP[1].xyz0;
>118: ADD TEMP[2], TEMP[2], TEMP[2];
>119: MAD TEMP[3], TEMP[2].-x-y-z-w, TEMP[0], TEMP[1];
>120: ADD TEMP[2], TEMP[3], CONST[47].xywz;
>121: DP4 TEMP[2], TEMP[2].xyz0, TEMP[2].xyz0;
>122: RSQ TEMP[2], TEMP[2];
>123: MUL TEMP[5], TEMP[2], CONST[48];
>124: MAD OUTPUT[4].xy, TEMP[3], TEMP[5], CONST[48];
>125: MOV OUTPUT[4].zw, INPUT[8];
>Vertex program after source conflict resolve:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[3], STATE[7];
>  9: MOV OUTPUT[1], TEMP[3];
> 10: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 13: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 14: ADD TEMP[6], STATE[8], TEMP[4].-x-y-z-w;
> 15: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 16: RSQ TEMP[5], TEMP[5];
> 17: MUL TEMP[6], TEMP[6], TEMP[5];
> 18: RCP TEMP[5].yz, TEMP[5];
> 19: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 20: DP4 TEMP[5], STATE[13].xyz0, TEMP[5].xyz0;
> 21: RCP TEMP[7], TEMP[5];
> 22: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 23: LIT TEMP[1], TEMP[2];
> 24: MUL TEMP[1], TEMP[1], TEMP[7];
> 25: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 27: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 28: ADD TEMP[6], STATE[17], TEMP[4].-x-y-z-w;
> 29: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 30: RSQ TEMP[5], TEMP[5];
> 31: MUL TEMP[6], TEMP[6], TEMP[5];
> 32: RCP TEMP[5].yz, TEMP[5];
> 33: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 34: DP4 TEMP[5], STATE[18].xyz0, TEMP[5].xyz0;
> 35: RCP TEMP[7], TEMP[5];
> 36: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 37: LIT TEMP[1], TEMP[2];
> 38: MUL TEMP[1], TEMP[1], TEMP[7];
> 39: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 41: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 42: ADD TEMP[6], STATE[22], TEMP[4].-x-y-z-w;
> 43: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 44: RSQ TEMP[5], TEMP[5];
> 45: MUL TEMP[6], TEMP[6], TEMP[5];
> 46: RCP TEMP[5].yz, TEMP[5];
> 47: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 48: DP4 TEMP[5], STATE[23].xyz0, TEMP[5].xyz0;
> 49: RCP TEMP[7], TEMP[5];
> 50: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 51: LIT TEMP[1], TEMP[2];
> 52: MUL TEMP[1], TEMP[1], TEMP[7];
> 53: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 55: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 56: ADD TEMP[6], STATE[27], TEMP[4].-x-y-z-w;
> 57: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 58: RSQ TEMP[5], TEMP[5];
> 59: MUL TEMP[6], TEMP[6], TEMP[5];
> 60: RCP TEMP[5].yz, TEMP[5];
> 61: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 62: DP4 TEMP[5], STATE[28].xyz0, TEMP[5].xyz0;
> 63: RCP TEMP[7], TEMP[5];
> 64: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 65: LIT TEMP[1], TEMP[2];
> 66: MUL TEMP[1], TEMP[1], TEMP[7];
> 67: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 69: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 70: ADD TEMP[6], STATE[32], TEMP[4].-x-y-z-w;
> 71: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 72: RSQ TEMP[5], TEMP[5];
> 73: MUL TEMP[6], TEMP[6], TEMP[5];
> 74: RCP TEMP[5].yz, TEMP[5];
> 75: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 76: DP4 TEMP[5], STATE[33].xyz0, TEMP[5].xyz0;
> 77: RCP TEMP[7], TEMP[5];
> 78: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 79: LIT TEMP[1], TEMP[2];
> 80: MUL TEMP[1], TEMP[1], TEMP[7];
> 81: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 83: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 84: ADD TEMP[6], STATE[37], TEMP[4].-x-y-z-w;
> 85: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 86: RSQ TEMP[5], TEMP[5];
> 87: MUL TEMP[6], TEMP[6], TEMP[5];
> 88: RCP TEMP[5].yz, TEMP[5];
> 89: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 90: DP4 TEMP[5], STATE[38].xyz0, TEMP[5].xyz0;
> 91: RCP TEMP[7], TEMP[5];
> 92: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 93: LIT TEMP[1], TEMP[2];
> 94: MUL TEMP[1], TEMP[1], TEMP[7];
> 95: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 97: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 98: ADD TEMP[6], STATE[42], TEMP[4].-x-y-z-w;
> 99: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
>100: RSQ TEMP[5], TEMP[5];
>101: MUL TEMP[6], TEMP[6], TEMP[5];
>102: RCP TEMP[5].yz, TEMP[5];
>103: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>104: DP4 TEMP[5], STATE[43].xyz0, TEMP[5].xyz0;
>105: RCP TEMP[7], TEMP[5];
>106: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
>107: LIT TEMP[1], TEMP[2];
>108: MUL TEMP[1], TEMP[1], TEMP[7];
>109: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>110: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>111: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>112: MAX OUTPUT[5].x, TEMP[4].zzzz, TEMP[4].-z-z-z-z;
>113: MOV OUTPUT[5]., CONST[47];
>114: DP4 TEMP[2].x, TEMP[4].xyz0, TEMP[4].xyz0;
>115: RSQ TEMP[2].x, TEMP[2];
>116: MUL TEMP[1], TEMP[4], TEMP[2].xxxx;
>117: DP4 TEMP[2], TEMP[0].xyz0, TEMP[1].xyz0;
>118: ADD TEMP[2], TEMP[2], TEMP[2];
>119: MAD TEMP[3], TEMP[2].-x-y-z-w, TEMP[0], TEMP[1];
>120: ADD TEMP[2], TEMP[3], CONST[47].xywz;
>121: DP4 TEMP[2], TEMP[2].xyz0, TEMP[2].xyz0;
>122: RSQ TEMP[2], TEMP[2];
>123: MUL TEMP[5], TEMP[2], CONST[48];
>124: MAD OUTPUT[4].xy, TEMP[3], TEMP[5], CONST[48];
>125: MOV OUTPUT[4].zw, INPUT[8];
>Vertex program after NQSSADCE:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[1], STATE[7];
>  9: MOV OUTPUT[1].w, TEMP[1].???w;
> 10: DP4 TEMP[2].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[2].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[2].z, INPUT[0], STATE[11];
> 13: ADD TEMP[3].xyz, STATE[8].xyz?, TEMP[2].-x-y-z-?;
> 14: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 15: RSQ TEMP[4].xyz, TEMP[4].x???;
> 16: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 17: RCP TEMP[4].yz, TEMP[4].x???;
> 18: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 19: DP4 TEMP[4].x, STATE[13].xyz0, TEMP[4].xyz0;
> 20: RCP TEMP[4].xyz, TEMP[4].x???;
> 21: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 22: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 23: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 24: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[14].xyz?, TEMP[1].xyz?;
> 25: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[15].xyz?, TEMP[1].xyz?;
> 26: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[16].xyz?, TEMP[1].xyz?;
> 27: ADD TEMP[3].xyz, STATE[17].xyz?, TEMP[2].-x-y-z-?;
> 28: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 29: RSQ TEMP[4].xyz, TEMP[4].x???;
> 30: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 31: RCP TEMP[4].yz, TEMP[4].x???;
> 32: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 33: DP4 TEMP[4].x, STATE[18].xyz0, TEMP[4].xyz0;
> 34: RCP TEMP[4].xyz, TEMP[4].x???;
> 35: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 36: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 37: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 38: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[19].xyz?, TEMP[1].xyz?;
> 39: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[20].xyz?, TEMP[1].xyz?;
> 40: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[21].xyz?, TEMP[1].xyz?;
> 41: ADD TEMP[3].xyz, STATE[22].xyz?, TEMP[2].-x-y-z-?;
> 42: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 43: RSQ TEMP[4].xyz, TEMP[4].x???;
> 44: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 45: RCP TEMP[4].yz, TEMP[4].x???;
> 46: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 47: DP4 TEMP[4].x, STATE[23].xyz0, TEMP[4].xyz0;
> 48: RCP TEMP[4].xyz, TEMP[4].x???;
> 49: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 50: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 51: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 52: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[24].xyz?, TEMP[1].xyz?;
> 53: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[25].xyz?, TEMP[1].xyz?;
> 54: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[26].xyz?, TEMP[1].xyz?;
> 55: ADD TEMP[3].xyz, STATE[27].xyz?, TEMP[2].-x-y-z-?;
> 56: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 57: RSQ TEMP[4].xyz, TEMP[4].x???;
> 58: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 59: RCP TEMP[4].yz, TEMP[4].x???;
> 60: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 61: DP4 TEMP[4].x, STATE[28].xyz0, TEMP[4].xyz0;
> 62: RCP TEMP[4].xyz, TEMP[4].x???;
> 63: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 64: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 65: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 66: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[29].xyz?, TEMP[1].xyz?;
> 67: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[30].xyz?, TEMP[1].xyz?;
> 68: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[31].xyz?, TEMP[1].xyz?;
> 69: ADD TEMP[3].xyz, STATE[32].xyz?, TEMP[2].-x-y-z-?;
> 70: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 71: RSQ TEMP[4].xyz, TEMP[4].x???;
> 72: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 73: RCP TEMP[4].yz, TEMP[4].x???;
> 74: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 75: DP4 TEMP[4].x, STATE[33].xyz0, TEMP[4].xyz0;
> 76: RCP TEMP[4].xyz, TEMP[4].x???;
> 77: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 78: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 79: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 80: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[34].xyz?, TEMP[1].xyz?;
> 81: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[35].xyz?, TEMP[1].xyz?;
> 82: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[36].xyz?, TEMP[1].xyz?;
> 83: ADD TEMP[3].xyz, STATE[37].xyz?, TEMP[2].-x-y-z-?;
> 84: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 85: RSQ TEMP[4].xyz, TEMP[4].x???;
> 86: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 87: RCP TEMP[4].yz, TEMP[4].x???;
> 88: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 89: DP4 TEMP[4].x, STATE[38].xyz0, TEMP[4].xyz0;
> 90: RCP TEMP[4].xyz, TEMP[4].x???;
> 91: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 92: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 93: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 94: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[39].xyz?, TEMP[1].xyz?;
> 95: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[40].xyz?, TEMP[1].xyz?;
> 96: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[41].xyz?, TEMP[1].xyz?;
> 97: ADD TEMP[3].xyz, STATE[42].xyz?, TEMP[2].-x-y-z-?;
> 98: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 99: RSQ TEMP[4].xyz, TEMP[4].x???;
>100: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
>101: RCP TEMP[4].yz, TEMP[4].x???;
>102: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
>103: DP4 TEMP[4].x, STATE[43].xyz0, TEMP[4].xyz0;
>104: RCP TEMP[4].xyz, TEMP[4].x???;
>105: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
>106: LIT TEMP[3].xyz, TEMP[3].xy?w;
>107: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
>108: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[44].xyz?, TEMP[1].xyz?;
>109: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[45].xyz?, TEMP[1].xyz?;
>110: MAD OUTPUT[1].xyz, TEMP[3].zzz?, STATE[46].xyz?, TEMP[1].xyz?;
>111: MAX OUTPUT[5].x, TEMP[2].z???, TEMP[2].-z-?-?-?;
>112: DP4 TEMP[1].x, TEMP[2].xyz0, TEMP[2].xyz0;
>113: RSQ TEMP[1].x, TEMP[1].x???;
>114: MUL TEMP[1].xyz, TEMP[2].xyz?, TEMP[1].xxx?;
>115: DP4 TEMP[2].xyz, TEMP[0].xyz0, TEMP[1].xyz0;
>116: ADD TEMP[2].xyz, TEMP[2].xyz?, TEMP[2].xyz?;
>117: MAD TEMP[0].xyz, TEMP[2].-x-y-z-?, TEMP[0].xyz?, TEMP[1].xyz?;
>118: ADD TEMP[1].xyz, TEMP[0].xyz?, CONST[47].xyw?;
>119: DP4 TEMP[1].x, TEMP[1].xyz0, TEMP[1].xyz0;
>120: RSQ TEMP[1].xy, TEMP[1].x???;
>121: MUL TEMP[1].xy, TEMP[1].xy??, CONST[48].xy??;
>122: MAD OUTPUT[4].xy, TEMP[0].xy??, TEMP[1].xy??, CONST[48].xy??;
>123: MOV OUTPUT[4].zw, INPUT[8].??zw;
>Final vertex program code:
>0: op: 0x00100201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10002 reg: 0c swiz:  X/ Y/ Z/ W
> src2: 0x01248002 reg: 0c swiz:  0/ 0/ 0/ 0
>1: op: 0x00200201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10022 reg: 1c swiz:  X/ Y/ Z/ W
> src2: 0x01248022 reg: 1c swiz:  0/ 0/ 0/ 0
>2: op: 0x00400201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10042 reg: 2c swiz:  X/ Y/ Z/ W
> src2: 0x01248042 reg: 2c swiz:  0/ 0/ 0/ 0
>3: op: 0x00800201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10062 reg: 3c swiz:  X/ Y/ Z/ W
> src2: 0x01248062 reg: 3c swiz:  0/ 0/ 0/ 0
>4: op: 0x00100001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x01110082 reg: 4c swiz:  X/ Y/ Z/ 0
> src2: 0x01248082 reg: 4c swiz:  0/ 0/ 0/ 0
>5: op: 0x00200001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x011100a2 reg: 5c swiz:  X/ Y/ Z/ 0
> src2: 0x012480a2 reg: 5c swiz:  0/ 0/ 0/ 0
>6: op: 0x00400001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x011100c2 reg: 6c swiz:  X/ Y/ Z/ 0
> src2: 0x012480c2 reg: 6c swiz:  0/ 0/ 0/ 0
>7: op: 0x00f02003 dst: 1t op:                    VE_ADD
> src0: 0x00d100e2 reg: 7c swiz:  X/ Y/ Z/ W
> src1: 0x012480e2 reg: 7c swiz:  0/ 0/ 0/ 0
> src2: 0x012480e2 reg: 7c swiz:  0/ 0/ 0/ 0
>8: op: 0x00802203 dst: 1o op:                    VE_ADD
> src0: 0x00ffe020 reg: 1t swiz:  U/ U/ U/ W
> src1: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>9: op: 0x00104001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10122 reg: 9c swiz:  X/ Y/ Z/ W
> src2: 0x01248122 reg: 9c swiz:  0/ 0/ 0/ 0
>10: op: 0x00204001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10142 reg: 10c swiz:  X/ Y/ Z/ W
> src2: 0x01248142 reg: 10c swiz:  0/ 0/ 0/ 0
>11: op: 0x00404001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10162 reg: 11c swiz:  X/ Y/ Z/ W
> src2: 0x01248162 reg: 11c swiz:  0/ 0/ 0/ 0
>12: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10102 reg: 8c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>13: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>14: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>15: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>16: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>17: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>18: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011101a2 reg: 13c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>19: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>20: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>21: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>22: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>23: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d101c2 reg: 14c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>24: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d101e2 reg: 15c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>25: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10202 reg: 16c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>26: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10222 reg: 17c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>27: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>28: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>29: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>30: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>31: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>32: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110242 reg: 18c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>33: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>34: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>35: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>36: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>37: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10262 reg: 19c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>38: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10282 reg: 20c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>39: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d102a2 reg: 21c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>40: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d102c2 reg: 22c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>41: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>42: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>43: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>44: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>45: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>46: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011102e2 reg: 23c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>47: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>48: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>49: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>50: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>51: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10302 reg: 24c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>52: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10322 reg: 25c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>53: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10342 reg: 26c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>54: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10362 reg: 27c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>55: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>56: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>57: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>58: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>59: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>60: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110382 reg: 28c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>61: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>62: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>63: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>64: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>65: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d103a2 reg: 29c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>66: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d103c2 reg: 30c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>67: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d103e2 reg: 31c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>68: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10402 reg: 32c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>69: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>70: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>71: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>72: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>73: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>74: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110422 reg: 33c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>75: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>76: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>77: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>78: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>79: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10442 reg: 34c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>80: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10462 reg: 35c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>81: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10482 reg: 36c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>82: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d104a2 reg: 37c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>83: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>84: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>85: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>86: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>87: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>88: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011104c2 reg: 38c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>89: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>90: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>91: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>92: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>93: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d104e2 reg: 39c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>94: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10502 reg: 40c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>95: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10522 reg: 41c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>96: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10542 reg: 42c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>97: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>98: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>99: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>100: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>101: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>102: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110562 reg: 43c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>103: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>104: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>105: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>106: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>107: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10582 reg: 44c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>108: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d105a2 reg: 45c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>109: op: 0x00702204 dst: 1o op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d105c2 reg: 46c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>110: op: 0x00106207 dst: 3o op:                VE_MAXIMUM
> src0: 0x01ff4040 reg: 2t swiz:  Z/ U/ U/ U
> src1: 0x1fff4040 reg: 2t swiz: -Z/-U/-U/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>111: op: 0x00102001 dst: 1t op:            VE_DOT_PRODUCT
> src0: 0x01110040 reg: 2t swiz:  X/ Y/ Z/ 0
> src1: 0x01110040 reg: 2t swiz:  X/ Y/ Z/ 0
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>112: op: 0x00102048 dst: 1t op:          ME_RECIP_SQRT_DX
> src0: 0x00000020 reg: 1t swiz:  X/ X/ X/ X
> src1: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>113: op: 0x00702002 dst: 1t op:               VE_MULTIPLY
> src0: 0x01d10040 reg: 2t swiz:  X/ Y/ Z/ U
> src1: 0x01c00020 reg: 1t swiz:  X/ X/ X/ U
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>114: op: 0x00704001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110020 reg: 1t swiz:  X/ Y/ Z/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>115: op: 0x00704003 dst: 2t op:                    VE_ADD
> src0: 0x01d10040 reg: 2t swiz:  X/ Y/ Z/ U
> src1: 0x01d10040 reg: 2t swiz:  X/ Y/ Z/ U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>116: op: 0x00700080 dst: 0t op:    PVS_MACRO_OP_2CLK_MADD
> src0: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src1: 0x01d10000 reg: 0t swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>117: op: 0x00702003 dst: 1t op:                    VE_ADD
> src0: 0x01d10000 reg: 0t swiz:  X/ Y/ Z/ U
> src1: 0x01d905e2 reg: 47c swiz:  X/ Y/ W/ U
> src2: 0x012485e2 reg: 47c swiz:  0/ 0/ 0/ 0
>118: op: 0x00102001 dst: 1t op:            VE_DOT_PRODUCT
> src0: 0x01110020 reg: 1t swiz:  X/ Y/ Z/ 0
> src1: 0x01110020 reg: 1t swiz:  X/ Y/ Z/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>119: op: 0x00302048 dst: 1t op:          ME_RECIP_SQRT_DX
> src0: 0x00000020 reg: 1t swiz:  X/ X/ X/ X
> src1: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>120: op: 0x00302002 dst: 1t op:               VE_MULTIPLY
> src0: 0x01f90020 reg: 1t swiz:  X/ Y/ U/ U
> src1: 0x01f90602 reg: 48c swiz:  X/ Y/ U/ U
> src2: 0x01248602 reg: 48c swiz:  0/ 0/ 0/ 0
>121: op: 0x00304204 dst: 2o op:           VE_MULTIPLY_ADD
> src0: 0x01f90000 reg: 0t swiz:  X/ Y/ U/ U
> src1: 0x01f90020 reg: 1t swiz:  X/ Y/ U/ U
> src2: 0x01f90602 reg: 48c swiz:  X/ Y/ U/ U
>122: op: 0x00c04203 dst: 2o op:                    VE_ADD
> src0: 0x00d7e041 reg: 2i swiz:  U/ U/ Z/ W
> src1: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
> src2: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
>radeon_validate_texture_miptree: Validating texture 0x14024810 now
> face 0, level 0... 0x14024a88 vs 0x14024a88 OK
> face 0, level 1... 0x14024a88 vs (nil) migrating
> face 0, level 2... 0x14024a88 vs (nil) migrating
> face 0, level 3... 0x14024a88 vs (nil) migrating
> face 0, level 4... 0x14024a88 vs (nil) migrating
> face 0, level 5... 0x14024a88 vs (nil) migrating
> face 0, level 6... 0x14024a88 vs (nil) migrating
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 833
>r300PredictTryDrawPrimsSize: total prediction size is 876.
>radeonAllocDmaRegion 96
>r300AllocDmaRegions: count 24 num_attribs 3
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c180 data 0x10da8a18
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c2a0 data 0x10da8c50
>radeonAllocDmaRegion 192
>radeonEmitVec8 count 24 stride 8 out 0xe348c3c0 data 0x10da8b88
>BEGIN_BATCH(4) at 3943, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 3947, from cp_wait:185
>BEGIN_BATCH(2) at 3948, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 3950, from end_3d:162
>  emit vpt 7/7
>BEGIN_BATCH(7) at 3951, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 3958, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 3962, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 3965, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 3968, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 3971, from radeon_emit_atom:1038
>  emit vap_clip_cntl 2/2
>BEGIN_BATCH(2) at 3974, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 3976, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 3979, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 3983, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 3985, from radeon_emit_atom:1038
>  emit shade2 4/4
>BEGIN_BATCH(4) at 3987, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 3991, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 3993, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 3996, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 3999, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 4002, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 4011, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 4042, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 4051, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 4053, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 4056, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 4059, from radeon_emit_atom:1038
>  emit cb 6/4
>rrb is 0xfb25848 0 1680x1050
>BEGIN_BATCH(6) at 4061, from emit_cb_offset:299
>  emit zs 4/4
>BEGIN_BATCH(4) at 4065, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 4069, from emit_zstencil_format:411
>  skip state vap_flush
>  emit vpi 493/1025
>BEGIN_BATCH(493) at 4074, from radeon_emit_atom:1038
>  emit vpp 197/1025
>BEGIN_BATCH(197) at 4567, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 4764, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 4766, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 4768, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 4770, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 4772, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 4774, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 4776, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 4778, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 4780, from r300EmitAOS:229
>BEGIN_BATCH(10) at 4788, from r300FireEB:182
>BEGIN_BATCH(4) at 4796, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-23) cs ending at 4800
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_T = GL_FALSE )
>r300TryDrawPrims: 1 (0-23) cs begin at 4800
>Initial vertex program:
># Vertex Program/Shader
>  0: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  1: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  2: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  3: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  4: DP3 TEMP[0].x, INPUT[2], STATE[4];
>  5: DP3 TEMP[0].y, INPUT[2], STATE[5];
>  6: DP3 TEMP[0].z, INPUT[2], STATE[6];
>  7: MOV TEMP[3], STATE[7];
>  8: MOV OUTPUT[1], TEMP[3];
>  9: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 10: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 11: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 12: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 13: SUB TEMP[6], STATE[8], TEMP[4];
> 14: DP3 TEMP[5], TEMP[6], TEMP[6];
> 15: RSQ TEMP[5], TEMP[5];
> 16: MUL TEMP[6], TEMP[6], TEMP[5];
> 17: RCP TEMP[5].yz, TEMP[5];
> 18: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 19: DP3 TEMP[5], STATE[13], TEMP[5];
> 20: RCP TEMP[7], TEMP[5];
> 21: DP3 TEMP[2], TEMP[0], TEMP[6];
> 22: LIT TEMP[1], TEMP[2];
> 23: MUL TEMP[1], TEMP[1], TEMP[7];
> 24: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 25: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 27: SUB TEMP[6], STATE[17], TEMP[4];
> 28: DP3 TEMP[5], TEMP[6], TEMP[6];
> 29: RSQ TEMP[5], TEMP[5];
> 30: MUL TEMP[6], TEMP[6], TEMP[5];
> 31: RCP TEMP[5].yz, TEMP[5];
> 32: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 33: DP3 TEMP[5], STATE[18], TEMP[5];
> 34: RCP TEMP[7], TEMP[5];
> 35: DP3 TEMP[2], TEMP[0], TEMP[6];
> 36: LIT TEMP[1], TEMP[2];
> 37: MUL TEMP[1], TEMP[1], TEMP[7];
> 38: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 39: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 41: SUB TEMP[6], STATE[22], TEMP[4];
> 42: DP3 TEMP[5], TEMP[6], TEMP[6];
> 43: RSQ TEMP[5], TEMP[5];
> 44: MUL TEMP[6], TEMP[6], TEMP[5];
> 45: RCP TEMP[5].yz, TEMP[5];
> 46: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 47: DP3 TEMP[5], STATE[23], TEMP[5];
> 48: RCP TEMP[7], TEMP[5];
> 49: DP3 TEMP[2], TEMP[0], TEMP[6];
> 50: LIT TEMP[1], TEMP[2];
> 51: MUL TEMP[1], TEMP[1], TEMP[7];
> 52: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 53: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 55: SUB TEMP[6], STATE[27], TEMP[4];
> 56: DP3 TEMP[5], TEMP[6], TEMP[6];
> 57: RSQ TEMP[5], TEMP[5];
> 58: MUL TEMP[6], TEMP[6], TEMP[5];
> 59: RCP TEMP[5].yz, TEMP[5];
> 60: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 61: DP3 TEMP[5], STATE[28], TEMP[5];
> 62: RCP TEMP[7], TEMP[5];
> 63: DP3 TEMP[2], TEMP[0], TEMP[6];
> 64: LIT TEMP[1], TEMP[2];
> 65: MUL TEMP[1], TEMP[1], TEMP[7];
> 66: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 67: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 69: SUB TEMP[6], STATE[32], TEMP[4];
> 70: DP3 TEMP[5], TEMP[6], TEMP[6];
> 71: RSQ TEMP[5], TEMP[5];
> 72: MUL TEMP[6], TEMP[6], TEMP[5];
> 73: RCP TEMP[5].yz, TEMP[5];
> 74: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 75: DP3 TEMP[5], STATE[33], TEMP[5];
> 76: RCP TEMP[7], TEMP[5];
> 77: DP3 TEMP[2], TEMP[0], TEMP[6];
> 78: LIT TEMP[1], TEMP[2];
> 79: MUL TEMP[1], TEMP[1], TEMP[7];
> 80: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 81: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 83: SUB TEMP[6], STATE[37], TEMP[4];
> 84: DP3 TEMP[5], TEMP[6], TEMP[6];
> 85: RSQ TEMP[5], TEMP[5];
> 86: MUL TEMP[6], TEMP[6], TEMP[5];
> 87: RCP TEMP[5].yz, TEMP[5];
> 88: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 89: DP3 TEMP[5], STATE[38], TEMP[5];
> 90: RCP TEMP[7], TEMP[5];
> 91: DP3 TEMP[2], TEMP[0], TEMP[6];
> 92: LIT TEMP[1], TEMP[2];
> 93: MUL TEMP[1], TEMP[1], TEMP[7];
> 94: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 95: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 97: SUB TEMP[6], STATE[42], TEMP[4];
> 98: DP3 TEMP[5], TEMP[6], TEMP[6];
> 99: RSQ TEMP[5], TEMP[5];
>100: MUL TEMP[6], TEMP[6], TEMP[5];
>101: RCP TEMP[5].yz, TEMP[5];
>102: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>103: DP3 TEMP[5], STATE[43], TEMP[5];
>104: RCP TEMP[7], TEMP[5];
>105: DP3 TEMP[2], TEMP[0], TEMP[6];
>106: LIT TEMP[1], TEMP[2];
>107: MUL TEMP[1], TEMP[1], TEMP[7];
>108: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>109: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>110: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>111: ABS OUTPUT[3].x, TEMP[4].zzzz;
>112: MOV OUTPUT[3].yzw, CONST[47];
>113: MOV OUTPUT[4], INPUT[8];
>114: END
>Vertex program after native rewrite:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[3], STATE[7];
>  9: MOV OUTPUT[1], TEMP[3];
> 10: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 13: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 14: ADD TEMP[6], STATE[8], TEMP[4].-x-y-z-w;
> 15: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 16: RSQ TEMP[5], TEMP[5];
> 17: MUL TEMP[6], TEMP[6], TEMP[5];
> 18: RCP TEMP[5].yz, TEMP[5];
> 19: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 20: DP4 TEMP[5], STATE[13].xyz0, TEMP[5].xyz0;
> 21: RCP TEMP[7], TEMP[5];
> 22: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 23: LIT TEMP[1], TEMP[2];
> 24: MUL TEMP[1], TEMP[1], TEMP[7];
> 25: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 27: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 28: ADD TEMP[6], STATE[17], TEMP[4].-x-y-z-w;
> 29: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 30: RSQ TEMP[5], TEMP[5];
> 31: MUL TEMP[6], TEMP[6], TEMP[5];
> 32: RCP TEMP[5].yz, TEMP[5];
> 33: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 34: DP4 TEMP[5], STATE[18].xyz0, TEMP[5].xyz0;
> 35: RCP TEMP[7], TEMP[5];
> 36: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 37: LIT TEMP[1], TEMP[2];
> 38: MUL TEMP[1], TEMP[1], TEMP[7];
> 39: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 41: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 42: ADD TEMP[6], STATE[22], TEMP[4].-x-y-z-w;
> 43: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 44: RSQ TEMP[5], TEMP[5];
> 45: MUL TEMP[6], TEMP[6], TEMP[5];
> 46: RCP TEMP[5].yz, TEMP[5];
> 47: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 48: DP4 TEMP[5], STATE[23].xyz0, TEMP[5].xyz0;
> 49: RCP TEMP[7], TEMP[5];
> 50: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 51: LIT TEMP[1], TEMP[2];
> 52: MUL TEMP[1], TEMP[1], TEMP[7];
> 53: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 55: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 56: ADD TEMP[6], STATE[27], TEMP[4].-x-y-z-w;
> 57: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 58: RSQ TEMP[5], TEMP[5];
> 59: MUL TEMP[6], TEMP[6], TEMP[5];
> 60: RCP TEMP[5].yz, TEMP[5];
> 61: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 62: DP4 TEMP[5], STATE[28].xyz0, TEMP[5].xyz0;
> 63: RCP TEMP[7], TEMP[5];
> 64: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 65: LIT TEMP[1], TEMP[2];
> 66: MUL TEMP[1], TEMP[1], TEMP[7];
> 67: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 69: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 70: ADD TEMP[6], STATE[32], TEMP[4].-x-y-z-w;
> 71: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 72: RSQ TEMP[5], TEMP[5];
> 73: MUL TEMP[6], TEMP[6], TEMP[5];
> 74: RCP TEMP[5].yz, TEMP[5];
> 75: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 76: DP4 TEMP[5], STATE[33].xyz0, TEMP[5].xyz0;
> 77: RCP TEMP[7], TEMP[5];
> 78: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 79: LIT TEMP[1], TEMP[2];
> 80: MUL TEMP[1], TEMP[1], TEMP[7];
> 81: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 83: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 84: ADD TEMP[6], STATE[37], TEMP[4].-x-y-z-w;
> 85: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 86: RSQ TEMP[5], TEMP[5];
> 87: MUL TEMP[6], TEMP[6], TEMP[5];
> 88: RCP TEMP[5].yz, TEMP[5];
> 89: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 90: DP4 TEMP[5], STATE[38].xyz0, TEMP[5].xyz0;
> 91: RCP TEMP[7], TEMP[5];
> 92: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 93: LIT TEMP[1], TEMP[2];
> 94: MUL TEMP[1], TEMP[1], TEMP[7];
> 95: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 97: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 98: ADD TEMP[6], STATE[42], TEMP[4].-x-y-z-w;
> 99: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
>100: RSQ TEMP[5], TEMP[5];
>101: MUL TEMP[6], TEMP[6], TEMP[5];
>102: RCP TEMP[5].yz, TEMP[5];
>103: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>104: DP4 TEMP[5], STATE[43].xyz0, TEMP[5].xyz0;
>105: RCP TEMP[7], TEMP[5];
>106: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
>107: LIT TEMP[1], TEMP[2];
>108: MUL TEMP[1], TEMP[1], TEMP[7];
>109: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>110: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>111: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>112: MAX OUTPUT[5].x, TEMP[4].zzzz, TEMP[4].-z-z-z-z;
>113: MOV OUTPUT[5]., CONST[47];
>114: MOV OUTPUT[4], INPUT[8];
>Vertex program after source conflict resolve:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[3], STATE[7];
>  9: MOV OUTPUT[1], TEMP[3];
> 10: DP4 TEMP[4].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[4].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[4].z, INPUT[0], STATE[11];
> 13: DP4 TEMP[4].w, INPUT[0], STATE[12];
> 14: ADD TEMP[6], STATE[8], TEMP[4].-x-y-z-w;
> 15: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 16: RSQ TEMP[5], TEMP[5];
> 17: MUL TEMP[6], TEMP[6], TEMP[5];
> 18: RCP TEMP[5].yz, TEMP[5];
> 19: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 20: DP4 TEMP[5], STATE[13].xyz0, TEMP[5].xyz0;
> 21: RCP TEMP[7], TEMP[5];
> 22: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 23: LIT TEMP[1], TEMP[2];
> 24: MUL TEMP[1], TEMP[1], TEMP[7];
> 25: MAD TEMP[3], TEMP[1].xxxx, STATE[14], TEMP[3];
> 26: MAD TEMP[3], TEMP[1].yyyy, STATE[15], TEMP[3];
> 27: MAD TEMP[3], TEMP[1].zzzz, STATE[16], TEMP[3];
> 28: ADD TEMP[6], STATE[17], TEMP[4].-x-y-z-w;
> 29: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 30: RSQ TEMP[5], TEMP[5];
> 31: MUL TEMP[6], TEMP[6], TEMP[5];
> 32: RCP TEMP[5].yz, TEMP[5];
> 33: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 34: DP4 TEMP[5], STATE[18].xyz0, TEMP[5].xyz0;
> 35: RCP TEMP[7], TEMP[5];
> 36: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 37: LIT TEMP[1], TEMP[2];
> 38: MUL TEMP[1], TEMP[1], TEMP[7];
> 39: MAD TEMP[3], TEMP[1].xxxx, STATE[19], TEMP[3];
> 40: MAD TEMP[3], TEMP[1].yyyy, STATE[20], TEMP[3];
> 41: MAD TEMP[3], TEMP[1].zzzz, STATE[21], TEMP[3];
> 42: ADD TEMP[6], STATE[22], TEMP[4].-x-y-z-w;
> 43: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 44: RSQ TEMP[5], TEMP[5];
> 45: MUL TEMP[6], TEMP[6], TEMP[5];
> 46: RCP TEMP[5].yz, TEMP[5];
> 47: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 48: DP4 TEMP[5], STATE[23].xyz0, TEMP[5].xyz0;
> 49: RCP TEMP[7], TEMP[5];
> 50: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 51: LIT TEMP[1], TEMP[2];
> 52: MUL TEMP[1], TEMP[1], TEMP[7];
> 53: MAD TEMP[3], TEMP[1].xxxx, STATE[24], TEMP[3];
> 54: MAD TEMP[3], TEMP[1].yyyy, STATE[25], TEMP[3];
> 55: MAD TEMP[3], TEMP[1].zzzz, STATE[26], TEMP[3];
> 56: ADD TEMP[6], STATE[27], TEMP[4].-x-y-z-w;
> 57: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 58: RSQ TEMP[5], TEMP[5];
> 59: MUL TEMP[6], TEMP[6], TEMP[5];
> 60: RCP TEMP[5].yz, TEMP[5];
> 61: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 62: DP4 TEMP[5], STATE[28].xyz0, TEMP[5].xyz0;
> 63: RCP TEMP[7], TEMP[5];
> 64: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 65: LIT TEMP[1], TEMP[2];
> 66: MUL TEMP[1], TEMP[1], TEMP[7];
> 67: MAD TEMP[3], TEMP[1].xxxx, STATE[29], TEMP[3];
> 68: MAD TEMP[3], TEMP[1].yyyy, STATE[30], TEMP[3];
> 69: MAD TEMP[3], TEMP[1].zzzz, STATE[31], TEMP[3];
> 70: ADD TEMP[6], STATE[32], TEMP[4].-x-y-z-w;
> 71: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 72: RSQ TEMP[5], TEMP[5];
> 73: MUL TEMP[6], TEMP[6], TEMP[5];
> 74: RCP TEMP[5].yz, TEMP[5];
> 75: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 76: DP4 TEMP[5], STATE[33].xyz0, TEMP[5].xyz0;
> 77: RCP TEMP[7], TEMP[5];
> 78: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 79: LIT TEMP[1], TEMP[2];
> 80: MUL TEMP[1], TEMP[1], TEMP[7];
> 81: MAD TEMP[3], TEMP[1].xxxx, STATE[34], TEMP[3];
> 82: MAD TEMP[3], TEMP[1].yyyy, STATE[35], TEMP[3];
> 83: MAD TEMP[3], TEMP[1].zzzz, STATE[36], TEMP[3];
> 84: ADD TEMP[6], STATE[37], TEMP[4].-x-y-z-w;
> 85: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
> 86: RSQ TEMP[5], TEMP[5];
> 87: MUL TEMP[6], TEMP[6], TEMP[5];
> 88: RCP TEMP[5].yz, TEMP[5];
> 89: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
> 90: DP4 TEMP[5], STATE[38].xyz0, TEMP[5].xyz0;
> 91: RCP TEMP[7], TEMP[5];
> 92: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
> 93: LIT TEMP[1], TEMP[2];
> 94: MUL TEMP[1], TEMP[1], TEMP[7];
> 95: MAD TEMP[3], TEMP[1].xxxx, STATE[39], TEMP[3];
> 96: MAD TEMP[3], TEMP[1].yyyy, STATE[40], TEMP[3];
> 97: MAD TEMP[3], TEMP[1].zzzz, STATE[41], TEMP[3];
> 98: ADD TEMP[6], STATE[42], TEMP[4].-x-y-z-w;
> 99: DP4 TEMP[5], TEMP[6].xyz0, TEMP[6].xyz0;
>100: RSQ TEMP[5], TEMP[5];
>101: MUL TEMP[6], TEMP[6], TEMP[5];
>102: RCP TEMP[5].yz, TEMP[5];
>103: MUL TEMP[5].xz, TEMP[5], TEMP[5].yyyy;
>104: DP4 TEMP[5], STATE[43].xyz0, TEMP[5].xyz0;
>105: RCP TEMP[7], TEMP[5];
>106: DP4 TEMP[2], TEMP[0].xyz0, TEMP[6].xyz0;
>107: LIT TEMP[1], TEMP[2];
>108: MUL TEMP[1], TEMP[1], TEMP[7];
>109: MAD TEMP[3], TEMP[1].xxxx, STATE[44], TEMP[3];
>110: MAD TEMP[3], TEMP[1].yyyy, STATE[45], TEMP[3];
>111: MAD OUTPUT[1].xyz, TEMP[1].zzzz, STATE[46], TEMP[3];
>112: MAX OUTPUT[5].x, TEMP[4].zzzz, TEMP[4].-z-z-z-z;
>113: MOV OUTPUT[5]., CONST[47];
>114: MOV OUTPUT[4], INPUT[8];
>Vertex program after NQSSADCE:
># Radeon Compiler Program
>  1: DP4 OUTPUT[0].x, INPUT[0], STATE[0];
>  2: DP4 OUTPUT[0].y, INPUT[0], STATE[1];
>  3: DP4 OUTPUT[0].z, INPUT[0], STATE[2];
>  4: DP4 OUTPUT[0].w, INPUT[0], STATE[3];
>  5: DP4 TEMP[0].x, INPUT[2].xyz0, STATE[4].xyz0;
>  6: DP4 TEMP[0].y, INPUT[2].xyz0, STATE[5].xyz0;
>  7: DP4 TEMP[0].z, INPUT[2].xyz0, STATE[6].xyz0;
>  8: MOV TEMP[1], STATE[7];
>  9: MOV OUTPUT[1].w, TEMP[1].???w;
> 10: DP4 TEMP[2].x, INPUT[0], STATE[9];
> 11: DP4 TEMP[2].y, INPUT[0], STATE[10];
> 12: DP4 TEMP[2].z, INPUT[0], STATE[11];
> 13: ADD TEMP[3].xyz, STATE[8].xyz?, TEMP[2].-x-y-z-?;
> 14: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 15: RSQ TEMP[4].xyz, TEMP[4].x???;
> 16: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 17: RCP TEMP[4].yz, TEMP[4].x???;
> 18: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 19: DP4 TEMP[4].x, STATE[13].xyz0, TEMP[4].xyz0;
> 20: RCP TEMP[4].xyz, TEMP[4].x???;
> 21: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 22: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 23: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 24: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[14].xyz?, TEMP[1].xyz?;
> 25: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[15].xyz?, TEMP[1].xyz?;
> 26: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[16].xyz?, TEMP[1].xyz?;
> 27: ADD TEMP[3].xyz, STATE[17].xyz?, TEMP[2].-x-y-z-?;
> 28: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 29: RSQ TEMP[4].xyz, TEMP[4].x???;
> 30: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 31: RCP TEMP[4].yz, TEMP[4].x???;
> 32: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 33: DP4 TEMP[4].x, STATE[18].xyz0, TEMP[4].xyz0;
> 34: RCP TEMP[4].xyz, TEMP[4].x???;
> 35: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 36: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 37: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 38: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[19].xyz?, TEMP[1].xyz?;
> 39: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[20].xyz?, TEMP[1].xyz?;
> 40: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[21].xyz?, TEMP[1].xyz?;
> 41: ADD TEMP[3].xyz, STATE[22].xyz?, TEMP[2].-x-y-z-?;
> 42: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 43: RSQ TEMP[4].xyz, TEMP[4].x???;
> 44: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 45: RCP TEMP[4].yz, TEMP[4].x???;
> 46: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 47: DP4 TEMP[4].x, STATE[23].xyz0, TEMP[4].xyz0;
> 48: RCP TEMP[4].xyz, TEMP[4].x???;
> 49: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 50: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 51: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 52: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[24].xyz?, TEMP[1].xyz?;
> 53: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[25].xyz?, TEMP[1].xyz?;
> 54: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[26].xyz?, TEMP[1].xyz?;
> 55: ADD TEMP[3].xyz, STATE[27].xyz?, TEMP[2].-x-y-z-?;
> 56: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 57: RSQ TEMP[4].xyz, TEMP[4].x???;
> 58: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 59: RCP TEMP[4].yz, TEMP[4].x???;
> 60: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 61: DP4 TEMP[4].x, STATE[28].xyz0, TEMP[4].xyz0;
> 62: RCP TEMP[4].xyz, TEMP[4].x???;
> 63: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 64: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 65: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 66: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[29].xyz?, TEMP[1].xyz?;
> 67: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[30].xyz?, TEMP[1].xyz?;
> 68: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[31].xyz?, TEMP[1].xyz?;
> 69: ADD TEMP[3].xyz, STATE[32].xyz?, TEMP[2].-x-y-z-?;
> 70: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 71: RSQ TEMP[4].xyz, TEMP[4].x???;
> 72: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 73: RCP TEMP[4].yz, TEMP[4].x???;
> 74: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 75: DP4 TEMP[4].x, STATE[33].xyz0, TEMP[4].xyz0;
> 76: RCP TEMP[4].xyz, TEMP[4].x???;
> 77: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 78: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 79: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 80: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[34].xyz?, TEMP[1].xyz?;
> 81: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[35].xyz?, TEMP[1].xyz?;
> 82: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[36].xyz?, TEMP[1].xyz?;
> 83: ADD TEMP[3].xyz, STATE[37].xyz?, TEMP[2].-x-y-z-?;
> 84: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 85: RSQ TEMP[4].xyz, TEMP[4].x???;
> 86: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 87: RCP TEMP[4].yz, TEMP[4].x???;
> 88: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
> 89: DP4 TEMP[4].x, STATE[38].xyz0, TEMP[4].xyz0;
> 90: RCP TEMP[4].xyz, TEMP[4].x???;
> 91: DP4 TEMP[3].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
> 92: LIT TEMP[3].xyz, TEMP[3].xy?w;
> 93: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
> 94: MAD TEMP[1].xyz, TEMP[3].xxx?, STATE[39].xyz?, TEMP[1].xyz?;
> 95: MAD TEMP[1].xyz, TEMP[3].yyy?, STATE[40].xyz?, TEMP[1].xyz?;
> 96: MAD TEMP[1].xyz, TEMP[3].zzz?, STATE[41].xyz?, TEMP[1].xyz?;
> 97: ADD TEMP[3].xyz, STATE[42].xyz?, TEMP[2].-x-y-z-?;
> 98: DP4 TEMP[4].x, TEMP[3].xyz0, TEMP[3].xyz0;
> 99: RSQ TEMP[4].xyz, TEMP[4].x???;
>100: MUL TEMP[3].xyz, TEMP[3].xyz?, TEMP[4].xyz?;
>101: RCP TEMP[4].yz, TEMP[4].x???;
>102: MUL TEMP[4].xz, TEMP[4].x?z?, TEMP[4].y?y?;
>103: DP4 TEMP[4].x, STATE[43].xyz0, TEMP[4].xyz0;
>104: RCP TEMP[4].xyz, TEMP[4].x???;
>105: DP4 TEMP[0].xyw, TEMP[0].xyz0, TEMP[3].xyz0;
>106: LIT TEMP[0].xyz, TEMP[0].xy?w;
>107: MUL TEMP[0].xyz, TEMP[0].xyz?, TEMP[4].xyz?;
>108: MAD TEMP[1].xyz, TEMP[0].xxx?, STATE[44].xyz?, TEMP[1].xyz?;
>109: MAD TEMP[1].xyz, TEMP[0].yyy?, STATE[45].xyz?, TEMP[1].xyz?;
>110: MAD OUTPUT[1].xyz, TEMP[0].zzz?, STATE[46].xyz?, TEMP[1].xyz?;
>111: MAX OUTPUT[5].x, TEMP[2].z???, TEMP[2].-z-?-?-?;
>112: MOV OUTPUT[4], INPUT[8];
>Final vertex program code:
>0: op: 0x00100201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10002 reg: 0c swiz:  X/ Y/ Z/ W
> src2: 0x01248002 reg: 0c swiz:  0/ 0/ 0/ 0
>1: op: 0x00200201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10022 reg: 1c swiz:  X/ Y/ Z/ W
> src2: 0x01248022 reg: 1c swiz:  0/ 0/ 0/ 0
>2: op: 0x00400201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10042 reg: 2c swiz:  X/ Y/ Z/ W
> src2: 0x01248042 reg: 2c swiz:  0/ 0/ 0/ 0
>3: op: 0x00800201 dst: 0o op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10062 reg: 3c swiz:  X/ Y/ Z/ W
> src2: 0x01248062 reg: 3c swiz:  0/ 0/ 0/ 0
>4: op: 0x00100001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x01110082 reg: 4c swiz:  X/ Y/ Z/ 0
> src2: 0x01248082 reg: 4c swiz:  0/ 0/ 0/ 0
>5: op: 0x00200001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x011100a2 reg: 5c swiz:  X/ Y/ Z/ 0
> src2: 0x012480a2 reg: 5c swiz:  0/ 0/ 0/ 0
>6: op: 0x00400001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110021 reg: 1i swiz:  X/ Y/ Z/ 0
> src1: 0x011100c2 reg: 6c swiz:  X/ Y/ Z/ 0
> src2: 0x012480c2 reg: 6c swiz:  0/ 0/ 0/ 0
>7: op: 0x00f02003 dst: 1t op:                    VE_ADD
> src0: 0x00d100e2 reg: 7c swiz:  X/ Y/ Z/ W
> src1: 0x012480e2 reg: 7c swiz:  0/ 0/ 0/ 0
> src2: 0x012480e2 reg: 7c swiz:  0/ 0/ 0/ 0
>8: op: 0x00802203 dst: 1o op:                    VE_ADD
> src0: 0x00ffe020 reg: 1t swiz:  U/ U/ U/ W
> src1: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>9: op: 0x00104001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10122 reg: 9c swiz:  X/ Y/ Z/ W
> src2: 0x01248122 reg: 9c swiz:  0/ 0/ 0/ 0
>10: op: 0x00204001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10142 reg: 10c swiz:  X/ Y/ Z/ W
> src2: 0x01248142 reg: 10c swiz:  0/ 0/ 0/ 0
>11: op: 0x00404001 dst: 2t op:            VE_DOT_PRODUCT
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x00d10162 reg: 11c swiz:  X/ Y/ Z/ W
> src2: 0x01248162 reg: 11c swiz:  0/ 0/ 0/ 0
>12: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10102 reg: 8c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>13: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>14: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>15: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>16: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>17: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>18: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011101a2 reg: 13c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>19: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>20: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>21: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>22: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>23: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d101c2 reg: 14c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>24: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d101e2 reg: 15c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>25: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10202 reg: 16c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>26: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10222 reg: 17c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>27: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>28: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>29: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>30: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>31: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>32: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110242 reg: 18c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>33: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>34: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>35: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>36: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>37: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10262 reg: 19c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>38: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10282 reg: 20c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>39: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d102a2 reg: 21c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>40: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d102c2 reg: 22c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>41: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>42: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>43: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>44: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>45: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>46: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011102e2 reg: 23c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>47: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>48: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>49: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>50: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>51: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10302 reg: 24c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>52: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10322 reg: 25c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>53: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10342 reg: 26c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>54: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10362 reg: 27c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>55: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>56: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>57: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>58: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>59: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>60: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110382 reg: 28c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>61: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>62: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>63: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>64: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>65: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d103a2 reg: 29c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>66: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d103c2 reg: 30c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>67: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d103e2 reg: 31c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>68: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10402 reg: 32c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>69: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>70: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>71: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>72: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>73: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>74: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110422 reg: 33c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>75: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>76: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>77: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>78: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>79: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d10442 reg: 34c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>80: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10462 reg: 35c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>81: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10482 reg: 36c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>82: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d104a2 reg: 37c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>83: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>84: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>85: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>86: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>87: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>88: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x011104c2 reg: 38c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>89: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>90: op: 0x00b06001 dst: 3t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>91: op: 0x00706044 dst: 3t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630060 reg: 3t swiz:  X/ W/ 0/ Y
> src1: 0x00232060 reg: 3t swiz:  Y/ W/ 0/ X
> src2: 0x00e02060 reg: 3t swiz:  Y/ X/ 0/ W
>92: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>93: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00060 reg: 3t swiz:  X/ X/ X/ U
> src1: 0x01d104e2 reg: 39c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>94: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92060 reg: 3t swiz:  Y/ Y/ Y/ U
> src1: 0x01d10502 reg: 40c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>95: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01d24060 reg: 3t swiz:  Z/ Z/ Z/ U
> src1: 0x01d10522 reg: 41c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>96: op: 0x00706003 dst: 3t op:                    VE_ADD
> src0: 0x01d10542 reg: 42c swiz:  X/ Y/ Z/ U
> src1: 0x1fd10040 reg: 2t swiz: -X/-Y/-Z/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>97: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>98: op: 0x00708048 dst: 4t op:          ME_RECIP_SQRT_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>99: op: 0x00706002 dst: 3t op:               VE_MULTIPLY
> src0: 0x01d10060 reg: 3t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>100: op: 0x00608046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>101: op: 0x00508002 dst: 4t op:               VE_MULTIPLY
> src0: 0x01d70080 reg: 4t swiz:  X/ U/ Z/ U
> src1: 0x01cf2080 reg: 4t swiz:  Y/ U/ Y/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>102: op: 0x00108001 dst: 4t op:            VE_DOT_PRODUCT
> src0: 0x01110562 reg: 43c swiz:  X/ Y/ Z/ 0
> src1: 0x01110080 reg: 4t swiz:  X/ Y/ Z/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>103: op: 0x00708046 dst: 4t op:               ME_RECIP_DX
> src0: 0x00000080 reg: 4t swiz:  X/ X/ X/ X
> src1: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>104: op: 0x00b00001 dst: 0t op:            VE_DOT_PRODUCT
> src0: 0x01110000 reg: 0t swiz:  X/ Y/ Z/ 0
> src1: 0x01110060 reg: 3t swiz:  X/ Y/ Z/ 0
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>105: op: 0x00700044 dst: 0t op:         ME_LIGHT_COEFF_DX
> src0: 0x00630000 reg: 0t swiz:  X/ W/ 0/ Y
> src1: 0x00232000 reg: 0t swiz:  Y/ W/ 0/ X
> src2: 0x00e02000 reg: 0t swiz:  Y/ X/ 0/ W
>106: op: 0x00700002 dst: 0t op:               VE_MULTIPLY
> src0: 0x01d10000 reg: 0t swiz:  X/ Y/ Z/ U
> src1: 0x01d10080 reg: 4t swiz:  X/ Y/ Z/ U
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>107: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c00000 reg: 0t swiz:  X/ X/ X/ U
> src1: 0x01d10582 reg: 44c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>108: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
> src0: 0x01c92000 reg: 0t swiz:  Y/ Y/ Y/ U
> src1: 0x01d105a2 reg: 45c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>109: op: 0x00702204 dst: 1o op:           VE_MULTIPLY_ADD
> src0: 0x01d24000 reg: 0t swiz:  Z/ Z/ Z/ U
> src1: 0x01d105c2 reg: 46c swiz:  X/ Y/ Z/ U
> src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
>110: op: 0x00106207 dst: 3o op:                VE_MAXIMUM
> src0: 0x01ff4040 reg: 2t swiz:  Z/ U/ U/ U
> src1: 0x1fff4040 reg: 2t swiz: -Z/-U/-U/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>111: op: 0x00f04203 dst: 2o op:                    VE_ADD
> src0: 0x00d10041 reg: 2i swiz:  X/ Y/ Z/ W
> src1: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
> src2: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
>radeon_validate_texture_miptree: Validating texture 0x1400d610 now
> face 0, level 0... 0x1400d888 vs 0x1400d888 OK
> face 0, level 1... 0x1400d888 vs (nil) migrating
> face 0, level 2... 0x1400d888 vs (nil) migrating
> face 0, level 3... 0x1400d888 vs (nil) migrating
> face 0, level 4... 0x1400d888 vs (nil) migrating
> face 0, level 5... 0x1400d888 vs (nil) migrating
> face 0, level 6... 0x1400d888 vs (nil) migrating
> face 0, level 7... 0x1400d888 vs (nil) migrating
> face 0, level 8... 0x1400d888 vs (nil) migrating
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 740
>r300PredictTryDrawPrimsSize: total prediction size is 783.
>radeonAllocDmaRegion 96
>r300AllocDmaRegions: count 24 num_attribs 3
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c4e0 data 0x10da8a18
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c600 data 0x10da8c50
>radeonAllocDmaRegion 192
>radeonEmitVec8 count 24 stride 8 out 0xe348c720 data 0x10da8b88
>BEGIN_BATCH(4) at 4800, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 4804, from cp_wait:185
>BEGIN_BATCH(2) at 4805, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 4807, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 4808, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 4812, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 4815, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 4818, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 4821, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 4824, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 4828, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 4830, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 4833, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 4836, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 4839, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 4848, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 4879, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 449/1025
>BEGIN_BATCH(449) at 4888, from radeon_emit_atom:1038
>  emit vpp 193/1025
>BEGIN_BATCH(193) at 5337, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 5530, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 5532, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 5534, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 5536, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 5538, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 5540, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 5542, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 5544, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 5546, from r300EmitAOS:229
>BEGIN_BATCH(10) at 5554, from r300FireEB:182
>BEGIN_BATCH(4) at 5562, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-23) cs ending at 5566
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>r300TryDrawPrims: 1 (0-23) cs begin at 5566
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 791
>r300PredictTryDrawPrimsSize: total prediction size is 834.
>radeonAllocDmaRegion 96
>r300AllocDmaRegions: count 24 num_attribs 3
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c840 data 0x10da8e48
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348c960 data 0x13eb4e78
>radeonAllocDmaRegion 192
>radeonEmitVec8 count 24 stride 8 out 0xe348ca80 data 0x13eb4db0
>BEGIN_BATCH(4) at 5566, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 5570, from cp_wait:185
>BEGIN_BATCH(2) at 5571, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 5573, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 5574, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 5578, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 5581, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 5584, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 5587, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 5590, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 5594, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 5596, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 5599, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 5602, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 5605, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 5614, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 5645, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 5654, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 493/1025
>BEGIN_BATCH(493) at 5657, from radeon_emit_atom:1038
>  emit vpp 197/1025
>BEGIN_BATCH(197) at 6150, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 6347, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 6349, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 6351, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 6353, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 6355, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 6357, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 6359, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 6361, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 6363, from r300EmitAOS:229
>BEGIN_BATCH(10) at 6371, from r300FireEB:182
>BEGIN_BATCH(4) at 6379, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-23) cs ending at 6383
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_T = GL_FALSE )
>r300TryDrawPrims: 1 (0-23) cs begin at 6383
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 740
>r300PredictTryDrawPrimsSize: total prediction size is 783.
>radeonAllocDmaRegion 96
>r300AllocDmaRegions: count 24 num_attribs 3
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348cba0 data 0x10da8e48
>radeonAllocDmaRegion 288
>radeonEmitVec12 count 24 stride 12 out 0xe348ccc0 data 0x13eb4e78
>radeonAllocDmaRegion 192
>radeonEmitVec8 count 24 stride 8 out 0xe348cde0 data 0x13eb4db0
>BEGIN_BATCH(4) at 6383, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 6387, from cp_wait:185
>BEGIN_BATCH(2) at 6388, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 6390, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 6391, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 6395, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 6398, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 6401, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 6404, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 6407, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 6411, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 6413, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 6416, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 6419, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 6422, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 6431, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 6462, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 449/1025
>BEGIN_BATCH(449) at 6471, from radeon_emit_atom:1038
>  emit vpp 193/1025
>BEGIN_BATCH(193) at 6920, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 7113, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 7115, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 7117, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 7119, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 7121, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 7123, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 7125, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 7127, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 7129, from r300EmitAOS:229
>BEGIN_BATCH(10) at 7137, from r300FireEB:182
>BEGIN_BATCH(4) at 7145, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-23) cs ending at 7149
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>r300TryDrawPrims: 1 (0-31) cs begin at 7149
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 791
>r300PredictTryDrawPrimsSize: total prediction size is 834.
>radeonAllocDmaRegion 144
>r300AllocDmaRegions: count 32 num_attribs 3
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348cf40 data 0x13eb0900
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348d0c0 data 0x13eb0c18
>radeonAllocDmaRegion 256
>radeonEmitVec8 count 32 stride 8 out 0xe348d240 data 0x13eb0a88
>BEGIN_BATCH(4) at 7149, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 7153, from cp_wait:185
>BEGIN_BATCH(2) at 7154, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 7156, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 7157, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 7161, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 7164, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 7167, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 7170, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 7173, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 7177, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 7179, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 7182, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 7185, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 7188, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 7197, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 7228, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 7237, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 493/1025
>BEGIN_BATCH(493) at 7240, from radeon_emit_atom:1038
>  emit vpp 197/1025
>BEGIN_BATCH(197) at 7733, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 7930, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 7932, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 7934, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 7936, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 7938, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 7940, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 7942, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 7944, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 7946, from r300EmitAOS:229
>BEGIN_BATCH(10) at 7954, from r300FireEB:182
>BEGIN_BATCH(4) at 7962, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-31) cs ending at 7966
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_T = GL_FALSE )
>r300TryDrawPrims: 1 (0-31) cs begin at 7966
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 740
>r300PredictTryDrawPrimsSize: total prediction size is 783.
>radeonAllocDmaRegion 144
>r300AllocDmaRegions: count 32 num_attribs 3
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348d3e0 data 0x13eb0900
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348d560 data 0x13eb0c18
>radeonAllocDmaRegion 256
>radeonEmitVec8 count 32 stride 8 out 0xe348d6e0 data 0x13eb0a88
>BEGIN_BATCH(4) at 7966, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 7970, from cp_wait:185
>BEGIN_BATCH(2) at 7971, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 7973, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 7974, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 7978, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 7981, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 7984, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 7987, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 7990, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 7994, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 7996, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 7999, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 8002, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 8005, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 8014, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 8045, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 449/1025
>BEGIN_BATCH(449) at 8054, from radeon_emit_atom:1038
>  emit vpp 193/1025
>BEGIN_BATCH(193) at 8503, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 8696, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 8698, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 8700, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 8702, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 8704, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 8706, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 8708, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 8710, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 8712, from r300EmitAOS:229
>BEGIN_BATCH(10) at 8720, from r300FireEB:182
>BEGIN_BATCH(4) at 8728, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-31) cs ending at 8732
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>r300TryDrawPrims: 1 (0-31) cs begin at 8732
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 791
>r300PredictTryDrawPrimsSize: total prediction size is 834.
>radeonAllocDmaRegion 144
>r300AllocDmaRegions: count 32 num_attribs 3
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348d880 data 0x13eb11b8
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348da00 data 0x13eb1448
>radeonAllocDmaRegion 256
>radeonEmitVec8 count 32 stride 8 out 0xe348db80 data 0x13eb1340
>BEGIN_BATCH(4) at 8732, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 8736, from cp_wait:185
>BEGIN_BATCH(2) at 8737, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 8739, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 8740, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 8744, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 8747, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 8750, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 8753, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 8756, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 8760, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 8762, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 8765, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 8768, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 8771, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 8780, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 8811, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 8820, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 493/1025
>BEGIN_BATCH(493) at 8823, from radeon_emit_atom:1038
>  emit vpp 197/1025
>BEGIN_BATCH(197) at 9316, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 9513, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 9515, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 9517, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 9519, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 9521, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 9523, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 9525, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 9527, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 9529, from r300EmitAOS:229
>BEGIN_BATCH(10) at 9537, from r300FireEB:182
>BEGIN_BATCH(4) at 9545, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-31) cs ending at 9549
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_T = GL_FALSE )
>r300TryDrawPrims: 1 (0-31) cs begin at 9549
>r300SetVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 740
>r300PredictTryDrawPrimsSize: total prediction size is 783.
>radeonAllocDmaRegion 144
>r300AllocDmaRegions: count 32 num_attribs 3
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348dd20 data 0x13eb11b8
>radeonAllocDmaRegion 384
>radeonEmitVec12 count 32 stride 12 out 0xe348dea0 data 0x13eb1448
>radeonAllocDmaRegion 256
>radeonEmitVec8 count 32 stride 8 out 0xe348e020 data 0x13eb1340
>BEGIN_BATCH(4) at 9549, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 9553, from cp_wait:185
>BEGIN_BATCH(2) at 9554, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 9556, from end_3d:162
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 9557, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 9561, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 9564, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 9567, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 9570, from radeon_emit_atom:1038
>  emit pvs 4/4
>BEGIN_BATCH(4) at 9573, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 9577, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 9579, from radeon_emit_atom:1038
>  emit ri 3/17
>BEGIN_BATCH(3) at 9582, from radeon_emit_atom:1038
>  emit rr 3/9
>BEGIN_BATCH(3) at 9585, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 9588, from radeon_emit_atom:1038
>  emit r500fp 31/3073
>BEGIN_BATCH(31) at 9597, from radeon_emit_atom:1038
>  emit r500fp_const 9/1025
>BEGIN_BATCH(9) at 9628, from radeon_emit_atom:1038
>  skip state vap_flush
>  emit vpi 449/1025
>BEGIN_BATCH(449) at 9637, from radeon_emit_atom:1038
>  emit vpp 193/1025
>BEGIN_BATCH(193) at 10086, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 10279, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 10281, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 10283, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 10285, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 10287, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 10289, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 10291, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 10293, from radeon_emit_atom:1038
>r300EmitAOS: nr=3, ofs=0x00000000
>BEGIN_BATCH(14) at 10295, from r300EmitAOS:229
>BEGIN_BATCH(10) at 10303, from r300FireEB:182
>BEGIN_BATCH(4) at 10311, from r300EmitCacheFlush:131
>r300FreeData
>r300TryDrawPrims: 1 (0-31) cs ending at 10315
>r300Enable( GL_ALPHA_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ATTRIB_ARRAY1_NV = GL_TRUE )
>r300Enable( GL_VERTEX_ATTRIB_ARRAY4_NV = GL_TRUE )
>r300Enable( GL_VERTEX_PROGRAM_ARB = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa warning: User called no-op dispatch function (an unsupported extension function?)
>Mesa: User error: GL_INVALID_ENUM in glEnable(0x8522)
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_T = GL_TRUE )
>r300TryDrawPrims: 1 (0-11) cs begin at 10315
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: TXP TEMP[0], INPUT[4], texture[0], 2D;
>  1: TXP TEMP[1], INPUT[5], texture[1], 2D;
>  2: MUL_SAT TEMP[2].xyz, TEMP[0], INPUT[1];
>  3: MOV_SAT TEMP[2].w, INPUT[1];
>  4: MUL_SAT TEMP[3].xyz, TEMP[1], TEMP[2];
>  5: MOV_SAT TEMP[3].w, TEMP[2];
>  6: MAD_SAT TEMP[4].x, INPUT[3].xxxx, STATE[0].xxxx, STATE[0].yyyy;
>  7: LRP OUTPUT[1].xyz, TEMP[4].xxxx, TEMP[3], STATE[1];
>  8: MOV OUTPUT[1].w, TEMP[3];
>  9: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: TXP TEMP[0], INPUT[4], texture[0], 2D;
>  2: TXP TEMP[1], INPUT[5], texture[1], 2D;
>  3: MUL_SAT TEMP[2].xyz, TEMP[0], INPUT[1];
>  4: MOV_SAT TEMP[2].w, INPUT[1];
>  5: MUL_SAT TEMP[3].xyz, TEMP[1], TEMP[2];
>  6: MOV_SAT TEMP[3].w, TEMP[2];
>  7: MAD_SAT TEMP[4].x, INPUT[6].xxxx, STATE[0].xxxx, STATE[0].yyyy;
>  8: ADD TEMP[5], TEMP[3], STATE[1].-x-y-z-w;
>  9: MAD OUTPUT[1].xyz, TEMP[4].xxxx, TEMP[5], STATE[1];
> 10: MOV OUTPUT[1].w, TEMP[3];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: TXP TEMP[0].xyz, INPUT[4], texture[0], 2D;
>  2: TXP TEMP[1].xyz, INPUT[5], texture[1], 2D;
>  3: MUL_SAT TEMP[2].xyz, TEMP[0].xyz?, INPUT[1].xyz?;
>  4: MOV_SAT TEMP[2].w, INPUT[1].???w;
>  5: MUL_SAT TEMP[3].xyz, TEMP[1].xyz?, TEMP[2].xyz?;
>  6: MOV_SAT TEMP[3].w, TEMP[2].???w;
>  7: MAD_SAT TEMP[4].x, INPUT[6].x???, STATE[0].x???, STATE[0].y???;
>  8: ADD TEMP[5].xyz, TEMP[3].xyz?, STATE[1].-x-y-z-?;
>  9: MAD OUTPUT[1].xyz, TEMP[4].xxx?, TEMP[5].xyz?, STATE[1].xyz?;
> 10: MOV OUTPUT[1].w, TEMP[3].???w;
>Emit paired program
> BEGIN_TEX
>   TXP TEMP[4].xyz, INPUT[2], texture[1], 2D;
>   TXP TEMP[5].xyz, INPUT[1], texture[0], 2D;
> END_TEX
>       RGB:    Src0 = TEMP[5]  Src1 = TEMP[0]
>       Alpha:  Src0 = TEMP[0]
>  MAD_SAT TEMP[1].xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD_SAT TEMP[1].w, Src0.w, Src0.1, Src0.0
>       RGB:    Src0 = TEMP[4]  Src1 = TEMP[1]
>       Alpha:  Src0 = TEMP[1]
>  MAD_SAT TEMP[0].xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD_SAT TEMP[0].w, Src0.w, Src0.1, Src0.0
>       RGB:    Src0 = TEMP[0]  Src1 = CNST[1]
>       Alpha:  Src0 = TEMP[0]
>  MAD TEMP[1].xyz, Src0.xyz, Src0.111, -Src1.xyz
>  MAD COLOR.w, Src0.w, Src0.1, Src0.0
>       RGB:    Src0 = TEMP[3]  Src1 = CNST[0]
>       Alpha:
>  MAD_SAT TEMP[0].x, Src0.x__, Src1.x__, Src1.y__
>  NOP
>       RGB:    Src0 = TEMP[0]  Src1 = TEMP[1]  Src2 = CNST[1]
>       Alpha:
>  MAD COLOR.xyz, Src0.xxx, Src1.xyz, Src2.xyz
>  NOP
> END
>R500 Fragment Program:
>--------
>0	0:CMN_INST   0x00003807:TEX TEX_WAIT    wmask: RGB omask: NONE
>	1:TEX_INST:  0x06c10000: id: 1 op:PROJ, ACQ, IGNUNC SCALED
>	2:TEX_ADDR:  0xe404e402: src: 2 R/G/B/A dst: 4 R/G/B/A
>	3:TEX_DXDY:  0x00000000
>
>1	0:CMN_INST   0x00003807:TEX TEX_WAIT    wmask: RGB omask: NONE
>	1:TEX_INST:  0x06c00000: id: 0 op:PROJ, ACQ, IGNUNC SCALED
>	2:TEX_ADDR:  0xe405e401: src: 1 R/G/B/A dst: 5 R/G/B/A
>	3:TEX_DXDY:  0x00000000
>
>2	0:CMN_INST   0x00187804:ALU TEX_WAIT    wmask: ARGB omask: NONE
>	1:RGB_ADDR   0x00000005:Addr0: 5t, Addr1: 0t, Addr2: 0t, srcp:0
>	2:ALPHA_ADDR 0x00000000:Addr0: 0t, Addr1: 0t, Addr2: 0t, srcp:0
>	3 RGB_INST:  0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0
>	4 ALPHA_INST:0x00c0c010:MAD dest:1 alp_A_src:0 A 0 alp_B_src:0 1 0 w:0
>	5 RGBA_INST: 0x20490010:MAD dest:1 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0
>
>3	0:CMN_INST   0x00187804:ALU TEX_WAIT    wmask: ARGB omask: NONE
>	1:RGB_ADDR   0x00000404:Addr0: 4t, Addr1: 1t, Addr2: 0t, srcp:0
>	2:ALPHA_ADDR 0x00000001:Addr0: 1t, Addr1: 0t, Addr2: 0t, srcp:0
>	3 RGB_INST:  0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0
>	4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 w:0
>	5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0
>
>4	0:CMN_INST   0x00043805:OUT TEX_WAIT    wmask: RGB omask: A
>	1:RGB_ADDR   0x00040400:Addr0: 0t, Addr1: 1c, Addr2: 0t, srcp:0
>	2:ALPHA_ADDR 0x00000000:Addr0: 0t, Addr1: 0t, Addr2: 0t, srcp:0
>	3 RGB_INST:  0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0
>	4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 w:0
>	5 RGBA_INST: 0x20a21010:MAD dest:1 rgb_C_src:1 R/G/B 1 alp_C_src:0 0 0
>
>5	0:CMN_INST   0x00080804:ALU TEX_WAIT    wmask: R omask: NONE
>	1:RGB_ADDR   0x00040003:Addr0: 3t, Addr1: 0c, Addr2: 0t, srcp:0
>	2:ALPHA_ADDR 0x00000000:Addr0: 0t, Addr1: 0t, Addr2: 0t, srcp:0
>	3 RGB_INST:  0x00902480:rgb_A_src:0 R/0/0 0 rgb_B_src:1 R/0/0 0
>	4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 w:0
>	5 RGBA_INST: 0x00485000:MAD dest:0 rgb_C_src:1 G/0/0 0 alp_C_src:0 R 0
>
>6	0:CMN_INST   0x00038005:OUT TEX_WAIT    wmask: NONE omask: RGB
>	1:RGB_ADDR   0x10100400:Addr0: 0t, Addr1: 1t, Addr2: 1c, srcp:0
>	2:ALPHA_ADDR 0x00000000:Addr0: 0t, Addr1: 0t, Addr2: 0t, srcp:0
>	3 RGB_INST:  0x00442000:rgb_A_src:0 R/R/R 0 rgb_B_src:1 R/G/B 0
>	4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 w:0
>	5 RGBA_INST: 0x00222000:MAD dest:0 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0
>
>Initial vertex program:
># Vertex Program/Shader
>  0: MUL TEMP[0], INPUT[4], ENV[16].zzzz;
>  1: ARL ADDR[0].x, TEMP[0].xxxx;
>  2: DP4 TEMP[1].x, INPUT[0], ENV[ADDR+18];
>  3: DP4 TEMP[1].y, INPUT[0], ENV[ADDR+19];
>  4: DP4 TEMP[1].z, INPUT[0], ENV[ADDR+20];
>  5: DP3 TEMP[5].x, INPUT[2], ENV[ADDR+18];
>  6: DP3 TEMP[5].y, INPUT[2], ENV[ADDR+19];
>  7: DP3 TEMP[5].z, INPUT[2], ENV[ADDR+20];
>  8: ARL ADDR[0].x, TEMP[0].yxxx;
>  9: DP4 TEMP[2].x, INPUT[0], ENV[ADDR+18];
> 10: DP4 TEMP[2].y, INPUT[0], ENV[ADDR+19];
> 11: DP4 TEMP[2].z, INPUT[0], ENV[ADDR+20];
> 12: DP3 TEMP[6].x, INPUT[2], ENV[ADDR+18];
> 13: DP3 TEMP[6].y, INPUT[2], ENV[ADDR+19];
> 14: DP3 TEMP[6].z, INPUT[2], ENV[ADDR+20];
> 15: ARL ADDR[0].x, TEMP[0].zxxx;
> 16: DP4 TEMP[3].x, INPUT[0], ENV[ADDR+18];
> 17: DP4 TEMP[3].y, INPUT[0], ENV[ADDR+19];
> 18: DP4 TEMP[3].z, INPUT[0], ENV[ADDR+20];
> 19: DP3 TEMP[7].x, INPUT[2], ENV[ADDR+18];
> 20: DP3 TEMP[7].y, INPUT[2], ENV[ADDR+19];
> 21: DP3 TEMP[7].z, INPUT[2], ENV[ADDR+20];
> 22: ARL ADDR[0].x, TEMP[0].wxxx;
> 23: DP4 TEMP[4].x, INPUT[0], ENV[ADDR+18];
> 24: DP4 TEMP[4].y, INPUT[0], ENV[ADDR+19];
> 25: DP4 TEMP[4].z, INPUT[0], ENV[ADDR+20];
> 26: DP3 TEMP[8].x, INPUT[2], ENV[ADDR+18];
> 27: DP3 TEMP[8].y, INPUT[2], ENV[ADDR+19];
> 28: DP3 TEMP[8].z, INPUT[2], ENV[ADDR+20];
> 29: MUL TEMP[9], INPUT[1].xxxx, TEMP[1];
> 30: MAD TEMP[9], TEMP[2], INPUT[1].yyyy, TEMP[9];
> 31: MAD TEMP[9], TEMP[3], INPUT[1].zzzz, TEMP[9];
> 32: MAD TEMP[9], TEMP[4], INPUT[1].wwww, TEMP[9];
> 33: MOV TEMP[9].w, ENV[16].wwww;
> 34: MUL TEMP[10], INPUT[1].xxxx, TEMP[5];
> 35: MAD TEMP[10], TEMP[6], INPUT[1].yyyy, TEMP[10];
> 36: MAD TEMP[10], TEMP[7], INPUT[1].zzzz, TEMP[10];
> 37: MAD TEMP[10], TEMP[8], INPUT[1].wwww, TEMP[10];
> 38: DP4 OUTPUT[0].x, ENV[0], TEMP[9];
> 39: DP4 OUTPUT[0].y, ENV[1], TEMP[9];
> 40: DP4 OUTPUT[0].z, ENV[2], TEMP[9];
> 41: DP4 OUTPUT[0].w, ENV[3], TEMP[9];
> 42: DP3 TEMP[11].x, ENV[8], TEMP[10];
> 43: DP3 TEMP[11].y, ENV[9], TEMP[10];
> 44: DP3 TEMP[11].z, ENV[10], TEMP[10];
> 45: MOV TEMP[11].w, ENV[16].wwww;
> 46: DP3 TEMP[11].w, TEMP[11], TEMP[11];
> 47: RSQ TEMP[11].w, TEMP[11].wxxx;
> 48: MUL TEMP[11], TEMP[11], TEMP[11].wwww;
> 49: DP4 TEMP[10].x, ENV[8], TEMP[9];
> 50: DP4 TEMP[10].y, ENV[9], TEMP[9];
> 51: DP4 TEMP[10].z, ENV[10], TEMP[9];
> 52: MOV TEMP[10].w, ENV[16].wwww;
> 53: MOV TEMP[9], ENV[16].xxxw;
> 54: MOV OUTPUT[4], INPUT[8];
> 55: DP3 TEMP[1].w, TEMP[10], TEMP[10];
> 56: RSQ TEMP[1].w, TEMP[1].wxxx;
> 57: RCP TEMP[1].w, TEMP[1].wxxx;
> 58: MOV OUTPUT[3], TEMP[1].wwww;
> 59: DP3 TEMP[0].x, TEMP[10].-x-y-z-w, TEMP[11];
> 60: MUL TEMP[1], TEMP[0].xxxx, TEMP[11];
> 61: MUL TEMP[2], TEMP[1], ENV[16].yyyy;
> 62: ADD TEMP[3], TEMP[10], TEMP[2];
> 63: MOV TEMP[4], TEMP[3];
> 64: ADD TEMP[4].z, TEMP[4].zzzz, ENV[16].wwww;
> 65: DP3 TEMP[5].x, TEMP[4], TEMP[4];
> 66: RSQ TEMP[5].y, TEMP[5].xxxx;
> 67: RCP TEMP[5].z, TEMP[5].yxxx;
> 68: MUL TEMP[5].w, TEMP[5].zzzz, ENV[16].yyyy;
> 69: RCP TEMP[5].x, TEMP[5].wxxx;
> 70: MOV TEMP[6], ENV[16].xxxz;
> 71: MAD TEMP[6].x, TEMP[3].xxxx, TEMP[5].xxxx, ENV[17].wwww;
> 72: MAD TEMP[6].y, TEMP[3].yyyy, TEMP[5].xxxx, ENV[17].wwww;
> 73: MOV OUTPUT[5], TEMP[6];
> 74: ADD TEMP[9], TEMP[9], ENV[93];
> 75: DP4 TEMP[0].x, TEMP[10], ENV[92];
> 76: DP4 TEMP[0].y, TEMP[10], ENV[91];
> 77: DP4 TEMP[0].z, TEMP[10], ENV[90];
> 78: DP4 TEMP[0].w, TEMP[10], ENV[89];
> 79: MOV TEMP[10], TEMP[0];
> 80: DP3 TEMP[0].x, TEMP[11], ENV[92];
> 81: DP3 TEMP[0].y, TEMP[11], ENV[91];
> 82: DP3 TEMP[0].z, TEMP[11], ENV[90];
> 83: MOV TEMP[11], TEMP[0];
> 84: ADD TEMP[0], TEMP[10].-x-y-z-w, ENV[87];
> 85: DP3 TEMP[0].w, TEMP[0], TEMP[0];
> 86: RSQ TEMP[1].w, TEMP[0].wxxx;
> 87: MUL TEMP[2], TEMP[0], TEMP[1].wwww;
> 88: DST TEMP[3], TEMP[0].wwww, TEMP[1].wwww;
> 89: DP3 TEMP[3].w, TEMP[3], ENV[83];
> 90: RCP TEMP[3].w, TEMP[3].wxxx;
> 91: DP3 TEMP[0].x, TEMP[11], TEMP[2];
> 92: LIT TEMP[0], TEMP[0];
> 93: MUL TEMP[0], TEMP[0], TEMP[3].wwww;
> 94: MUL TEMP[1], TEMP[0].xxxx, ENV[86];
> 95: MAD TEMP[9], TEMP[1], ENV[95], TEMP[9];
> 96: ADD TEMP[0], TEMP[10].-x-y-z-w, ENV[82];
> 97: DP3 TEMP[0].w, TEMP[0], TEMP[0];
> 98: RSQ TEMP[1].w, TEMP[0].wxxx;
> 99: MUL TEMP[2], TEMP[0], TEMP[1].wwww;
>100: DST TEMP[3], TEMP[0].wwww, TEMP[1].wwww;
>101: DP3 TEMP[3].w, TEMP[3], ENV[78];
>102: RCP TEMP[3].w, TEMP[3].wxxx;
>103: DP3 TEMP[0].x, TEMP[11], TEMP[2];
>104: LIT TEMP[0], TEMP[0];
>105: MUL TEMP[0], TEMP[0], TEMP[3].wwww;
>106: MUL TEMP[1], TEMP[0].yyyy, ENV[80];
>107: MAD TEMP[9], TEMP[1], ENV[94], TEMP[9];
>108: ADD TEMP[0], TEMP[10].-x-y-z-w, ENV[77];
>109: DP3 TEMP[0].w, TEMP[0], TEMP[0];
>110: RSQ TEMP[1].w, TEMP[0].wxxx;
>111: MUL TEMP[2], TEMP[0], TEMP[1].wwww;
>112: DST TEMP[3], TEMP[0].wwww, TEMP[1].wwww;
>113: DP3 TEMP[3].w, TEMP[3], ENV[73];
>114: RCP TEMP[3].w, TEMP[3].wxxx;
>115: DP3 TEMP[0].x, TEMP[11], TEMP[2];
>116: LIT TEMP[0], TEMP[0];
>117: MUL TEMP[0], TEMP[0], TEMP[3].wwww;
>118: MUL TEMP[1], TEMP[0].yyyy, ENV[75];
>119: MAD TEMP[9], TEMP[1], ENV[94], TEMP[9];
>120: MUL OUTPUT[1], TEMP[9], ENV[15].xxxw;
>121: END
>radeonUnbindContext ctx 0xf7d33f0
>radeonFlush 10315
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(1) at 10315, from cp_wait:185
>BEGIN_BATCH(2) at 10316, from r300_vtbl_pre_emit_atoms:222
>BEGIN_BATCH(1) at 10318, from end_3d:162
>  emit at 3/3
>BEGIN_BATCH(3) at 10319, from radeon_emit_atom:1038
>radeonReleaseDmaRegions: free 0, wait 2, reserved 1, minimum_size: 65536
>nwmain: radeon_lock.c:65: radeonGetLock: Assertion `drawable != ((void *)0)' failed.

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Attachments on bug 23785: 29324 | 29325 | 29354 | 29357 | 29383 | 29384 | 29385

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