Attachment 34594 Details for Bug 27355 – R300 AD only has one quad pipe

[patch] R300 AD only has one quad pipe

0001-drm-radeon-R300-AD-only-has-one-quad-pipe.patch (text/plain), 2.59 KB, created by Michel Dänzer on 2010-04-01 01:35:14 UTC

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Creator: Michel Dänzer

Created: 2010-04-01 01:35:14 UTC

Size: 2.59 KB

patch

obsolete

>From ac8c8618c625039ec29870c2a9c36733695ecd56 Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <daenzer@vmware.com>
>Date: Thu, 1 Apr 2010 10:18:09 +0200
>Subject: [PATCH] drm/radeon: R300 AD only has one quad pipe.
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>
>Gleaned from the Mesa code.
>
>Signed-off-by: Michel DÃ¤nzer <daenzer@vmware.com>
>---
> drivers/gpu/drm/radeon/r300.c      |    6 +++---
> drivers/gpu/drm/radeon/radeon_cp.c |   10 ++++++----
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
>index 219d410..3dae012 100644
>--- a/drivers/gpu/drm/radeon/r300.c
>+++ b/drivers/gpu/drm/radeon/r300.c
>@@ -327,12 +327,12 @@ void r300_gpu_init(struct radeon_device *rdev)
> {
> 	uint32_t gb_tile_config, tmp;
> 
>-	/* FIXME: rv380 one pipes ? */
>-	if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) {
>+	if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
>+	    (rdev->family == CHIP_R350)) {
> 		/* r300,r350 */
> 		rdev->num_gb_pipes = 2;
> 	} else {
>-		/* rv350,rv370,rv380 */
>+		/* rv350,rv370,rv380,r300 AD */
> 		rdev->num_gb_pipes = 1;
> 	}
> 	rdev->num_z_pipes = 1;
>diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
>index dc6eba6..419630d 100644
>--- a/drivers/gpu/drm/radeon/radeon_cp.c
>+++ b/drivers/gpu/drm/radeon/radeon_cp.c
>@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
> 	return -EBUSY;
> }
> 
>-static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
>+static void radeon_init_pipes(struct drm_device *dev)
> {
>+	drm_radeon_private_t *dev_priv = dev->dev_private;
> 	uint32_t gb_tile_config, gb_pipe_sel = 0;
> 
> 	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
>@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
> 		dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
> 	} else {
> 		/* R3xx */
>-		if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
>+		if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 &&
>+		     dev->pdev->device != 0x4144) ||
> 		    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
> 			dev_priv->num_gb_pipes = 2;
> 		} else {
>-			/* R3Vxx */
>+			/* RV3xx/R300 AD */
> 			dev_priv->num_gb_pipes = 1;
> 		}
> 	}
>@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev)
> 
> 	/* setup the raster pipes */
> 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
>-	    radeon_init_pipes(dev_priv);
>+	    radeon_init_pipes(dev);
> 
> 	/* Reset the CP ring */
> 	radeon_do_cp_reset(dev_priv);
>-- 
>1.7.0.3
>

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