Attachment 34961 Details for Bug 27001 – Drm related lines from dmesg for KMS boot

Drm related lines from dmesg for KMS boot

drm-boot-kms.txt (text/plain), 3.18 KB, created by Adam Hill on 2010-04-13 02:00:32 UTC

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Creator: Adam Hill

Created: 2010-04-13 02:00:32 UTC

Size: 3.18 KB

patch

obsolete

>[    2.136742] [drm] Initialized drm 1.1.0 20060810
>[    2.957323] [drm] radeon kernel modesetting enabled.
>[    2.959523] [drm] radeon: Initializing kernel modesetting.
>[    2.959832] [drm] register mmio base: 0xFDFF0000
>[    2.959835] [drm] register mmio size: 65536
>[    2.960668] [drm] Clocks initialized !
>[    2.960671] [drm] 4 Power State(s)
>[    2.960673] [drm] State 0 Default (default)
>[    2.960674] [drm] 	16 PCIE Lanes
>[    2.960675] [drm] 	3 Clock Mode(s)
>[    2.960677] [drm] 		0 engine/memory: 600000/400000
>[    2.960678] [drm] 		1 engine/memory: 600000/400000
>[    2.960680] [drm] 		2 engine/memory: 600000/400000
>[    2.960681] [drm] State 1 Performance 
>[    2.960682] [drm] 	16 PCIE Lanes
>[    2.960684] [drm] 	3 Clock Mode(s)
>[    2.960685] [drm] 		0 engine/memory: 110000/250000
>[    2.960686] [drm] 		1 engine/memory: 300000/400000
>[    2.960688] [drm] 		2 engine/memory: 600000/400000
>[    2.960689] [drm] State 2 Default 
>[    2.960690] [drm] 	16 PCIE Lanes
>[    2.960692] [drm] 	3 Clock Mode(s)
>[    2.960693] [drm] 		0 engine/memory: 600000/400000
>[    2.960695] [drm] 		1 engine/memory: 600000/400000
>[    2.960696] [drm] 		2 engine/memory: 600000/400000
>[    2.960697] [drm] State 3 Performance 
>[    2.960699] [drm] 	16 PCIE Lanes
>[    2.960700] [drm] 	3 Clock Mode(s)
>[    2.960701] [drm] 		0 engine/memory: 110000/400000
>[    2.960703] [drm] 		1 engine/memory: 300000/400000
>[    2.960704] [drm] 		2 engine/memory: 600000/400000
>[    2.960711] [drm] radeon: power management initialized
>[    2.960733] [drm] Detected VRAM RAM=256M, BAR=256M
>[    2.960735] [drm] RAM width 64bits DDR
>[    2.960833] [drm] radeon: 256M of VRAM memory ready
>[    2.960836] [drm] radeon: 512M of GTT memory ready.
>[    2.960903] [drm] radeon: using MSI.
>[    2.960940] [drm] radeon: irq initialized.
>[    2.960944] [drm] GART: num cpu pages 131072, num gpu pages 131072
>[    2.962358] [drm] Loading RV710 Microcode
>[    3.014918] [drm] ring test succeeded in 1 usecs
>[    3.015015] [drm] radeon: ib pool ready.
>[    3.015092] [drm] ib test succeeded in 0 usecs
>[    3.015425] [drm] Radeon Display Connectors
>[    3.015427] [drm] Connector 0:
>[    3.015428] [drm]   VGA
>[    3.015430] [drm]   DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c
>[    3.015432] [drm]   Encoders:
>[    3.015434] [drm]     CRT2: INTERNAL_KLDSCP_DAC2
>[    3.015435] [drm] Connector 1:
>[    3.015436] [drm]   HDMI-A
>[    3.015437] [drm]   HPD1
>[    3.015439] [drm]   DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c
>[    3.015440] [drm]   Encoders:
>[    3.015441] [drm]     DFP1: INTERNAL_UNIPHY
>[    3.015442] [drm] Connector 2:
>[    3.015444] [drm]   DVI-I
>[    3.015445] [drm]   HPD4
>[    3.015446] [drm]   DDC: 0x7f10 0x7f10 0x7f14 0x7f14 0x7f18 0x7f18 0x7f1c 0x7f1c
>[    3.015448] [drm]   Encoders:
>[    3.015449] [drm]     CRT1: INTERNAL_KLDSCP_DAC1
>[    3.015450] [drm]     DFP2: INTERNAL_UNIPHY2
>[    3.156351] [drm] fb mappable at 0xE0141000
>[    3.156355] [drm] vram apper at 0xE0000000
>[    3.156357] [drm] size 16384000
>[    3.156358] [drm] fb depth is 24
>[    3.156359] [drm]    pitch is 10240
>[    3.156434] fb0: radeondrmfb frame buffer device
>[    3.156441] [drm] Initialized radeon 2.1.0 20080528 for 0000:01:00.0 on minor 0

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Attachments on bug 27001: 33928 | 33929 | 34657 | 34960 | 34961 | 34990 | 34991 | 34992 | 35024 | 35025 | 35026 | 35027 | 35028 | 35029 | 35030 | 35031 | 35032 | 35048 | 35071

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