Attachment 35777 Details for Bug 27901 – Alternative assemble_TRIG fix

[patch] Alternative assemble_TRIG fix

mesa-r600-glsl-trig-fix.patch (text/plain), 4.76 KB, created by Alain Perrot on 2010-05-20 17:40:21 UTC

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Creator: Alain Perrot

Created: 2010-05-20 17:40:21 UTC

Size: 4.76 KB

patch

obsolete

>diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
>index 0677c54..aa3e8a1 100644
>--- a/src/mesa/drivers/dri/r600/r700_assembler.c
>+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
>@@ -2866,24 +2866,146 @@ GLboolean assemble_CMP(r700_AssemblerBase *pAsm)
> GLboolean assemble_TRIG(r700_AssemblerBase *pAsm, BITS opcode)
> {
>     int tmp;
>+
>     checkop1(pAsm);
> 
>+    /*
>+     * Normalize the angle to the range of -PI to +PI.
>+     *
>+     *          MULADD  tmp.x, angle, 1/(2*PI), 0.5
>+     *          FRACT   tmp.x, tmp.x
>+     *          ADD     tmp.y, tmp.x, 1
>+     *          CNDGE   tmp.x, tmp.x, tmp.x, tmp.y
>+     *          MULADD  tmp.x, tmp.x, 2*PI, -PI
>+     */
>+
>     tmp = gethelpr(pAsm);
> 
>-    pAsm->D.dst.opcode = SQ_OP2_INST_MUL;
>+
>+    pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
>+    pAsm->D.dst.op3    = 1;
>+
>     setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
>     pAsm->D.dst.rtype  = DST_REG_TEMPORARY;
>     pAsm->D.dst.reg    = tmp;
>-    pAsm->D.dst.writex = 1;
> 
>     assemble_src(pAsm, 0, -1);
> 
>     pAsm->S[1].src.rtype = SRC_REC_LITERAL;
>     setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X);
>+
>+    pAsm->S[2].src.rtype = SRC_REC_LITERAL;
>+    setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_Y);
>+
>     pAsm->D2.dst2.literal_slots = 1;
>-    pAsm->C[0].f = 1/(3.1415926535 * 2);
>-    pAsm->C[1].f = 0.0F;
>-    next_ins(pAsm);
>+    pAsm->C[0].f = 1.0f/(3.1415926535897f * 2.0f);
>+    pAsm->C[1].f = 0.5f;
>+
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
>+
>+    pAsm->D.dst.opcode = SQ_OP2_INST_FRACT;
>+
>+    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
>+    pAsm->D.dst.rtype  = DST_REG_TEMPORARY;
>+    pAsm->D.dst.reg    = tmp;
>+    pAsm->D.dst.writex = 1;
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
>+    pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[0].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
>+
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
>+
>+    pAsm->D.dst.opcode = SQ_OP2_INST_ADD;
>+
>+    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
>+    pAsm->D.dst.rtype  = DST_REG_TEMPORARY;
>+    pAsm->D.dst.reg    = tmp;
>+    pAsm->D.dst.writey = 1;
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
>+    pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[0].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
>+
>+    pAsm->S[1].src.rtype = SRC_REC_LITERAL;
>+    setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X);
>+
>+    pAsm->D2.dst2.literal_slots = 1;
>+    pAsm->C[0].f = 1.0f;
>+    pAsm->C[1].f = 0.0f;
>+
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
>+
>+    pAsm->D.dst.opcode = SQ_OP3_INST_CNDGT;
>+    pAsm->D.dst.op3    = 1;
>+
>+    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
>+    pAsm->D.dst.rtype  = DST_REG_TEMPORARY;
>+    pAsm->D.dst.reg    = tmp;
>+    pAsm->D.dst.writex = 1;
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
>+    pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[0].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
>+    pAsm->S[1].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[1].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X);
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[2].src), ADDR_ABSOLUTE);
>+    pAsm->S[2].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[2].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_Y);
>+
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
>+
>+    pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
>+    pAsm->D.dst.op3    = 1;
>+
>+    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
>+    pAsm->D.dst.rtype  = DST_REG_TEMPORARY;
>+    pAsm->D.dst.reg    = tmp;
>+
>+    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
>+    pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
>+    pAsm->S[0].src.reg   = tmp;
>+    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
>+
>+    pAsm->S[1].src.rtype = SRC_REC_LITERAL;
>+    setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X);
>+
>+    pAsm->S[2].src.rtype = SRC_REC_LITERAL;
>+    setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_Y);
>+
>+    pAsm->D2.dst2.literal_slots = 1;
>+    pAsm->C[0].f = 3.1415926535897f * 2.0f;
>+    pAsm->C[1].f = -3.1415926535897f;
>+
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
> 
>     pAsm->D.dst.opcode = opcode;
>     pAsm->D.dst.math = 1;
>@@ -2896,7 +3018,11 @@ GLboolean assemble_TRIG(r700_AssemblerBase *pAsm, BITS opcode)
>     setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
>     noneg_PVSSRC(&(pAsm->S[0].src));
> 
>-    next_ins(pAsm);
>+    if(( GL_FALSE == next_ins(pAsm) ))
>+    {
>+        return GL_FALSE;
>+    }
>+
> 
>     //TODO - replicate if more channels set in WriteMask
>     return GL_TRUE;

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Attachments on bug 27901: 35743 | 35776 | 35777 | 35787 | 37437

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