Attachment 36213 Details for Bug 28461 – intel_reg_dump (screen orientation set to left) *corrupted display output*

intel_reg_dump (screen orientation set to left) *corrupted display output*

intel_reg_dump.rot.left (text/plain), 10.29 KB, created by Till Matthiesen on 2010-06-11 02:54:55 UTC

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Creator: Till Matthiesen

Created: 2010-06-11 02:54:55 UTC

Size: 10.29 KB

patch

obsolete

>           CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>              C0DRB0: 0x00100010 (0x0010)
>              C0DRB1: 0x00200010 (0x0010)
>              C0DRB2: 0x00200020 (0x0020)
>              C0DRB3: 0x00860020 (0x0020)
>              C1DRB0: 0x00100010 (0x0010)
>              C1DRB1: 0x00200010 (0x0010)
>              C1DRB2: 0x00200020 (0x0020)
>              C1DRB3: 0x00860020 (0x0020)
>             C0DRA01: 0x00860086 (0x0086)
>             C0DRA23: 0x00000086 (0x0086)
>             C1DRA01: 0x00860086 (0x0086)
>             C1DRA23: 0x00000086 (0x0086)
>          PGETBL_CTL: 0xcff80001
>   VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>   VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>       VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>           DPLL_TEST: 0x00010001 ()
>        CACHE_MODE_0: 0x00006800
>             D_STATE: 0x00000000
>       DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>      RENCLK_GATE_D1: 0x70810000
>      RENCLK_GATE_D2: 0x00000000
>               SDVOB: 0x8000009c (enabled, pipe A, stall disabled, detected)
>               SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>             SDVOUDI: 0x00000000
>              DSPARB: 0x00001d9c
>              DSPFW1: 0x06880808
>              DSPFW2: 0x00000808
>              DSPFW3: 0x00000000
>                ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>                LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>                DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>                DVOB: 0x8000009c (enabled, pipe A, no stall, +hsync, +vsync)
>                DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>         DVOA_SRCDIM: 0x00000000
>         DVOB_SRCDIM: 0x00000000
>         DVOC_SRCDIM: 0x00000000
>          PP_CONTROL: 0x00000000 (power target: off)
>           PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>        PP_ON_DELAYS: 0x00000000
>       PP_OFF_DELAYS: 0x00000000
>          PP_DIVISOR: 0x00000000
>        PFIT_CONTROL: 0x00000000
>     PFIT_PGM_RATIOS: 0x10001000
>     PORT_HOTPLUG_EN: 0x04000220
>   PORT_HOTPLUG_STAT: 0x00000000
>            DSPACNTR: 0xd8000400 (enabled, pipe A)
>          DSPASTRIDE: 0x00001c00 (7168 bytes)
>             DSPAPOS: 0x00000000 (0, 0)
>            DSPASIZE: 0x00000000 (1, 1)
>            DSPABASE: 0x00000000
>            DSPASURF: 0x077d3000
>         DSPATILEOFF: 0x00000000
>           PIPEACONF: 0xc0000000 (enabled, active)
>            PIPEASRC: 0x068f0419 (1680, 1050)
>           PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>   PIPEA_GMCH_DATA_M: 0x00000000
>   PIPEA_GMCH_DATA_N: 0x00000000
>     PIPEA_DP_LINK_M: 0x00000000
>     PIPEA_DP_LINK_N: 0x00000000
>       CURSOR_A_BASE: 0x00000000
>    CURSOR_A_CONTROL: 0x00000000
>   CURSOR_A_POSITION: 0x01440306
>                FPA0: 0x00030b09 (n = 3, m1 = 11, m2 = 9)
>                FPA1: 0x00030b09 (n = 3, m1 = 11, m2 = 9)
>              DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10)
>           DPLL_A_MD: 0x00000000
>            HTOTAL_A: 0x08bf068f (1680 active, 2240 total)
>            HBLANK_A: 0x08bf068f (1680 start, 2240 end)
>             HSYNC_A: 0x07a706f7 (1784 start, 1960 end)
>            VTOTAL_A: 0x04400419 (1050 active, 1089 total)
>            VBLANK_A: 0x04400419 (1050 start, 1089 end)
>             VSYNC_A: 0x0422041c (1053 start, 1059 end)
>           BCLRPAT_A: 0x00000000
>        VSYNCSHIFT_A: 0x00000000
>            DSPBCNTR: 0x01000000 (disabled, pipe B)
>          DSPBSTRIDE: 0x00000000 (0 bytes)
>             DSPBPOS: 0x00000000 (0, 0)
>            DSPBSIZE: 0x00000000 (1, 1)
>            DSPBBASE: 0x00000000
>            DSPBSURF: 0x00000000
>         DSPBTILEOFF: 0x00000000
>           PIPEBCONF: 0x00000000 (disabled, inactive)
>            PIPEBSRC: 0x027f01df (640, 480)
>           PIPEBSTAT: 0x00000000 (status:)
>   PIPEB_GMCH_DATA_M: 0x00000000
>   PIPEB_GMCH_DATA_N: 0x00000000
>     PIPEB_DP_LINK_M: 0x00000000
>     PIPEB_DP_LINK_N: 0x00000000
>       CURSOR_B_BASE: 0x00000000
>    CURSOR_B_CONTROL: 0x00000000
>   CURSOR_B_POSITION: 0x00000000
>                FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>                FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>              DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>           DPLL_B_MD: 0x00000303
>            HTOTAL_B: 0x031f027f (640 active, 800 total)
>            HBLANK_B: 0x03170287 (648 start, 792 end)
>             HSYNC_B: 0x02ef028f (656 start, 752 end)
>            VTOTAL_B: 0x020c01df (480 active, 525 total)
>            VBLANK_B: 0x020401e7 (488 start, 517 end)
>             VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>           BCLRPAT_B: 0x00000000
>        VSYNCSHIFT_B: 0x00000000
>   VCLK_DIVISOR_VGA0: 0x00031108
>   VCLK_DIVISOR_VGA1: 0x00031406
>       VCLK_POST_DIV: 0x00020002
>            VGACNTRL: 0x80000000 (disabled)
>              TV_CTL: 0x00000000
>              TV_DAC: 0x00000000
>            TV_CSC_Y: 0x00000000
>           TV_CSC_Y2: 0x00000000
>            TV_CSC_U: 0x00000000
>           TV_CSC_U2: 0x00000000
>            TV_CSC_V: 0x00000000
>           TV_CSC_V2: 0x00000000
>        TV_CLR_KNOBS: 0x00000000
>        TV_CLR_LEVEL: 0x00000000
>          TV_H_CTL_1: 0x00000000
>          TV_H_CTL_2: 0x00000000
>          TV_H_CTL_3: 0x00000000
>          TV_V_CTL_1: 0x00000000
>          TV_V_CTL_2: 0x00000000
>          TV_V_CTL_3: 0x00000000
>          TV_V_CTL_4: 0x00000000
>          TV_V_CTL_5: 0x00000000
>          TV_V_CTL_6: 0x00000000
>          TV_V_CTL_7: 0x00000000
>         TV_SC_CTL_1: 0x00000000
>         TV_SC_CTL_2: 0x00000000
>         TV_SC_CTL_3: 0x00000000
>          TV_WIN_POS: 0x00000000
>         TV_WIN_SIZE: 0x00000000
>     TV_FILTER_CTL_1: 0x00000000
>     TV_FILTER_CTL_2: 0x00000000
>     TV_FILTER_CTL_3: 0x00000000
>       TV_CC_CONTROL: 0x00000000
>          TV_CC_DATA: 0x00000000
>         TV_H_LUMA_0: 0x00000000
>        TV_H_LUMA_59: 0x00000000
>       TV_H_CHROMA_0: 0x00000000
>      TV_H_CHROMA_59: 0x00000000
>        FBC_CFB_BASE: 0xffffffff
>         FBC_LL_BASE: 0xffffffff
>         FBC_CONTROL: 0xffffffff
>         FBC_COMMAND: 0xffffffff
>          FBC_STATUS: 0xffffffff
>        FBC_CONTROL2: 0xffffffff
>       FBC_FENCE_OFF: 0xffffffff
>         FBC_MOD_NUM: 0xffffffff
>             MI_MODE: 0x00000240
>        MI_ARB_STATE: 0x00000044
>      MI_RDRET_STATE: 0x00000000
>             ECOSKPD: 0x00000307
>                DP_B: 0x00000000
>      DPB_AUX_CH_CTL: 0x00000000
>    DPB_AUX_CH_DATA1: 0x00000000
>    DPB_AUX_CH_DATA2: 0x00000000
>    DPB_AUX_CH_DATA3: 0x00000000
>    DPB_AUX_CH_DATA4: 0x00000000
>    DPB_AUX_CH_DATA5: 0x00000000
>                DP_C: 0x00000000
>      DPC_AUX_CH_CTL: 0x00000000
>    DPC_AUX_CH_DATA1: 0x00000000
>    DPC_AUX_CH_DATA2: 0x00000000
>    DPC_AUX_CH_DATA3: 0x00000000
>    DPC_AUX_CH_DATA4: 0x00000000
>    DPC_AUX_CH_DATA5: 0x00000000
>                DP_D: 0x00000000
>      DPD_AUX_CH_CTL: 0x00000000
>    DPD_AUX_CH_DATA1: 0x00000000
>    DPD_AUX_CH_DATA2: 0x00000000
>    DPD_AUX_CH_DATA3: 0x00000000
>    DPD_AUX_CH_DATA4: 0x00000000
>    DPD_AUX_CH_DATA5: 0x00000000
>          AUD_CONFIG: 0x00000000
>    AUD_HDMIW_STATUS: 0x00000000
>      AUD_CONV_CHCNT: 0x00000000
>       VIDEO_DIP_CTL: 0x00000000
>       AUD_PINW_CNTR: 0x00000000
>         AUD_CNTL_ST: 0x00000000
>         AUD_PIN_CAP: 0x00000000
>        AUD_PINW_CAP: 0x00000000
>  AUD_PINW_UNSOLRESP: 0x00000000
>    AUD_OUT_DIG_CNVT: 0x00000000
>       AUD_OUT_CWCAP: 0x00000000
>         AUD_GRP_CAP: 0x00000000
>       FENCE START 0: 0x0929200d ( enabled, X tile walk,  384 pitch, 0x09292000 start)
>         FENCE END 0: 0x09295000 (                                   0x09295000 end)
>       FENCE START 1: 0x0dbbf06d ( enabled, X tile walk, 3456 pitch, 0x0dbbf000 start)
>         FENCE END 1: 0x0e0be000 (                                   0x0e0be000 end)
>       FENCE START 2: 0x0254f08d ( enabled, X tile walk, 4480 pitch, 0x0254f000 start)
>         FENCE END 2: 0x02576000 (                                   0x02576000 end)
>       FENCE START 3: 0x0d11d07d ( enabled, X tile walk, 3968 pitch, 0x0d11d000 start)
>         FENCE END 3: 0x0d18c000 (                                   0x0d18c000 end)
>       FENCE START 4: 0x0259f08d ( enabled, X tile walk, 4480 pitch, 0x0259f000 start)
>         FENCE END 4: 0x025c6000 (                                   0x025c6000 end)
>       FENCE START 5: 0x077d30dd ( enabled, X tile walk, 7040 pitch, 0x077d3000 start)
>         FENCE END 5: 0x07fd2000 (                                   0x07fd2000 end)
>       FENCE START 6: 0x05a1306d ( enabled, X tile walk, 3456 pitch, 0x05a13000 start)
>         FENCE END 6: 0x05f12000 (                                   0x05f12000 end)
>       FENCE START 7: 0x05f1306d ( enabled, X tile walk, 3456 pitch, 0x05f13000 start)
>         FENCE END 7: 0x06412000 (                                   0x06412000 end)
>       FENCE START 8: 0x0641306d ( enabled, X tile walk, 3456 pitch, 0x06413000 start)
>         FENCE END 8: 0x06912000 (                                   0x06912000 end)
>       FENCE START 9: 0x03e9306d ( enabled, X tile walk, 3456 pitch, 0x03e93000 start)
>         FENCE END 9: 0x04392000 (                                   0x04392000 end)
>      FENCE START 10: 0x01bb006d ( enabled, X tile walk, 3456 pitch, 0x01bb0000 start)
>        FENCE END 10: 0x020af000 (                                   0x020af000 end)
>      FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>        FENCE END 11: 0x00000000 (                                   0x00000000 end)
>      FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>        FENCE END 12: 0x00000000 (                                   0x00000000 end)
>      FENCE START 13: 0x0148001d ( enabled, X tile walk,  896 pitch, 0x01480000 start)
>        FENCE END 13: 0x01485000 (                                   0x01485000 end)
>      FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>        FENCE END 14: 0x00000000 (                                   0x00000000 end)
>      FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>        FENCE END 15: 0x00000000 (                                   0x00000000 end)
>             INST_PM: 0x00000000
>pipe A dot 145920 n 3 m1 11 m2 9 p1 1 p2 10
>pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10

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Attachments on bug 28461: 36211 | 36212 | 36213 | 36281 | 36282 | 36283

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