Attachment 37107 Details for Bug 28479 – [Patch 3/4]: Use fixed panel timing to drive eDP

[patch] [Patch 3/4]: Use fixed panel timing to drive eDP

0003-drm-i915-Always-use-the-fixed-panel-timing-for-eDP.patch (text/plain), 2.29 KB, created by ykzhao on 2010-07-16 00:27:23 UTC

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Creator: ykzhao

Created: 2010-07-16 00:27:23 UTC

Size: 2.29 KB

patch

obsolete

>From db8310961a54b9448bf86f4c85263d5eab0bc6ae Mon Sep 17 00:00:00 2001
>From: Zhao Yakui <yakui.zhao@intel.com>
>Date: Fri, 16 Jul 2010 14:28:52 +0800
>Subject: [PATCH 3/4] drm/i915: Always use the fixed panel timing for eDP
>
>Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
>---
> drivers/gpu/drm/i915/intel_dp.c |   25 +++++++++++++++++++++++++
> 1 files changed, 25 insertions(+), 0 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>index 4c51426..ee7bd78 100644
>--- a/drivers/gpu/drm/i915/intel_dp.c
>+++ b/drivers/gpu/drm/i915/intel_dp.c
>@@ -511,11 +511,36 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
> {
> 	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
> 	struct intel_dp_priv   *dp_priv = intel_encoder->dev_priv;
>+	struct drm_device *dev = encoder->dev;
>+	struct drm_i915_private *dev_priv = dev->dev_private;
> 	int lane_count, clock;
> 	int max_lane_count = intel_dp_max_lane_count(intel_encoder);
> 	int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0;
> 	static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
> 
>+	if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) &&
>+			dev_priv->panel_fixed_mode) {
>+		adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
>+		adjusted_mode->hsync_start =
>+			dev_priv->panel_fixed_mode->hsync_start;
>+		adjusted_mode->hsync_end =
>+			dev_priv->panel_fixed_mode->hsync_end;
>+		adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
>+		adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
>+		adjusted_mode->vsync_start =
>+			dev_priv->panel_fixed_mode->vsync_start;
>+		adjusted_mode->vsync_end =
>+			dev_priv->panel_fixed_mode->vsync_end;
>+		adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
>+		adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
>+		drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
>+
>+		/*
>+		 * the mode->clock is used to calculate the Data&Link M/N
>+		 * of the pipe. For the eDP the fixed clock should be used.
>+		 */
>+		mode->clock = dev_priv->panel_fixed_mode->clock;
>+	}
> 	for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
> 		for (clock = 0; clock <= max_clock; clock++) {
> 			int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
>-- 
>1.5.4.5
>

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Attachments on bug 28479: 36190 | 36191 | 36192 | 36193 | 36699 | 36787 | 37105 | 37106 | 37107 | 37108 | 37230 | 37231 | 37232 | 37236 | 37256

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