Attachment 38014 Details for Bug 27738 – Fix wm calculation.

[patch] Fix wm calculation.

0001-drm-i915-Invert-watermarks-used-for-i8xx-i9xx.patch (text/plain), 2.32 KB, created by Chris Wilson on 2010-08-20 09:27:03 UTC

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Creator: Chris Wilson

Created: 2010-08-20 09:27:03 UTC

Size: 2.32 KB

patch

obsolete

>From 3174fab4565f560b99cec0dd8a3d97336ae82840 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Fri, 20 Aug 2010 09:51:13 +0100
>Subject: [PATCH] drm/i915: Invert watermarks used for i8xx, i9xx.
>
>The calculation seem backwards as they compute the number of entries
>that would be drained during a memory fetch, and but return the opposite
>value.
>
>References:
>
>Bug 22996, 25857, 27738, 25284
>
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/intel_display.c |   26 +++++++++-----------------
> 1 files changed, 9 insertions(+), 17 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 5e0d8ab..a2b9fd4 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -2743,7 +2743,7 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
> 					int pixel_size,
> 					unsigned long latency_ns)
> {
>-	long entries_required, wm_size;
>+	long entries;
> 
> 	/*
> 	 * Note: we need to make sure we don't overflow for various clock &
>@@ -2751,28 +2751,20 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
> 	 * clocks go from a few thousand to several hundred thousand.
> 	 * latency is usually a few thousand
> 	 */
>-	entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /
>-		1000;
>-	entries_required = DIV_ROUND_UP(entries_required, wm->cacheline_size);
>-
>-	DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries_required);
>-
>-	wm_size = wm->fifo_size - (entries_required + wm->guard_size);
>+	entries = ((clock_in_khz / 1000) * pixel_size * latency_ns) / 1000;
>+	entries = DIV_ROUND_UP(entries, wm->cacheline_size);
>+	entries += wm->guard_size;
> 
>-	DRM_DEBUG_KMS("FIFO watermark level: %d\n", wm_size);
>+	DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries);
> 
>-	/* Don't promote wm_size to unsigned... */
>-	if (wm_size > (long)wm->max_wm)
>-		wm_size = wm->max_wm;
>-	if (wm_size <= 0) {
>-		wm_size = wm->default_wm;
>+	if (entries >= (long)wm->fifo_size) {
> 		DRM_ERROR("Insufficient FIFO for plane, expect flickering:"
> 			  " entries required = %ld, available = %lu.\n",
>-			  entries_required + wm->guard_size,
>-			  wm->fifo_size);
>+			  entries, wm->fifo_size);
>+		entries = wm->fifo_size - 1;
> 	}
> 
>-	return wm_size;
>+	return entries;
> }
> 
> struct cxsr_latency {
>-- 
>1.7.1
>

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Attachments on bug 27738: 35161 | 35162 | 35163 | 35164 | 38014

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