Attachment 38418 Details for Bug 30009 – RADEON_DEBUG="fp" nexuiz

RADEON_DEBUG="fp" nexuiz

err.log (text/x-log), 15.10 KB, created by Stepan Bakshaev on 2010-09-03 23:07:40 UTC

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Creator: Stepan Bakshaev

Created: 2010-09-03 23:07:40 UTC

Size: 15.10 KB

patch

obsolete

>r300: Initial fragment program
>FRAG
>DCL IN[0], COLOR, LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>pc=0*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  0: xyz:  t0  t0  t0 -> o0.xyz               (1c000000)
>       w:  t0  t0  t0 -> o0.w                 (01000000)
>     xyz:   t0.xyz      1.0      0.0    op: 00050a80
>       w:     t0.w      1.0      0.0    op: 00040889
>r300: Initial fragment program
>FRAG
>DCL IN[0], COLOR, PERSPECTIVE
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>pc=1*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  0: xyz:  t0  t0  t0 -> o0.xyz               (1c000000)
>       w:  t0  t0  t0 -> o0.w                 (01000000)
>     xyz:   t0.xyz      1.0      0.0    op: 00050a80
>       w:     t0.w      1.0      0.0    op: 00040889
>r300: Initial fragment program
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: TEX temp[1], input[0], 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TEX temp[0], input[0].xy__, 2D[0];
>  2: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TEX temp[0], temp[0].xy__, 2D[0];
>  2: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>pc=2*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  TEX:
>    TEX t0, t0, texture[0]   (00008000)
>  0: xyz:  t0  t0  t0 -> o0.xyz               (1c000000)
>       w:  t0  t0  t0 -> o0.w                 (01000000)
>     xyz:   t0.xyz      1.0      0.0    op: 00050a80
>       w:     t0.w      1.0      0.0    op: 00040889
>r300: Initial fragment program
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0]
>DCL TEMP[0]
>  0: TXP TEMP[0], IN[0], SAMP[0], 2D
>  1: MUL OUT[0], TEMP[0], CONST[0]
>  2: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: TXP temp[0], input[0], 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: TXP temp[0], input[0], 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: TXP temp[0], input[0], 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: TXP temp[0], input[0], 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: TXP temp[0], input[0], 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: MUL output[0], temp[0], const[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: TXP temp[0], input[0].xy_w, 2D[0];
>  1: src0.xyz = temp[0], src0.w = temp[0], src1.xyz = const[0], src1.w = const[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TXP temp[0], input[0].xy_w, 2D[0];
>  2: src0.xyz = temp[0], src0.w = temp[0], src1.xyz = const[0], src1.w = const[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TXP temp[0], temp[0].xy_w, 2D[0];
>  2: src0.xyz = temp[0], src0.w = temp[0], src1.xyz = const[0], src1.w = const[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>pc=3*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  TEX:
>    TXP t0, t0, texture[0]   (00018000)
>  0: xyz:  t0  c0  t0 -> o0.xyz               (1c000800)
>       w:  t0  c0  t0 -> o0.w                 (01000800)
>     xyz:   t0.xyz   c0.xyz      0.0    op: 00050200
>       w:     t0.w     c0.w      0.0    op: 00040509
>r300: Initial fragment program
>FRAG
>DCL OUT[0], COLOR
>DCL CONST[0]
>  0: MOV OUT[0], CONST[0]
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: MOV output[0], const[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: src0.xyz = const[0], src0.w = const[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: src0.xyz = const[0], src0.w = const[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: src0.xyz = const[0], src0.w = const[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>pc=4*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  0: xyz:  c0  t0  t0 -> o0.xyz               (1c000020)
>       w:  c0  t0  t0 -> o0.w                 (01000020)
>     xyz:   c0.xyz      1.0      0.0    op: 00050a80
>       w:     c0.w      1.0      0.0    op: 00040889
>r300: Initial fragment program
>FRAG
>DCL IN[0], COLOR, LINEAR
>DCL IN[1], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0]
>  0: TXP TEMP[0], IN[1], SAMP[0], 2D
>  1: MUL OUT[0], TEMP[0], IN[0]
>  2: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: TXP temp[0], input[1], 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after transform loops
># Radeon Compiler Program
>  0: TXP temp[0], input[1], 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after emulate branches
># Radeon Compiler Program
>  0: TXP temp[0], input[1], 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after native rewrite part 1
># Radeon Compiler Program
>  0: TXP temp[0], input[1], 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after native rewrite part 2
># Radeon Compiler Program
>  0: TXP temp[0], input[1], 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after deadcode
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after emulate loops
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after dataflow optimize
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after dataflow passes
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after constants cleanup
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after register rename
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: MUL output[0], temp[0], input[0];
>Fragment Program: after pair translate
># Radeon Compiler Program
>  0: TXP temp[0], input[1].xy_w, 2D[0];
>  1: src0.xyz = temp[0], src0.w = temp[0], src1.xyz = input[0], src1.w = input[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>Fragment Program: after pair scheduling
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TXP temp[0], input[1].xy_w, 2D[0];
>  2: src0.xyz = temp[0], src0.w = temp[0], src1.xyz = input[0], src1.w = input[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>Fragment Program: after register allocation
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TXP temp[1], temp[1].xy_w, 2D[0];
>  2: src0.xyz = temp[1], src0.w = temp[1], src1.xyz = temp[0], src1.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src1.xyz, src0.000
>     MAD color[0].w, src0.w, src1.w, src0.0
>pc=5*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  TEX:
>    TXP t1, t1, texture[0]   (00018041)
>  0: xyz:  t1  t0  t0 -> o0.xyz               (1c000001)
>       w:  t1  t0  t0 -> o0.w                 (01000001)
>     xyz:   t1.xyz   t0.xyz      0.0    op: 00050200
>       w:     t1.w     t0.w      0.0    op: 00040509
>radeon: The kernel rejected CS, see dmesg for more information.

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Attachments on bug 30009: 38417 | 38418 | 38466

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