Attachment 40028 Details for Bug 31366 – Dmesg with debug of the 2.6.32.x kernel

Dmesg with debug of the 2.6.32.x kernel

drmdmesgold (text/plain), 163.19 KB, created by Unbekandt Léo on 2010-11-03 15:32:46 UTC

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Creator: Unbekandt Léo

Created: 2010-11-03 15:32:46 UTC

Size: 163.19 KB

patch

obsolete

>Initializing cgroup subsys cpuset
>Initializing cgroup subsys cpu
>Linux version 2.6.32-lts (tobias@T-POWA-LX) (gcc version 4.5.1 (GCC) ) #1 SMP Sun Oct 31 08:35:13 CET 2010
>Command line: root=/dev/mapper/vg_soulou2-LogVol00 ro
>KERNEL supported cpus:
>  Intel GenuineIntel
>  AMD AuthenticAMD
>  Centaur CentaurHauls
>BIOS-provided physical RAM map:
> BIOS-e820: 0000000000000000 - 000000000009dc00 (usable)
> BIOS-e820: 000000000009dc00 - 00000000000a0000 (reserved)
> BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
> BIOS-e820: 0000000000100000 - 000000008fec0000 (usable)
> BIOS-e820: 000000008fec0000 - 000000008fecf000 (ACPI data)
> BIOS-e820: 000000008fecf000 - 000000008fee5000 (ACPI NVS)
> BIOS-e820: 000000008fee5000 - 00000000a0000000 (reserved)
> BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
> BIOS-e820: 00000000fec00000 - 00000000fec10000 (reserved)
> BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved)
> BIOS-e820: 00000000fff80000 - 0000000100000000 (reserved)
> BIOS-e820: 0000000100000000 - 0000000160000000 (usable)
>DMI present.
>last_pfn = 0x160000 max_arch_pfn = 0x400000000
>MTRR default type: uncachable
>MTRR fixed ranges enabled:
>  00000-9FFFF write-back
>  A0000-BFFFF uncachable
>  C0000-C7FFF write-protect
>  C8000-DBFFF uncachable
>  DC000-EFFFF write-through
>  F0000-FFFFF write-back
>MTRR variable ranges enabled:
>  0 base 0A0000000 mask FE0000000 uncachable
>  1 base 0C0000000 mask FC0000000 uncachable
>  2 base 000000000 mask F00000000 write-back
>  3 base 100000000 mask FC0000000 write-back
>  4 base 140000000 mask FE0000000 write-back
>  5 base 09FF00000 mask FFFF00000 uncachable
>  6 disabled
>  7 disabled
>x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
>e820 update range: 000000009ff00000 - 0000000100000000 (usable) ==> (reserved)
>last_pfn = 0x8fec0 max_arch_pfn = 0x400000000
>e820 update range: 0000000000001000 - 0000000000006000 (usable) ==> (reserved)
>Scanning 1 areas for low memory corruption
>modified physical RAM map:
> modified: 0000000000000000 - 0000000000001000 (usable)
> modified: 0000000000001000 - 0000000000006000 (reserved)
> modified: 0000000000006000 - 000000000009dc00 (usable)
> modified: 000000000009dc00 - 00000000000a0000 (reserved)
> modified: 00000000000e4000 - 0000000000100000 (reserved)
> modified: 0000000000100000 - 000000008fec0000 (usable)
> modified: 000000008fec0000 - 000000008fecf000 (ACPI data)
> modified: 000000008fecf000 - 000000008fee5000 (ACPI NVS)
> modified: 000000008fee5000 - 00000000a0000000 (reserved)
> modified: 00000000e0000000 - 00000000f0000000 (reserved)
> modified: 00000000fec00000 - 00000000fec10000 (reserved)
> modified: 00000000fee00000 - 00000000fee01000 (reserved)
> modified: 00000000fff80000 - 0000000100000000 (reserved)
> modified: 0000000100000000 - 0000000160000000 (usable)
>initial memory mapped : 0 - 20000000
>init_memory_mapping: 0000000000000000-000000008fec0000
> 0000000000 - 008fe00000 page 2M
> 008fe00000 - 008fec0000 page 4k
>kernel direct mapping tables up to 8fec0000 @ 8000-d000
>init_memory_mapping: 0000000100000000-0000000160000000
> 0100000000 - 0160000000 page 2M
>kernel direct mapping tables up to 160000000 @ b000-12000
>RAMDISK: 37cfd000 - 37fef544
>ACPI: RSDP 00000000000f7b20 00024 (v02 PTLTD )
>ACPI: XSDT 000000008fec3ac3 000A4 (v01 DELL    QA09    06040000  LTP 00000000)
>ACPI: FACP 000000008fecec04 000F4 (v03 NVIDIA MCP79    06040000 PTL_ 000F4240)
>ACPI: DSDT 000000008fec5655 0953B (v01 NVIDIA    MCP79 06040000 MSFT 03000001)
>ACPI: FACS 000000008fee4fc0 00040
>ACPI: MCFG 000000008fececf8 0003C (v01 PTLTD    MCFG   06040000  LTP 00000000)
>ACPI: HPET 000000008feced34 00038 (v01 PTLTD  HPETTBL  06040000  LTP 00000001)
>ACPI: APIC 000000008feced6c 00072 (v01 PTLTD  ? APIC   06040000  LTP 00000000)
>ACPI: BOOT 000000008fecedde 00028 (v01 PTLTD  $SBFTBL$ 06040000  LTP 00000001)
>ACPI: SLIC 000000008fecee06 00176 (v01 DELL    QA09    06040000  LTP 00000000)
>ACPI: OSFR 000000008fecef7c 00084 (v01 DELL   DELL     06040000 ASL  00000061)
>ACPI: SSDT 000000008fec53f6 0025F (v01  PmRef  Cpu0Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec5350 000A6 (v01  PmRef  Cpu7Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec52aa 000A6 (v01  PmRef  Cpu6Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec5204 000A6 (v01  PmRef  Cpu5Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec515e 000A6 (v01  PmRef  Cpu4Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec50b8 000A6 (v01  PmRef  Cpu3Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec5012 000A6 (v01  PmRef  Cpu2Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec4f6c 000A6 (v01  PmRef  Cpu1Tst 00003000 INTL 20050228)
>ACPI: SSDT 000000008fec3b67 01405 (v01  PmRef    CpuPm 00003000 INTL 20050228)
>ACPI: Local APIC address 0xfee00000
>(8 early reservations) ==> bootmem [0000000000 - 0160000000]
>  #0 [0000000000 - 0000001000]   BIOS data page ==> [0000000000 - 0000001000]
>  #1 [0000006000 - 0000008000]       TRAMPOLINE ==> [0000006000 - 0000008000]
>  #2 [0001000000 - 00017bf438]    TEXT DATA BSS ==> [0001000000 - 00017bf438]
>  #3 [0037cfd000 - 0037fef544]          RAMDISK ==> [0037cfd000 - 0037fef544]
>  #4 [000009dc00 - 0000100000]    BIOS reserved ==> [000009dc00 - 0000100000]
>  #5 [00017c0000 - 00017c016c]              BRK ==> [00017c0000 - 00017c016c]
>  #6 [0000008000 - 000000b000]          PGTABLE ==> [0000008000 - 000000b000]
>  #7 [000000b000 - 000000d000]          PGTABLE ==> [000000b000 - 000000d000]
>found SMP MP-table at [ffff8800000f7b50] f7b50
> [ffffea0000000000-ffffea0004dfffff] PMD -> [ffff880001800000-ffff880004dfffff] on node 0
>Zone PFN ranges:
>  DMA      0x00000000 -> 0x00001000
>  DMA32    0x00001000 -> 0x00100000
>  Normal   0x00100000 -> 0x00160000
>Movable zone start PFN for each node
>early_node_map[4] active PFN ranges
>    0: 0x00000000 -> 0x00000001
>    0: 0x00000006 -> 0x0000009d
>    0: 0x00000100 -> 0x0008fec0
>    0: 0x00100000 -> 0x00160000
>On node 0 totalpages: 982616
>  DMA zone: 56 pages used for memmap
>  DMA zone: 106 pages reserved
>  DMA zone: 3830 pages, LIFO batch:0
>  DMA32 zone: 14280 pages used for memmap
>  DMA32 zone: 571128 pages, LIFO batch:31
>  Normal zone: 5376 pages used for memmap
>  Normal zone: 387840 pages, LIFO batch:31
>ACPI: PM-Timer IO Port: 0x1008
>ACPI: Local APIC address 0xfee00000
>ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
>ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
>ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
>ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
>ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
>IOAPIC[0]: apic_id 2, version 17, address 0xfec00000, GSI 0-23
>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge)
>ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>ACPI: IRQ0 used by override.
>ACPI: IRQ2 used by override.
>ACPI: IRQ9 used by override.
>Using ACPI (MADT) for SMP configuration information
>ACPI: HPET id: 0x10dea301 base: 0xfed00000
>SMP: Allowing 2 CPUs, 0 hotplug CPUs
>nr_irqs_gsi: 24
>PM: Registered nosave memory: 0000000000001000 - 0000000000006000
>PM: Registered nosave memory: 000000000009d000 - 000000000009e000
>PM: Registered nosave memory: 000000000009e000 - 00000000000a0000
>PM: Registered nosave memory: 00000000000a0000 - 00000000000e4000
>PM: Registered nosave memory: 00000000000e4000 - 0000000000100000
>PM: Registered nosave memory: 000000008fec0000 - 000000008fecf000
>PM: Registered nosave memory: 000000008fecf000 - 000000008fee5000
>PM: Registered nosave memory: 000000008fee5000 - 00000000a0000000
>PM: Registered nosave memory: 00000000a0000000 - 00000000e0000000
>PM: Registered nosave memory: 00000000e0000000 - 00000000f0000000
>PM: Registered nosave memory: 00000000f0000000 - 00000000fec00000
>PM: Registered nosave memory: 00000000fec00000 - 00000000fec10000
>PM: Registered nosave memory: 00000000fec10000 - 00000000fee00000
>PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000
>PM: Registered nosave memory: 00000000fee01000 - 00000000fff80000
>PM: Registered nosave memory: 00000000fff80000 - 0000000100000000
>Allocating PCI resources starting at a0000000 (gap: a0000000:40000000)
>Booting paravirtualized kernel on bare hardware
>NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:2 nr_node_ids:1
>PERCPU: Embedded 29 pages/cpu @ffff880005000000 s89048 r8192 d21544 u1048576
>pcpu-alloc: s89048 r8192 d21544 u1048576 alloc=1*2097152
>pcpu-alloc: [0] 0 1 
>Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 962798
>Kernel command line: root=/dev/mapper/vg_soulou2-LogVol00 ro
>PID hash table entries: 4096 (order: 3, 32768 bytes)
>Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>Initializing CPU#0
>xsave/xrstor: enabled xstate_bv 0x3, cntxt size 0x240
>Checking aperture...
>No AGP bridge found
>Calgary: detecting Calgary via BIOS EBDA area
>Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>Placing 64MB software IO TLB between ffff88000571e000 - ffff88000971e000
>software IO TLB at phys 0x571e000 - 0x971e000
>Memory: 3790488k/5767168k available (3428k kernel code, 1836704k absent, 138992k reserved, 2191k data, 484k init)
>SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
>Hierarchical RCU implementation.
>NR_IRQS:2304
>Extended CMOS year: 2000
>spurious 8259A interrupt: IRQ7.
>Console: colour VGA+ 80x25
>console [tty0] enabled
>allocated 39321600 bytes of page_cgroup
>please try 'cgroup_disable=memory' option if you don't want memory cgroups
>hpet clockevent registered
>HPET: 4 timers in total, 0 timers will be used for per-cpu timer
>Fast TSC calibration using PIT
>Detected 2662.641 MHz processor.
>Calibrating delay loop (skipped), value calculated using timer frequency.. 5325.28 BogoMIPS (lpj=26626410)
>Security Framework initialized
>TOMOYO Linux initialized
>Mount-cache hash table entries: 256
>Initializing cgroup subsys ns
>Initializing cgroup subsys cpuacct
>Initializing cgroup subsys memory
>Initializing cgroup subsys devices
>Initializing cgroup subsys freezer
>Initializing cgroup subsys net_cls
>CPU: L1 I cache: 32K, L1 D cache: 32K
>CPU: L2 cache: 6144K
>CPU: Physical Processor ID: 0
>CPU: Processor Core ID: 0
>mce: CPU supports 6 MCE banks
>CPU0: Thermal monitoring handled by SMI
>using mwait in idle threads.
>Performance Events: Core2 events, Intel PMU driver.
>... version:                2
>... bit width:              40
>... generic registers:      2
>... value mask:             000000ffffffffff
>... max period:             000000007fffffff
>... fixed-purpose events:   3
>... event mask:             0000000700000003
>ACPI: Core revision 20090903
>Setting APIC routing to flat
>..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>CPU0: Intel(R) Core(TM)2 Duo CPU     P9600  @ 2.66GHz stepping 0a
>Booting processor 1 APIC 0x1 ip 0x6000
>Initializing CPU#1
>CPU: L1 I cache: 32K, L1 D cache: 32K
>CPU: L2 cache: 6144K
>CPU: Physical Processor ID: 0
>CPU: Processor Core ID: 1
>CPU1: Thermal monitoring handled by SMI
>CPU1: Intel(R) Core(TM)2 Duo CPU     P9600  @ 2.66GHz stepping 0a
>checking TSC synchronization [CPU#0 -> CPU#1]: passed.
>Brought up 2 CPUs
>Total of 2 processors activated (10662.01 BogoMIPS).
>CPU0 attaching sched-domain:
> domain 0: span 0-1 level MC
>  groups: 0 1
>CPU1 attaching sched-domain:
> domain 0: span 0-1 level MC
>  groups: 1 0
>devtmpfs: initialized
>NET: Registered protocol family 16
>ACPI: bus type pci registered
>PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 7
>PCI: MCFG area at e0000000 reserved in E820
>PCI: Using MMCONFIG at e0000000 - e07fffff
>PCI: Using configuration type 1 for base access
>bio: create slab <bio-0> at 0
>ACPI: EC: Look up EC in DSDT
>ACPI: Interpreter enabled
>ACPI: (supports S0 S3 S4 S5)
>ACPI: Using IOAPIC for interrupt routing
>ACPI: EC: GPE = 0x47, I/O: command/status = 0x66, data = 0x62
>ACPI: No dock devices found.
>ACPI: PCI Root Bridge [PCI0] (0000:00)
>pci 0000:00:03.0: reg 10 io port: [0x1c00-0x1cff]
>pci 0000:00:03.2: reg 10 io port: [0x3080-0x30bf]
>pci 0000:00:03.2: reg 20 io port: [0x3040-0x307f]
>pci 0000:00:03.2: reg 24 io port: [0x2000-0x203f]
>pci 0000:00:03.2: PME# supported from D3hot D3cold
>pci 0000:00:03.2: PME# disabled
>pci 0000:00:03.5: reg 10 32bit mmio: [0xf0600000-0xf067ffff]
>pci 0000:00:04.0: reg 10 32bit mmio: [0xf0886000-0xf0886fff]
>pci 0000:00:04.0: supports D1 D2
>pci 0000:00:04.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:04.0: PME# disabled
>pci 0000:00:04.1: reg 10 32bit mmio: [0xf0889000-0xf08890ff]
>pci 0000:00:04.1: supports D1 D2
>pci 0000:00:04.1: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:04.1: PME# disabled
>pci 0000:00:06.0: reg 10 32bit mmio: [0xf0887000-0xf0887fff]
>pci 0000:00:06.0: supports D1 D2
>pci 0000:00:06.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:06.0: PME# disabled
>pci 0000:00:06.1: reg 10 32bit mmio: [0xf0889400-0xf08894ff]
>pci 0000:00:06.1: supports D1 D2
>pci 0000:00:06.1: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:06.1: PME# disabled
>pci 0000:00:08.0: reg 10 32bit mmio: [0xf0880000-0xf0883fff]
>pci 0000:00:08.0: PME# supported from D3hot D3cold
>pci 0000:00:08.0: PME# disabled
>pci 0000:00:0a.0: reg 10 32bit mmio: [0xf0888000-0xf0888fff]
>pci 0000:00:0a.0: reg 14 io port: [0x30d0-0x30d7]
>pci 0000:00:0a.0: reg 18 32bit mmio: [0xf0889c00-0xf0889cff]
>pci 0000:00:0a.0: reg 1c 32bit mmio: [0xf0889800-0xf088980f]
>pci 0000:00:0a.0: supports D1 D2
>pci 0000:00:0a.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:0a.0: PME# disabled
>pci 0000:00:0b.0: reg 10 io port: [0x30e8-0x30ef]
>pci 0000:00:0b.0: reg 14 io port: [0x30dc-0x30df]
>pci 0000:00:0b.0: reg 18 io port: [0x30e0-0x30e7]
>pci 0000:00:0b.0: reg 1c io port: [0x30d8-0x30db]
>pci 0000:00:0b.0: reg 20 io port: [0x30c0-0x30cf]
>pci 0000:00:0b.0: reg 24 32bit mmio: [0xf0884000-0xf0885fff]
>pci 0000:00:0c.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:0c.0: PME# disabled
>pci 0000:00:10.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:10.0: PME# disabled
>pci 0000:00:15.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:15.0: PME# disabled
>pci 0000:00:16.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:16.0: PME# disabled
>pci 0000:00:17.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:17.0: PME# disabled
>pci 0000:00:18.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:00:18.0: PME# disabled
>pci 0000:01:07.0: reg 10 32bit mmio: [0xf0500000-0xf05007ff]
>pci 0000:01:07.0: supports D1 D2
>pci 0000:01:07.0: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:01:07.0: PME# disabled
>pci 0000:01:07.1: reg 10 32bit mmio: [0xf0500800-0xf05008ff]
>pci 0000:01:07.1: supports D1 D2
>pci 0000:01:07.1: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:01:07.1: PME# disabled
>pci 0000:01:07.2: reg 10 32bit mmio: [0xf0500c00-0xf0500cff]
>pci 0000:01:07.2: supports D1 D2
>pci 0000:01:07.2: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:01:07.2: PME# disabled
>pci 0000:01:07.3: reg 10 32bit mmio: [0xf0501000-0xf05010ff]
>pci 0000:01:07.3: supports D1 D2
>pci 0000:01:07.3: PME# supported from D0 D1 D2 D3hot D3cold
>pci 0000:01:07.3: PME# disabled
>pci 0000:00:09.0: transparent bridge
>pci 0000:00:09.0: bridge 32bit mmio: [0xf0500000-0xf05fffff]
>pci 0000:02:00.0: reg 10 32bit mmio: [0xae000000-0xaeffffff]
>pci 0000:02:00.0: reg 14 64bit mmio pref: [0xd0000000-0xdfffffff]
>pci 0000:02:00.0: reg 1c 64bit mmio: [0xac000000-0xadffffff]
>pci 0000:02:00.0: reg 24 io port: [0x4000-0x407f]
>pci 0000:02:00.0: reg 30 32bit mmio pref: [0x000000-0x01ffff]
>pci 0000:00:0c.0: bridge io port: [0x4000-0x4fff]
>pci 0000:00:0c.0: bridge 32bit mmio: [0xac000000-0xaeffffff]
>pci 0000:00:0c.0: bridge 64bit mmio pref: [0xd0000000-0xdfffffff]
>pci 0000:03:00.0: reg 10 32bit mmio: [0xaa000000-0xaaffffff]
>pci 0000:03:00.0: reg 14 64bit mmio pref: [0xb0000000-0xbfffffff]
>pci 0000:03:00.0: reg 1c 64bit mmio pref: [0xcc000000-0xcdffffff]
>pci 0000:03:00.0: reg 24 io port: [0x5000-0x507f]
>pci 0000:03:00.0: reg 30 32bit mmio pref: [0x000000-0x01ffff]
>pci 0000:00:10.0: bridge io port: [0x5000-0x5fff]
>pci 0000:00:10.0: bridge 32bit mmio: [0xaa000000-0xaaffffff]
>pci 0000:00:10.0: bridge 64bit mmio pref: [0xb0000000-0xcdffffff]
>pci 0000:00:15.0: bridge io port: [0x6000-0x6fff]
>pci 0000:00:15.0: bridge 32bit mmio: [0xf0200000-0xf03fffff]
>pci 0000:00:15.0: bridge 64bit mmio pref: [0xf0000000-0xf01fffff]
>pci 0000:06:00.0: reg 10 64bit mmio: [0xf0400000-0xf040ffff]
>pci 0000:06:00.0: supports D1
>pci 0000:06:00.0: PME# supported from D0 D1 D3hot
>pci 0000:06:00.0: PME# disabled
>pci 0000:06:00.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
>pci 0000:00:16.0: bridge 32bit mmio: [0xf0400000-0xf04fffff]
>pci_bus 0000:00: on NUMA node 0
>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.IXVE._PRT]
>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P2P0._PRT]
>ACPI: PCI Interrupt Link [LNK1] (IRQs 5 7 *10 11 14 15)
>ACPI: PCI Interrupt Link [LNK2] (IRQs 5 7 10 *11 14 15)
>ACPI: PCI Interrupt Link [LNK3] (IRQs 5 7 10 11 14 15) *0, disabled.
>ACPI: PCI Interrupt Link [LNK4] (IRQs 5 7 10 11 14 15) *0, disabled.
>ACPI: PCI Interrupt Link [Z00Q] (IRQs 18 19 20 21 22 23) *11
>ACPI: PCI Interrupt Link [Z00R] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00S] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00T] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00U] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00V] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00W] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00X] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00Y] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00Z] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z010] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z011] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z012] (IRQs 18 19 20 21 22 23) *10
>ACPI: PCI Interrupt Link [Z013] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z014] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z015] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z016] (IRQs 18 19 20 21 22 23) *11
>ACPI: PCI Interrupt Link [Z017] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z018] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z019] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01A] (IRQs 18 19 20 21 22 23) *10
>ACPI: PCI Interrupt Link [Z01B] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01C] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01D] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01E] (IRQs 18 19 20 21 22 23) *11
>ACPI: PCI Interrupt Link [Z01F] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01G] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z01H] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [LSMB] (IRQs 18 19 20 21 22 23) *10
>ACPI: PCI Interrupt Link [LUS0] (IRQs 18 19 20 21 22 23) *7
>ACPI: PCI Interrupt Link [LUS2] (IRQs 18 19 20 21 22 23) *11
>ACPI: PCI Interrupt Link [LMAC] (IRQs 18 19 20 21 22 23) *10
>ACPI: PCI Interrupt Link [LAZA] (IRQs 17) *11
>ACPI: PCI Interrupt Link [LGPU] (IRQs 18 19 20 21 22 23) *5
>ACPI: PCI Interrupt Link [LPID] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [LSI0] (IRQs 18 19 20 21 22 23) *11
>ACPI: PCI Interrupt Link [LSI1] (IRQs 18 19 20 21 22 23) *0, disabled.
>ACPI: PCI Interrupt Link [Z00O] (IRQs 18 19 20 21 22 23) *5
>ACPI: PCI Interrupt Link [Z00P] (IRQs 18 19 20 21 22 23) *10
>ACPI: PCI Interrupt Link [LPMU] (IRQs 18 19 20 21 22 23) *10
>vgaarb: device added: PCI:0000:02:00.0,decodes=io+mem,owns=none,locks=none
>vgaarb: device added: PCI:0000:03:00.0,decodes=io+mem,owns=io+mem,locks=none
>vgaarb: loaded
>PCI: Using ACPI for IRQ routing
>NetLabel: Initializing
>NetLabel:  domain hash size = 128
>NetLabel:  protocols = UNLABELED CIPSOv4
>NetLabel:  unlabeled traffic allowed by default
>hpet0: at MMIO 0xfed00000, IRQs 2, 8, 31, 31
>hpet0: 4 comparators, 64-bit 25.000000 MHz counter
>Switching to clocksource tsc
>pnp: PnP ACPI init
>ACPI: bus type pnp registered
>pnp 00:03: mem resource (0xf0600000-0xf0607fff) overlaps 0000:00:03.5 BAR 0 (0xf0600000-0xf067ffff), disabling
>pnp: PnP ACPI: found 13 devices
>ACPI: ACPI bus type pnp unregistered
>system 00:00: iomem range 0xffc00000-0xffffffff could not be reserved
>system 00:00: iomem range 0xfec00000-0xfec00fff could not be reserved
>system 00:00: iomem range 0xfee00000-0xfeefffff could not be reserved
>system 00:00: iomem range 0xfed00000-0xfed00fff has been reserved
>system 00:04: ioport range 0x1000-0x107f has been reserved
>system 00:04: ioport range 0x1080-0x10ff has been reserved
>system 00:04: ioport range 0x1400-0x147f has been reserved
>system 00:04: ioport range 0x1480-0x14ff has been reserved
>system 00:04: ioport range 0x1800-0x187f has been reserved
>system 00:04: ioport range 0x1880-0x18ff has been reserved
>system 00:07: ioport range 0x4d0-0x4d1 has been reserved
>system 00:07: ioport range 0x910-0x911 has been reserved
>system 00:07: ioport range 0x295-0x296 has been reserved
>pci 0000:00:09.0: PCI bridge, secondary bus 0000:01
>pci 0000:00:09.0:   IO window: disabled
>pci 0000:00:09.0:   MEM window: 0xf0500000-0xf05fffff
>pci 0000:00:09.0:   PREFETCH window: disabled
>pci 0000:02:00.0: BAR 6: can't allocate mem resource [0xe0000000-0xdfffffff]
>pci 0000:00:0c.0: PCI bridge, secondary bus 0000:02
>pci 0000:00:0c.0:   IO window: 0x4000-0x4fff
>pci 0000:00:0c.0:   MEM window: 0xac000000-0xaeffffff
>pci 0000:00:0c.0:   PREFETCH window: 0x000000d0000000-0x000000dfffffff
>pci 0000:00:10.0: PCI bridge, secondary bus 0000:03
>pci 0000:00:10.0:   IO window: 0x5000-0x5fff
>pci 0000:00:10.0:   MEM window: 0xaa000000-0xaaffffff
>pci 0000:00:10.0:   PREFETCH window: 0x000000b0000000-0x000000cdffffff
>pci 0000:00:15.0: PCI bridge, secondary bus 0000:04
>pci 0000:00:15.0:   IO window: 0x6000-0x6fff
>pci 0000:00:15.0:   MEM window: 0xf0200000-0xf03fffff
>pci 0000:00:15.0:   PREFETCH window: 0x000000f0000000-0x000000f01fffff
>pci 0000:00:16.0: PCI bridge, secondary bus 0000:06
>pci 0000:00:16.0:   IO window: disabled
>pci 0000:00:16.0:   MEM window: 0xf0400000-0xf04fffff
>pci 0000:00:16.0:   PREFETCH window: disabled
>pci 0000:00:17.0: PCI bridge, secondary bus 0000:07
>pci 0000:00:17.0:   IO window: disabled
>pci 0000:00:17.0:   MEM window: disabled
>pci 0000:00:17.0:   PREFETCH window: disabled
>pci 0000:00:18.0: PCI bridge, secondary bus 0000:08
>pci 0000:00:18.0:   IO window: disabled
>pci 0000:00:18.0:   MEM window: disabled
>pci 0000:00:18.0:   PREFETCH window: disabled
>pci 0000:00:09.0: setting latency timer to 64
>ACPI: PCI Interrupt Link [Z00Q] enabled at IRQ 23
>pci 0000:00:0c.0: PCI INT A -> Link[Z00Q] -> GSI 23 (level, low) -> IRQ 23
>pci 0000:00:0c.0: setting latency timer to 64
>pci 0000:00:10.0: setting latency timer to 64
>ACPI: PCI Interrupt Link [Z012] enabled at IRQ 22
>pci 0000:00:15.0: PCI INT A -> Link[Z012] -> GSI 22 (level, low) -> IRQ 22
>pci 0000:00:15.0: setting latency timer to 64
>ACPI: PCI Interrupt Link [Z016] enabled at IRQ 21
>pci 0000:00:16.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21
>pci 0000:00:16.0: setting latency timer to 64
>ACPI: PCI Interrupt Link [Z01A] enabled at IRQ 20
>pci 0000:00:17.0: PCI INT A -> Link[Z01A] -> GSI 20 (level, low) -> IRQ 20
>pci 0000:00:17.0: setting latency timer to 64
>ACPI: PCI Interrupt Link [Z01E] enabled at IRQ 19
>pci 0000:00:18.0: PCI INT A -> Link[Z01E] -> GSI 19 (level, low) -> IRQ 19
>pci 0000:00:18.0: setting latency timer to 64
>pci_bus 0000:00: resource 0 io:  [0x00-0xffff]
>pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffffffffffff]
>pci_bus 0000:01: resource 1 mem: [0xf0500000-0xf05fffff]
>pci_bus 0000:01: resource 3 io:  [0x00-0xffff]
>pci_bus 0000:01: resource 4 mem: [0x000000-0xffffffffffffffff]
>pci_bus 0000:02: resource 0 io:  [0x4000-0x4fff]
>pci_bus 0000:02: resource 1 mem: [0xac000000-0xaeffffff]
>pci_bus 0000:02: resource 2 pref mem [0xd0000000-0xdfffffff]
>pci_bus 0000:03: resource 0 io:  [0x5000-0x5fff]
>pci_bus 0000:03: resource 1 mem: [0xaa000000-0xaaffffff]
>pci_bus 0000:03: resource 2 pref mem [0xb0000000-0xcdffffff]
>pci_bus 0000:04: resource 0 io:  [0x6000-0x6fff]
>pci_bus 0000:04: resource 1 mem: [0xf0200000-0xf03fffff]
>pci_bus 0000:04: resource 2 pref mem [0xf0000000-0xf01fffff]
>pci_bus 0000:06: resource 1 mem: [0xf0400000-0xf04fffff]
>NET: Registered protocol family 2
>IP route cache hash table entries: 131072 (order: 8, 1048576 bytes)
>TCP established hash table entries: 262144 (order: 10, 4194304 bytes)
>TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>TCP: Hash tables configured (established 262144 bind 65536)
>TCP reno registered
>NET: Registered protocol family 1
>pci 0000:03:00.0: Boot video device
>Unpacking initramfs...
>Freeing initrd memory: 3017k freed
>Simple Boot Flag at 0x36 set to 0x1
>Scanning for low memory corruption every 60 seconds
>audit: initializing netlink socket (disabled)
>type=2000 audit(1288823248.569:1): initialized
>HugeTLB registered 2 MB page size, pre-allocated 0 pages
>VFS: Disk quotas dquot_6.5.2
>Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>msgmni has been set to 7411
>alg: No test for stdrng (krng)
>Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
>io scheduler noop registered
>io scheduler anticipatory registered
>io scheduler deadline registered (default)
>io scheduler cfq registered
>pcieport 0000:00:0c.0: irq 24 for MSI/MSI-X
>pcieport 0000:00:0c.0: setting latency timer to 64
>pcieport 0000:00:15.0: irq 25 for MSI/MSI-X
>pcieport 0000:00:15.0: setting latency timer to 64
>pcieport 0000:00:16.0: irq 26 for MSI/MSI-X
>pcieport 0000:00:16.0: setting latency timer to 64
>pcieport 0000:00:17.0: irq 27 for MSI/MSI-X
>pcieport 0000:00:17.0: setting latency timer to 64
>pcieport 0000:00:18.0: irq 28 for MSI/MSI-X
>pcieport 0000:00:18.0: setting latency timer to 64
>Linux agpgart interface v0.103
>Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>input: Macintosh mouse button emulation as /devices/virtual/input/input0
>PNP: PS/2 Controller [PNP0303:KBC0,PNP0f13:MSE0] at 0x60,0x64 irq 1,12
>serio: i8042 KBD port at 0x60,0x64 irq 1
>serio: i8042 AUX port at 0x60,0x64 irq 12
>mice: PS/2 mouse device common for all mice
>rtc_cmos 00:0a: RTC can wake from S4
>rtc_cmos 00:0a: rtc core: registered rtc_cmos as rtc0
>rtc0: alarms up to one year, y3k, 114 bytes nvram, hpet irqs
>cpuidle: using governor ladder
>cpuidle: using governor menu
>TCP cubic registered
>NET: Registered protocol family 17
>PM: Resume from disk failed.
>registered taskstats version 1
>rtc_cmos 00:0a: setting system clock to 2010-11-03 22:27:29 UTC (1288823249)
>Initalizing network drop monitor service
>Freeing unused kernel memory: 484k freed
>input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input1
>udev[40]: starting version 163
>SCSI subsystem initialized
>libata version 3.00 loaded.
>ahci 0000:00:0b.0: version 3.0
>ACPI: PCI Interrupt Link [LSI0] enabled at IRQ 18
>ahci 0000:00:0b.0: PCI INT A -> Link[LSI0] -> GSI 18 (level, low) -> IRQ 18
>ahci 0000:00:0b.0: irq 29 for MSI/MSI-X
>ahci 0000:00:0b.0: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode
>ahci 0000:00:0b.0: flags: 64bit ncq sntf led pmp pio slum part sxs boh 
>ahci 0000:00:0b.0: setting latency timer to 64
>scsi0 : ahci
>scsi1 : ahci
>scsi2 : ahci
>scsi3 : ahci
>scsi4 : ahci
>scsi5 : ahci
>ata1: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884100 irq 29
>ata2: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884180 irq 29
>ata3: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884200 irq 29
>ata4: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884280 irq 29
>ata5: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884300 irq 29
>ata6: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884380 irq 29
>ata3: SATA link down (SStatus 0 SControl 300)
>ata5: SATA link down (SStatus 0 SControl 300)
>ata4: SATA link down (SStatus 0 SControl 300)
>ata6: SATA link down (SStatus 0 SControl 300)
>ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
>ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
>ata1.00: ATA-8: ST9500420ASG, 0002SDM1, max UDMA/133
>ata1.00: 976773168 sectors, multi 16: LBA48 NCQ (depth 31/32)
>ata1.00: configured for UDMA/133
>scsi 0:0:0:0: Direct-Access     ATA      ST9500420ASG     0002 PQ: 0 ANSI: 5
>ata2.00: ATAPI: TSSTcorp DVD+/-RW TS-D633A, D300, max UDMA/100
>ata2.00: applying bridge limits
>ata2.00: configured for UDMA/100
>scsi 1:0:0:0: CD-ROM            TSSTcorp DVD+-RW TS-D633A D300 PQ: 0 ANSI: 5
>sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB)
>sd 0:0:0:0: [sda] Write Protect is off
>sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
> sda:sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
>Uniform CD-ROM driver Revision: 3.20
>sr 1:0:0:0: Attached scsi CD-ROM sr0
> sda1 sda2 sda3
>sd 0:0:0:0: [sda] Attached SCSI disk
>device-mapper: uevent: version 1.0.3
>device-mapper: ioctl: 4.15.0-ioctl (2009-04-01) initialised: dm-devel@redhat.com
>EXT4-fs (dm-1): mounted filesystem with ordered data mode
>Not activating Mandatory Access Control now since /sbin/tomoyo-init doesn't exist.
>ACPI Error (psargs-0359): [\_PR_.CPU0._PPC] Namespace lookup failure, AE_NOT_FOUND
>ACPI Error (psparse-0537): Method parse/execution failed [\_SB_.PCI0.LPC0.EC0_._Q9A] (Node ffff88015f819c80), AE_NOT_FOUND
>udev[884]: starting version 163
>input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input2
>ACPI: Power Button [PWRB]
>input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:27/PNP0C0E:00/input/input3
>ACPI: Sleep Button [SLPB]
>input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input4
>ACPI: Lid Switch [LID]
>input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input5
>ACPI: Power Button [PWRF]
>[drm] Initialized drm 1.1.0 20060810
>nouveau 0000:02:00.0: enabling device (0004 -> 0007)
>nouveau 0000:02:00.0: PCI INT A -> Link[Z00Q] -> GSI 23 (level, low) -> IRQ 23
>nouveau 0000:02:00.0: setting latency timer to 64
>[drm] nouveau 0000:02:00.0: nouveau_load:618 - vendor: 0x10DE device: 0x6E8 class: 0x30000
>sd 0:0:0:0: Attached scsi generic sg0 type 0
>sr 1:0:0:0: Attached scsi generic sg1 type 5
>ACPI: SSDT 000000008fee10c8 00261 (v01  PmRef  Cpu0Ist 00003000 INTL 20050228)
>ACPI: SSDT 000000008fee16cc 0067D (v01  PmRef  Cpu0Cst 00003001 INTL 20050228)
>ACPI: WMI: Mapper loaded
>thermal LNXTHERM:01: registered as thermal_zone0
>ACPI: Thermal Zone [THRM] (57 C)
>Monitor-Mwait will be used to enter C-1 state
>Monitor-Mwait will be used to enter C-2 state
>[drm] nouveau 0000:02:00.0: nouveau_load:643 - regs mapped ok at 0xae000000
>[drm] nouveau 0000:02:00.0: Detected an NV50 generation card (0x298400a2)
>[drm] nouveau 0000:02:00.0: nouveau_card_init:380 - prev state = 0
>[drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PRAMIN
>[drm] nouveau 0000:02:00.0: ... BIOS signature not found
>[drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PROM
>[drm] nouveau 0000:02:00.0: ... BIOS signature not found
>[drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PCIROM
>[drm] nouveau 0000:02:00.0: ... BIOS signature not found
>[drm] nouveau 0000:02:00.0: No valid BIOS image found
>nouveau 0000:02:00.0: PCI INT A disabled
>ACPI: PCI Interrupt Link [LGPU] enabled at IRQ 23
>nouveau 0000:03:00.0: PCI INT A -> Link[LGPU] -> GSI 23 (level, low) -> IRQ 23
>nouveau 0000:03:00.0: setting latency timer to 64
>[drm] nouveau 0000:03:00.0: nouveau_load:618 - vendor: 0x10DE device: 0x866 class: 0x30000
>Monitor-Mwait will be used to enter C-3 state
>Marking TSC unstable due to TSC halts in idle
>processor LNXCPU:00: registered as cooling_device0
>ACPI: SSDT 000000008fee0ed6 001F2 (v01  PmRef  Cpu1Ist 00003000 INTL 20050228)
>ACPI: SSDT 000000008fee1647 00085 (v01  PmRef  Cpu1Cst 00003000 INTL 20050228)
>Switching to clocksource hpet
>usbcore: registered new interface driver usbfs
>usbcore: registered new interface driver hub
>[drm] nouveau 0000:03:00.0: nouveau_load:643 - regs mapped ok at 0xaa000000
>[drm] nouveau 0000:03:00.0: Detected an NV50 generation card (0x0ac300b1)
>[drm] nouveau 0000:03:00.0: nouveau_card_init:380 - prev state = 0
>[drm] nouveau 0000:03:00.0: Attempting to load BIOS image from PRAMIN
>pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>usbcore: registered new device driver usb
>[drm] nouveau 0000:03:00.0: ... appears to be valid
>[drm] nouveau 0000:03:00.0: BIT BIOS found
>[drm] nouveau 0000:03:00.0: Bios version 62.79.3f.00
>[drm] nouveau 0000:03:00.0: TMDS table revision 2.0 not currently supported
>[drm] nouveau 0000:03:00.0: Found Display Configuration Block version 4.0
>[drm] nouveau 0000:03:00.0: Raw DCB entry 0: 01020323 00010034
>[drm] nouveau 0000:03:00.0: Raw DCB entry 1: 02001300 0000001e
>[drm] nouveau 0000:03:00.0: Raw DCB entry 2: 02012386 0f200010
>[drm] nouveau 0000:03:00.0: Raw DCB entry 3: 02012332 00020010
>[drm] nouveau 0000:03:00.0: Raw DCB entry 4: 0000000e 00000000
>[drm] nouveau 0000:03:00.0: DCB connector table: VHER 0x40 5 16 4
>[drm] nouveau 0000:03:00.0:   0: 0x00000040: type 0x40 idx 0 tag 0xff
>[drm] nouveau 0000:03:00.0:   1: 0x00000100: type 0x00 idx 1 tag 0xff
>[drm] nouveau 0000:03:00.0:   2: 0x00005246: type 0x46 idx 2 tag 0x07
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100200, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table 0 at offset 0xDCE2
>[drm] nouveau 0000:03:00.0: 0xDCE2: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xDCE2: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDCE2: Reg: 0x00020060, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00020060, Data: 0x00040000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00020060, Data: 0x00040000
>[drm] nouveau 0000:03:00.0: 0xDCEF: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000C054, Data: 0x0C7F018C
>[drm] nouveau 0000:03:00.0: 0xDCF8: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDCF8: Reg: 0x00088090, Mask: 0xCFFFFFFF, Data: 0x30000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00088090, Data: 0x33000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00088090, Data: 0x33000000
>[drm] nouveau 0000:03:00.0: 0xDD05: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD05: Reg: 0x00088098, Mask: 0xFFFFFF7F, Data: 0x00000080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00088098, Data: 0x00005793
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00088098, Data: 0x00005793
>[drm] nouveau 0000:03:00.0: 0xDD12: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0008809C, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 0xDD1B: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD1B: Reg: 0x0000C044, Mask: 0xFFFFFFE0, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000C044, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000C044, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 0xDD28: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD28: Reg: 0x002FF0A8, Mask: 0xFFFF0000, Data: 0x000000FF
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x002FF0A8, Data: 0x010100FF
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x002FF0A8, Data: 0x010100FF
>[drm] nouveau 0000:03:00.0: 0xDD35: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD35: Reg: 0x002FF0A0, Mask: 0xFFFFDFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x002FF0A0, Data: 0x00001030
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x002FF0A0, Data: 0x00001030
>[drm] nouveau 0000:03:00.0: 0xDD42: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x00800000
>[drm] nouveau 0000:03:00.0: 0xDD4B: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x00800000
>[drm] nouveau 0000:03:00.0: 0xDD54: [ (0x74) - INIT_TIME ]
>[drm] nouveau 0000:03:00.0: 0xDD54: Sleeping for 0xFA00 microseconds
>processor LNXCPU:01: registered as cooling_device1
>ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>ACPI: AC Adapter [ADP0] (off-line)
>dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[Firmware Bug]: ACPI(IGPU) defines _DOD but not _DOS
>input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:08/LNXVIDEO:00/input/input6
>ACPI: Video Device [IGPU] (multi-head: yes  rom: no  post: no)
>[Firmware Bug]: ACPI(Z01I) defines _DOD but not _DOS
>input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:0f/LNXVIDEO:01/input/input7
>ACPI: Video Device [Z01I] (multi-head: yes  rom: yes  post: no)
>[drm] nouveau 0000:03:00.0: 0xDD57: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x10000000
>[drm] nouveau 0000:03:00.0: 0xDD60: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x10000000
>[drm] nouveau 0000:03:00.0: 0xDD69: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000200, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 0xDD72: [ (0x33) - INIT_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD72: Repeating following segment 20 times
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000000, Data: 0x0AC300B1
>[drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ]
>[drm] nouveau 0000:03:00.0: 0xDD82: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000200, Data: 0xC0010111
>[drm] nouveau 0000:03:00.0: 0xDD8B: [ (0x69) - INIT_IO ]
>[drm] nouveau 0000:03:00.0: 0xDD8B: Port: 0x03C3, Mask: 0x00, Data: 0x01
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614100, Data: 0x1D000600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x0D800600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E18C, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E18C, Data: 0x00030000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614900, Data: 0x18000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x08800000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000200, Data: 0xC0110111
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000200, Data: 0x80110111
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E18C, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E18C, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00000200, Data: 0xC0110111
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000200, Data: 0xC0110111
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x00800018
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x00800018
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x10000018
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x10000018
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614280, Data: 0x04840484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614280, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614A80, Data: 0x04840484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614A80, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00615280, Data: 0x04840484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00615280, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614300, Data: 0x00804040
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614300, Data: 0x00804040
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614B00, Data: 0x00800484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614B00, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614380, Data: 0x00800484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614380, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614B80, Data: 0x00800484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614B80, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00615380, Data: 0x00800484
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00615380, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614200, Data: 0x00800040
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614200, Data: 0x00800040
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614A00, Data: 0x00800084
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614A00, Data: 0x00800080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614108, Data: 0x30080011
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614108, Data: 0x00080011
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614908, Data: 0x40050012
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614908, Data: 0x00050012
>[drm] nouveau 0000:03:00.0: 0xDD90: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x3F, Head: 0x00, Data: 0x57
>[drm] nouveau 0000:03:00.0: 0xDD93: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDD93: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000800
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00001084, Data: 0x00201749
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00001084, Data: 0x00201F49
>[drm] nouveau 0000:03:00.0: 0xDDA0: [ (0x75) - INIT_CONDITION ]
>[drm] nouveau 0000:03:00.0: 0xDDA0: Condition: 0x09
>[drm] nouveau 0000:03:00.0: 0xDDA0: Cond: 0x09, Reg: 0x00101000, Mask: 0x00000040
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: 0xDDA0: Checking if 0x00000040 equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDDA0: Condition not fulfilled -- skipping following commands
>[drm] nouveau 0000:03:00.0: 0xDDA2: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDDAB: [ (0x38) - INIT_NOT ]
>[drm] nouveau 0000:03:00.0: 0xDDAB: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xDDAC: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00009220, Data: 0x0000040B
>[drm] nouveau 0000:03:00.0: 0xDDB5: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xDDB6: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00009200, Data: 0x00000030
>[drm] nouveau 0000:03:00.0: 0xDDBF: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00009210, Data: 0x00000019
>[drm] nouveau 0000:03:00.0: 0xDDC8: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDDC8: Reg: 0x00101000, Mask: 0xE0FFC3FF, Data: 0x8F001800
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: 0xDDD5: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDDD5: Reg: 0x0010100C, Mask: 0xFFFFFFFF, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0010100C, Data: 0xD901001A
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0010100C, Data: 0xD901001A
>[drm] nouveau 0000:03:00.0: 0xDDE2: [ (0x5F) - INIT_COPY_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDDE2: SrcReg: 0x00614004, Shift: 0x00, SrcMask: 0xFFFFFFFF, Xor: 0x00000000, DstReg: 0x00610184, DstMask: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614004, Data: 0x03300000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00610184, Data: 0x03300000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00610184, Data: 0x03300000
>[drm] nouveau 0000:03:00.0: 0xDDF8: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00619F00, Data: 0x00000009
>[drm] nouveau 0000:03:00.0: 0xDE01: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00001540, Data: 0xF3010001
>[drm] nouveau 0000:03:00.0: 0xDE0A: [ (0x75) - INIT_CONDITION ]
>[drm] nouveau 0000:03:00.0: 0xDE0A: Condition: 0x07
>[drm] nouveau 0000:03:00.0: 0xDE0A: Cond: 0x07, Reg: 0x00021218, Mask: 0x000000FF
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00021218, Data: 0x0000001E
>[drm] nouveau 0000:03:00.0: 0xDE0A: Checking if 0x0000001E equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDE0A: Condition not fulfilled -- skipping following commands
>[drm] nouveau 0000:03:00.0: 0xDE0C: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE15: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE1E: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE27: [ (0x38) - INIT_NOT ]
>[drm] nouveau 0000:03:00.0: 0xDE27: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xDE28: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE28: Reg: 0x0061A068, Mask: 0xFBFFFFFF, Data: 0x04000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061A068, Data: 0x4C00CC27
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061A068, Data: 0x4C00CC27
>[drm] nouveau 0000:03:00.0: 0xDE35: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE35: Reg: 0x0061A868, Mask: 0xFBFFFFFF, Data: 0x04000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061A868, Data: 0x4C000028
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061A868, Data: 0x4C000028
>[drm] nouveau 0000:03:00.0: 0xDE42: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE42: Reg: 0x0061B068, Mask: 0xFBFFFFFF, Data: 0x04000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061B068, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061B068, Data: 0x04000000
>[drm] nouveau 0000:03:00.0: 0xDE4F: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xDE50: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00000200, Data: 0xC0110111
>[drm] nouveau 0000:03:00.0: 0xDE59: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00001084, Data: 0x00201749
>[drm] nouveau 0000:03:00.0: 0xDE62: [ (0x6B) - INIT_SUB ]
>[drm] nouveau 0000:03:00.0: 0xDE62: Calling script 8
>[drm] nouveau 0000:03:00.0: 0xE025: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ]
>[drm] nouveau 0000:03:00.0: 0xE025: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004020
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00619488, Data: 0xFF0000C0
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 0xE025: Reg: 0x00004020, Config: 0x00, Freq: 1100000kHz
>[drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00004020
>[drm] nouveau 0000:03:00.0: 0xE050: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xDE62: End of script 8
>[drm] nouveau 0000:03:00.0: 0xDE64: [ (0x6B) - INIT_SUB ]
>[drm] nouveau 0000:03:00.0: 0xDE64: Calling script 6
>[drm] nouveau 0000:03:00.0: 0xDFCD: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ]
>[drm] nouveau 0000:03:00.0: 0xDFCD: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004028
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00619488, Data: 0xFF0000C0
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 0xDFCD: Reg: 0x00004028, Config: 0x00, Freq: 450000kHz
>[drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDFF8: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xDE64: End of script 6
>[drm] nouveau 0000:03:00.0: 0xDE66: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE66: Reg: 0x00004040, Mask: 0xFFF0FFFF, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00004040, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00004040, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 0xDE73: [ (0x74) - INIT_TIME ]
>[drm] nouveau 0000:03:00.0: 0xDE73: Sleeping for 0x03E8 microseconds
>[drm] nouveau 0000:03:00.0: 0xDE76: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDE76: Reg: 0x0000E824, Mask: 0xFFEFFFFF, Data: 0x00100000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E824, Data: 0x00100000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E824, Data: 0x00100000
>[drm] nouveau 0000:03:00.0: 0xDE83: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E4F8, Data: 0x000000FA
>[drm] nouveau 0000:03:00.0: 0xDE8C: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E548, Data: 0x000000FA
>[drm] nouveau 0000:03:00.0: 0xDE95: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E598, Data: 0x000000FA
>[drm] nouveau 0000:03:00.0: 0xDE9E: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E5E8, Data: 0x000000FA
>[drm] nouveau 0000:03:00.0: 0xDEA7: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E500, Data: 0x00003418
>[drm] nouveau 0000:03:00.0: 0xDEB0: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E550, Data: 0x00003418
>[drm] nouveau 0000:03:00.0: 0xDEB9: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E5A0, Data: 0x00003418
>[drm] nouveau 0000:03:00.0: 0xDEC2: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E5F0, Data: 0x00003418
>[drm] nouveau 0000:03:00.0: 0xDECB: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDECB: Reg: 0x00004070, Mask: 0xFFF8FFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00004070, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00004070, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDED8: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDED8: Reg: 0x00004020, Mask: 0x7FFFFFFF, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00004020, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00004020, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 0xDEE5: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDEE5: Reg: 0x00004028, Mask: 0x7FFFFFFF, Data: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00004028, Data: 0x80010000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00004028, Data: 0x80010000
>[drm] nouveau 0000:03:00.0: 0xDEF2: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDEF2: Reg: 0x00102018, Mask: 0xFFFFFFFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00102018, Data: 0x00000FF0
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00102018, Data: 0x00000FF0
>[drm] nouveau 0000:03:00.0: 0xDEFF: [ (0x74) - INIT_TIME ]
>[drm] nouveau 0000:03:00.0: 0xDEFF: Sleeping for 0x0064 microseconds
>[drm] nouveau 0000:03:00.0: 0xDF02: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF02: Reg: 0x0000C054, Mask: 0xFF80FC00, Data: 0x007F0033
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000C054, Data: 0x0C7F0033
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000C054, Data: 0x0C7F0033
>[drm] nouveau 0000:03:00.0: 0xDF0F: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF0F: Reg: 0x00100F64, Mask: 0x80FFC07F, Data: 0x01000080
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100F64, Data: 0x81000081
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00100F64, Data: 0x81000081
>[drm] nouveau 0000:03:00.0: 0xDF1C: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF1C: Reg: 0x00100F68, Mask: 0xFFE03F80, Data: 0x00004009
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100F68, Data: 0x00004789
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00100F68, Data: 0x00004789
>[drm] nouveau 0000:03:00.0: 0xDF29: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF29: Reg: 0x00100F6C, Mask: 0xFFFFC000, Data: 0x00000B16
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100F6C, Data: 0x00000B16
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00100F6C, Data: 0x00000B16
>[drm] nouveau 0000:03:00.0: 0xDF36: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF36: Reg: 0x00100F30, Mask: 0xFFFF9FFF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100F30, Data: 0x000089CB
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00100F30, Data: 0x000089CB
>[drm] nouveau 0000:03:00.0: 0xDF43: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF43: Reg: 0x00100B18, Mask: 0xFFC0F8CC, Data: 0x003A0722
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00100B18, Data: 0x003A0722
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00100B18, Data: 0x003A0722
>[drm] nouveau 0000:03:00.0: 0xDF50: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF50: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00001084, Data: 0x00201749
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00001084, Data: 0x00201749
>[drm] nouveau 0000:03:00.0: 0xDF5D: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF5D: Reg: 0x00004300, Mask: 0xFFFFFFE0, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00004300, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00004300, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDF6A: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00020080, Data: 0x10070523
>[drm] nouveau 0000:03:00.0: 0xDF73: [ (0x75) - INIT_CONDITION ]
>[drm] nouveau 0000:03:00.0: 0xDF73: Condition: 0x0E
>[drm] nouveau 0000:03:00.0: 0xDF73: Cond: 0x0E, Reg: 0x002FF090, Mask: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x002FF090, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 0xDF73: Checking if 0x00000001 equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xDF73: Condition not fulfilled -- skipping following commands
>[drm] nouveau 0000:03:00.0: 0xDF75: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF7E: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF87: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xDF87: ---- Executing following commands ----
>[drm] nouveau 0000:03:00.0: 0xDF88: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xDF88: Reg: 0x002FF090, Mask: 0xFFFFFFFE, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x002FF090, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x002FF090, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 0xDF95: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table 1 at offset 0xDF96
>[drm] nouveau 0000:03:00.0: 0xDF96: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xDF96: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table 2 at offset 0xDF98
>[drm] nouveau 0000:03:00.0: 0xDF98: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xDF98: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000108C, Data: 0x000000D1
>[drm] nouveau 0000:03:00.0: 0xDFA1: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xF0, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 0xDFA4: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ]
>[drm] nouveau 0000:03:00.0: 0xDFA4: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x08, Count: 0x02
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x006194A0, Data: 0x10000019
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x08
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x09
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19
>[drm] nouveau 0000:03:00.0: 0xDFAB: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ]
>[drm] nouveau 0000:03:00.0: 0xDFAB: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x18, Count: 0x02
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x006194A0, Data: 0x10000019
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x18
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19
>[drm] nouveau 0000:03:00.0: 0xDFB2: [ (0x52) - INIT_CR ]
>[drm] nouveau 0000:03:00.0: 0xDFB2: Index: 0x88, Mask: 0xBF, Data: 0x40
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00619488, Data: 0xFF0000C0
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 0xDFB6: [ (0x52) - INIT_CR ]
>[drm] nouveau 0000:03:00.0: 0xDFB6: Index: 0x8A, Mask: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00619488, Data: 0xFF0000C0
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 0xDFBA: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E200, Data: 0x0003103C
>[drm] nouveau 0000:03:00.0: 0xDFC3: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x30, Head: 0x00, Data: 0x10
>[drm] nouveau 0000:03:00.0: 0xDFC6: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x31, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 0xDFC9: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0xAA, Head: 0x00, Data: 0x00
>[drm] nouveau 0000:03:00.0: 0xDFCC: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table 3 at offset 0xE07D
>[drm] nouveau 0000:03:00.0: 0xE07D: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xE07D: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xE07D: Executing subroutine at 0xC9C6
>[drm] nouveau 0000:03:00.0: 0xC9C6: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xE07D: End of 0xC9C6 subroutine
>[drm] nouveau 0000:03:00.0: 0xE080: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xE080: Executing subroutine at 0xDF97
>[drm] nouveau 0000:03:00.0: 0xDF97: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xE080: End of 0xDF97 subroutine
>[drm] nouveau 0000:03:00.0: 0xE083: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xE083: Reg: 0x00614120, Mask: 0xFFC3E7FF, Data: 0x00040800
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614120, Data: 0x00450800
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614120, Data: 0x00450800
>[drm] nouveau 0000:03:00.0: 0xE090: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xE090: Reg: 0x00614920, Mask: 0xFFC3E7FF, Data: 0x00040800
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00614920, Data: 0x00450800
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614920, Data: 0x00450800
>[drm] nouveau 0000:03:00.0: 0xE09D: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614100, Data: 0x10000000
>[drm] nouveau 0000:03:00.0: 0xE0A6: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614900, Data: 0x10000000
>[drm] nouveau 0000:03:00.0: 0xE0AF: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00612000, Data: 0x10000210
>[drm] nouveau 0000:03:00.0: 0xE0B8: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614000, Data: 0x10000210
>[drm] nouveau 0000:03:00.0: 0xE0C1: [ (0x75) - INIT_CONDITION ]
>[drm] nouveau 0000:03:00.0: 0xE0C1: Condition: 0x09
>[drm] nouveau 0000:03:00.0: 0xE0C1: Cond: 0x09, Reg: 0x00101000, Mask: 0x00000040
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: 0xE0C1: Checking if 0x00000040 equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xE0C1: Condition not fulfilled -- skipping following commands
>[drm] nouveau 0000:03:00.0: 0xE0C3: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xE0CC: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xE0D5: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xE0DE: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 0xE0E7: [ (0x38) - INIT_NOT ]
>[drm] nouveau 0000:03:00.0: 0xE0E7: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xE0E8: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614110, Data: 0x0005004C
>[drm] nouveau 0000:03:00.0: 0xE0F1: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614114, Data: 0x50190035
>[drm] nouveau 0000:03:00.0: 0xE0FA: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00614118, Data: 0x00010014
>[drm] nouveau 0000:03:00.0: 0xE103: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061411C, Data: 0x5010001D
>[drm] nouveau 0000:03:00.0: 0xE10C: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xE10D: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061A008, Data: 0x03A502D1
>[drm] nouveau 0000:03:00.0: 0xE116: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C080, Data: 0x00000084
>[drm] nouveau 0000:03:00.0: 0xE11F: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C084, Data: 0x80000400
>[drm] nouveau 0000:03:00.0: 0xE128: [ (0x53) - INIT_ZM_CR ]
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF
>[drm] nouveau 0000:03:00.0: 0xE12B: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x00020010, Data: 0xFA2D0399
>[drm] nouveau 0000:03:00.0: 0xE134: [ (0x7A) - INIT_ZM_REG ]
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0002000C, Data: 0x00000003
>[drm] nouveau 0000:03:00.0: 0xE13D: [ (0x52) - INIT_CR ]
>[drm] nouveau 0000:03:00.0: 0xE13D: Index: 0x88, Mask: 0x7F, Data: 0x80
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00619488, Data: 0xFF0000C0
>[drm] nouveau 0000:03:00.0: 	Indexed IO read:  Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 	Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0
>[drm] nouveau 0000:03:00.0: 0xE141: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table 4 at offset 0xE142
>[drm] nouveau 0000:03:00.0: 0xE142: ------ Executing following commands ------
>[drm] nouveau 0000:03:00.0: 0xE142: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Parsing VBIOS init table at offset 0xE1A7
>[drm] nouveau 0000:03:00.0: 0xE1A7: [ (0x56) - INIT_CONDITION_TIME ]
>[drm] nouveau 0000:03:00.0: 0xE1A7: Condition: 0x01, Retries: 0x64
>[drm] nouveau 0000:03:00.0: 0xE1A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 0xE1A7: Checking if 0x00000000 equals 0x80000000
>[drm] nouveau 0000:03:00.0: 0xE1A7: Condition not met, sleeping for 20ms
>[drm] nouveau 0000:03:00.0: 0xE1A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 0xE1A7: Checking if 0x00000000 equals 0x80000000
>[drm] nouveau 0000:03:00.0: 0xE1A7: Condition still not met after 20ms, skipping following opcodes
>[drm] nouveau 0000:03:00.0: 0xE1AA: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xE1AA: ---- Executing following commands ----
>[drm] nouveau 0000:03:00.0: 0xE1AB: [ (0x5F) - INIT_COPY_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xE1AB: SrcReg: 0x00610000, Shift: 0x00, SrcMask: 0x0000FFFF, Xor: 0x00000000, DstReg: 0x0061000C, DstMask: 0xFFFF0000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00610000, Data: 0x887D0140
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 0xE1C1: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xE1C1: Reg: 0x0061000C, Mask: 0xBFFFFFFF, Data: 0x40000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061000C, Data: 0x40000140
>[drm] nouveau 0000:03:00.0: 0xE1CE: [ (0x56) - INIT_CONDITION_TIME ]
>[drm] nouveau 0000:03:00.0: 0xE1CE: Condition: 0x02, Retries: 0x64
>[drm] nouveau 0000:03:00.0: 0xE1CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 0xE1CE: Checking if 0x00000000 equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xE1CE: Condition met, continuing
>[drm] nouveau 0000:03:00.0: 0xE1CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061000C, Data: 0x00000140
>[drm] nouveau 0000:03:00.0: 0xE1CE: Checking if 0x00000000 equals 0x00000000
>[drm] nouveau 0000:03:00.0: 0xE1D1: [ (0x72) - INIT_RESUME ]
>[drm] nouveau 0000:03:00.0: 0xE1D2: [ (0x8E) - INIT_GPIO ]
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x700008E0
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x700007E1
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0xA40021E2
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x240001E3
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x240000E4
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFE5
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFE6
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x58004AE7
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E104, Data: 0x54066600
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0000E100, Data: 0x001C0100
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFE8
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFE9
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFEA
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFEB
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFEC
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFED
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x7000FFEE
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x0000FFE0
>[drm] nouveau 0000:03:00.0: 0xE1D3: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1
>[drm] nouveau 0000:03:00.0: 0xC35E: parsing output script 0
>[drm] nouveau 0000:03:00.0: 0xC35E: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC35E: Executing subroutine at 0xC364
>[drm] nouveau 0000:03:00.0: 0xC364: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC364: BaseReg: 0x4061C040, Count: 0x10
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C040, Data: 0x5E000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C044, Data: 0x5E200000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C048, Data: 0x00201021
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C04C, Data: 0x002010CD
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C050, Data: 0x0060A000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C054, Data: 0x00608000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C058, Data: 0x00608000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C05C, Data: 0x00608000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C060, Data: 0x00202000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C064, Data: 0x80202000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C068, Data: 0xFE2010FA
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C06C, Data: 0xFE001002
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C070, Data: 0xFE009312
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C074, Data: 0xFE008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C078, Data: 0xFE008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C07C, Data: 0xFE008000
>[drm] nouveau 0000:03:00.0: 0xC3AA: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC35E: End of 0xC364 subroutine
>[drm] nouveau 0000:03:00.0: 0xC361: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Searching for output entry for 0 0 2
>[drm] nouveau 0000:03:00.0: output script 0 not found
>[drm] nouveau 0000:03:00.0: Searching for output entry for 6 0 2
>[drm] nouveau 0000:03:00.0: 0xC8E4: parsing output script 0
>[drm] nouveau 0000:03:00.0: 0xC8E4: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC8E4: Executing subroutine at 0xC97E
>[drm] nouveau 0000:03:00.0: 0xC97E: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC97E: BaseReg: 0x4061C040, Count: 0x10
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C840, Data: 0x3F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C844, Data: 0x1F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C848, Data: 0x1E000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C84C, Data: 0x0000A000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C850, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C854, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C858, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C85C, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C860, Data: 0x00002000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C864, Data: 0x1E002000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C868, Data: 0x1F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C86C, Data: 0x7F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C870, Data: 0x7F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C874, Data: 0x7F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C878, Data: 0x7F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C87C, Data: 0x7F008000
>[drm] nouveau 0000:03:00.0: 0xC9C4: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC8E4: End of 0xC97E subroutine
>[drm] nouveau 0000:03:00.0: 0xC8E7: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: Searching for output entry for 2 0 2
>[drm] nouveau 0000:03:00.0: 0xC706: parsing output script 0
>[drm] nouveau 0000:03:00.0: 0xC706: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC706: Executing subroutine at 0xC74E
>[drm] nouveau 0000:03:00.0: 0xC74E: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC74E: BaseReg: 0x4061C040, Count: 0x10
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C840, Data: 0x1F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C844, Data: 0x1F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C848, Data: 0x1E000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C84C, Data: 0x0000A000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C850, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C854, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C858, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C85C, Data: 0x00008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C860, Data: 0x00002000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C864, Data: 0x1E002000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C868, Data: 0x1F000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C86C, Data: 0x1F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C870, Data: 0x1F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C874, Data: 0x1F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C878, Data: 0x1F008000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C87C, Data: 0x1F008000
>[drm] nouveau 0000:03:00.0: 0xC794: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC706: End of 0xC74E subroutine
>[drm] nouveau 0000:03:00.0: 0xC709: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xC709: Reg: 0x4061C014, Mask: 0xFFFEFFFF, Data: 0x00010000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061C814, Data: 0x00850000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C814, Data: 0x00850000
>[drm] nouveau 0000:03:00.0: 0xC716: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xC716: Reg: 0x4061C00C, Mask: 0xFFFFFFDF, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061C80C, Data: 0x020003D0
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C80C, Data: 0x020003D0
>[drm] nouveau 0000:03:00.0: 0xC723: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_early_init:297 - 
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:96 -  Rsvd VRAM base: 0x0ff00000
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:98 -     VBIOS image: 0x0ffe0000
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:99 -   Aperture size: 32 MiB
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:100 -         PT size: 64 KiB
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:119 - NV50VM: GART 0x0000000020000000-0x000000003fffffff
>[drm] nouveau 0000:03:00.0: nv50_instmem_init:122 - NV50VM: VRAM 0x0000000040000000-0x000000005fffffff
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x00000000 b_offset=0x0ff00000 size=0x00030000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff880159df4a20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4a20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x00000020 b_offset=0x0ff00020 size=0x00004000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff880159df48a0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df48a0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x00000200 b_offset=0x0ff00200 size=0x00004000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff880159df4a80
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch0 size=65536 align=4096 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880159df4ae0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4ae0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch0 size=65536 align=0 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880159df4b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch0 size=24 align=16 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880159df4ba0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch0 h=0x00000000 gpuobj=ffff880159df4ba0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch0 size=24 align=16 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880159df4c00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch0 h=0x00000000 gpuobj=ffff880159df4c00
>ACPI: Battery Slot [BAT0] (battery present)
>ACPI: PCI Interrupt Link [LNK1] enabled at IRQ 11
>firewire_ohci 0000:01:07.0: PCI INT A -> Link[LNK1] -> GSI 11 (level, low) -> IRQ 11
>[TTM] Zone  kernel: Available graphics memory: 1897488 kiB.
>[drm] nouveau 0000:03:00.0: 256 MiB VRAM
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=1048576 align=16 flags=0x00000007
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x30000 sz=0x100000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x30000, pte=96, pte_end=608
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00040000
>[drm] nouveau 0000:03:00.0: 512 MiB GART (aperture)
>mtrr: type mismatch for b0000000,10000000 old: write-back new: write-combining
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_init:310 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init:149 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init_reset:40 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init_regs__nv:63 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init_regs:95 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init_intr:49 - 
>[drm] nouveau 0000:03:00.0: nv50_graph_init_ctxctl:107 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_init:176 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=512 align=4096 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c21e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x130000 sz=0x1000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x130000, pte=608, pte_end=610
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00140000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c21e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=512 align=4096 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2300
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x131000 sz=0x1000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x131000, pte=610, pte_end=612
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00150000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2300
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_reset:111 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_intr:120 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_context_table:132 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch0
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch1, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch2, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch3, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch4, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch5, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch6, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch7, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch8, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch9, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch10, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch11, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch12, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch13, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch14, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch15, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch16, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch17, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch18, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch19, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch20, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch21, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch22, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch23, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch24, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch25, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch26, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch27, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch28, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch29, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch30, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch31, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch32, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch33, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch34, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch35, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch36, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch37, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch38, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch39, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch40, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch41, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch42, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch43, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch44, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch45, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch46, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch47, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch48, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch49, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch50, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch51, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch52, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch53, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch54, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch55, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch56, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch57, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch58, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch59, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch60, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch61, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch62, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch63, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch64, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch65, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch66, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch67, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch68, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch69, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch70, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch71, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch72, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch73, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch74, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch75, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch76, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch77, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch78, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch79, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch80, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch81, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch82, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch83, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch84, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch85, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch86, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch87, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch88, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch89, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch90, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch91, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch92, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch93, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch94, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch95, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch96, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch97, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch98, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch99, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch100, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch101, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch102, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch103, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch104, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch105, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch106, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch107, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch108, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch109, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch110, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch111, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch112, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch113, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch114, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch115, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch116, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch117, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch118, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch119, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch120, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch121, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch122, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch123, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch124, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch125, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:94 - ch126, nt=1
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch127
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_thingo:46 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_regs__nv:147 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_regs:155 - 
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch0
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch127
>[drm] nouveau 0000:03:00.0: Allocating FIFO number 1
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:970 - ch1 vram=0x80000002 tt=0x80000003
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:916 - ch1
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:938 - ch1 PRAMIN size: 0x0007f400 bytes, base alloc=0x00006000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=521216 align=4096 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c27e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x132000 sz=0x80000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x132000, pte=612, pte_end=868
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00170000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c27e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x00132200 b_offset=0xffffffff size=0x00004000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff88015b0c2900
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=32768 align=16 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2960
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x00000000 gpuobj=ffff88015b0c2960
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch1 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c29c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000002 gpuobj=ffff88015b0c29c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000002
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000090
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x00000090: h=0x80000002, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000003 gpuobj=ffff88015b0c29c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000003
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000098
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x00000098: h=0x80000003, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch1 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=1 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2a20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x00000000 gpuobj=ffff88015b0c2a20
>[drm] nouveau 0000:03:00.0: nv50_graph_create_context:219 - ch1
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=307200 align=4096 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2a80
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2a80
>[drm] nouveau 0000:03:00.0: nv50_fifo_create_context:249 - ch1
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=256 align=256 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2ae0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2ae0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=4096 align=1024 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2b40
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch1
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_thingo:46 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch1 class=0x5039
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2ba0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000001 gpuobj=ffff88015b0c2ba0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000001
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x00000088: h=0x80000001, c=0x00100e04
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x8000000e gpuobj=ffff88015b0c2c00
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x8000000e
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x000000f0: h=0x8000000e, c=0x00000004
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch1 class=0x003d offset=0x160000 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2c60
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000006 gpuobj=ffff88015b0c2c60
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000006
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x000000b0: h=0x80000006, c=0x00000e06
>[drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 1
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch1 class=0x003d offset=0x0 size=0x10000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2cc0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000004 gpuobj=ffff88015b0c2cc0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000004
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x000000a0: h=0x80000004, c=0x00000e08
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch1 class=0x003d offset=0x20000000 size=0x20000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2d20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000005 gpuobj=ffff88015b0c2d20
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000005
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a8
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x000000a8: h=0x80000005, c=0x00000e0a
>[drm] nouveau 0000:03:00.0: nv50_display_create:469 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=32768 align=4096 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015b0c2f00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x1b2000 sz=0x8000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x1b2000, pte=868, pte_end=884
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x001f0000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2f00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=4096 align=16 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880156437060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880156437060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=24 align=32 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801564370c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x01000001 gpuobj=ffff8801564370c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000001
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000208
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch-1 0x00000208: h=0x01000001, c=0x00400002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=24 align=32 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880156437120
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x01000002 gpuobj=ffff880156437120
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000002
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000210
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch-1 0x00000210: h=0x01000002, c=0x00408002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=24 align=32 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880156437180
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x01000000 gpuobj=ffff880156437180
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000200
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch-1 0x00000200: h=0x01000000, c=0x00410002
>[drm] nouveau 0000:03:00.0: nv50_crtc_create:732 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_create:732 - 
>[drm] nouveau 0000:03:00.0: nv50_sor_create:282 - 
>[drm] nouveau 0000:03:00.0: Detected a LVDS output
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>[drm] nouveau 0000:03:00.0: nv50_dac_create:283 - 
>[drm] nouveau 0000:03:00.0: Detected a DAC output
>[drm] nouveau 0000:03:00.0: nv50_sor_create:282 - 
>[drm] nouveau 0000:03:00.0: Detected a DP output
>[drm] nouveau 0000:03:00.0: nv50_sor_create:282 - 
>[drm] nouveau 0000:03:00.0: Detected a TMDS output
>[drm] nouveau 0000:03:00.0: nouveau_connector_create:756 - 
>[drm] nouveau 0000:03:00.0: Detected a LVDS connector
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x00101000, Data: 0x8FC098C0
>firewire_ohci: Added fw-ohci device 0000:01:07.0, OHCI version 1.10
>sdhci: Secure Digital Host Controller Interface driver
>sdhci: Copyright(c) Pierre Ossman
>sdhci-pci 0000:01:07.1: SDHCI controller found [1180:0822] (rev 22)
>ACPI: PCI Interrupt Link [LNK2] enabled at IRQ 11
>sdhci-pci 0000:01:07.1: PCI INT B -> Link[LNK2] -> GSI 11 (level, low) -> IRQ 11
>sdhci-pci 0000:01:07.1: Will use DMA mode even though HW doesn't fully claim to support it.
>Registered led device: mmc0::
>mmc0: SDHCI controller on PCI [0000:01:07.1] using DMA
>[drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:443 - native mode from preferred
>[drm] nouveau 0000:03:00.0: nouveau_connector_create:756 - 
>[drm] nouveau 0000:03:00.0: Detected a VGA connector
>[drm] nouveau 0000:03:00.0: nouveau_connector_create:756 - 
>[drm] nouveau 0000:03:00.0: Detected a DisplayPort connector
>[drm] nouveau 0000:03:00.0: nouveau_connector_create:756 - 
>[drm] nouveau 0000:03:00.0: nv50_display_init:191 - 
>[drm] nouveau 0000:03:00.0: nv50_display_init:235 - ram_amount 268435456
>cfg80211: Calling CRDA to update world regulatory domain
>ath9k 0000:06:00.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21
>ath9k 0000:06:00.0: setting latency timer to 64
>ath: EEPROM regdomain: 0x60
>ath: EEPROM indicates we should expect a direct regpair map
>ath: Country alpha2 being used: 00
>ath: Regpair used: 0x60
>firewire_core: created device fw0: GUID 434fc00015265e01, S400
>phy0: Selected rate control algorithm 'ath9k_rate_control'
>Registered led device: ath9k-phy0::radio
>Registered led device: ath9k-phy0::assoc
>Registered led device: ath9k-phy0::tx
>Registered led device: ath9k-phy0::rx
>phy0: Atheros AR9280 MAC/BB Rev:2 AR5133 RF Rev:d0: mem=0xffffc90000ac0000, irq=21
>Synaptics Touchpad, model: 1, fw: 7.2, id: 0x1c0b1, caps: 0xd04731/0xa40000
>input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input8
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 0 mode 3
>[drm] nouveau 0000:03:00.0: nv50_dac_dpms:121 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x0 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_setup_crtcs], 
>[drm:drm_enable_connectors], connector 11 enabled? yes
>[drm:drm_enable_connectors], connector 16 enabled? no
>[drm:drm_enable_connectors], connector 17 enabled? no
>[drm:drm_target_preferred], looking for cmdline mode on connector 11
>[drm:drm_target_preferred], looking for preferred mode on connector 11
>[drm:drm_target_preferred], found mode 1280x800
>[drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config
>[drm:drm_setup_crtcs], desired mode 1280x800 set on crtc 5
>[drm] nouveau 0000:03:00.0: nouveau_fbcon_probe:384 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch1 class=0x502d
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch1 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880156482ba0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch1 h=0x80000007 gpuobj=ffff880156482ba0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000007
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b8
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch1 0x000000b8: h=0x80000007, c=0x00100e0c
>[drm] nouveau 0000:03:00.0: allocated 1280x800 fb: 0x40250000, bo ffff880155d0bc00
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], crtc: ffff88015b297800 5 fb: ffff88015a5a63c0 connectors: ffff88015f8e8b00 num_connectors: 1 (x, y) (0, 0)
>[drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[drm:drm_crtc_helper_set_config], modes are different, full mode set
>[drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[drm:drm_mode_debug_printmodeline], Modeline 26:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_crtc_helper_set_config], setting connector 11 crtc to ffff88015b297800
>[drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[drm:drm_mode_debug_printmodeline], Modeline 26:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm] nouveau 0000:03:00.0: nv50_sor_mode_fixup:159 - or 0
>[drm] nouveau 0000:03:00.0: nv50_dac_dpms:121 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_crtc_prepare:440 - index 0
>[drm] nouveau 0000:03:00.0: nv50_dac_disconnect:47 - Disconnecting DAC 1
>[drm] nouveau 0000:03:00.0: nv50_sor_disconnect:47 - Disconnecting SOR 1
>[drm] nouveau 0000:03:00.0: nv50_sor_disconnect:47 - Disconnecting SOR 1
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:71 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:72 - blanked
>[drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_mode_set:638 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_set_dither:142 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_set_scale:196 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_do_mode_set_base:523 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] LVDS-7: set mode 1280x800 1a
>[drm] nouveau 0000:03:00.0: nv50_sor_mode_set:199 - or 0
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 0 mode 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_commit:484 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:71 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:72 - unblanked
>[drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:71 - index 1
>[drm] nouveau 0000:03:00.0: nv50_crtc_blank:72 - blanked
>[drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - 
>[drm] nouveau 0000:03:00.0: nv50_dac_dpms:121 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_sor_dpms:97 - or 1 mode 3
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler:960 - PDISPLAY_INTR 0x00000000 0x00000010
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler:960 - PDISPLAY_INTR 0x00000000 0x00000010
>Console: switching to colour frame buffer device 160x50
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], crtc: ffff88015b297800 5 fb: ffff88015a5a63c0 connectors: ffff88015f8e8b00 num_connectors: 1 (x, y) (0, 0)
>[drm:drm_crtc_helper_set_config], setting connector 11 crtc to ffff88015b297800
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>fb0: nouveaufb frame buffer device
>registered panic notifier
>[drm] Initialized nouveau 0.0.16 20090420 for 0000:03:00.0 on minor 0
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:856 - PDISPLAY_INTR_BH 0x00000000 0x00000010
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:586 - 0x610030: 0x000002a0
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:630 - type 3, or 0
>[drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1
>[drm] nouveau 0000:03:00.0: 0xC362: parsing output script 1
>[drm] nouveau 0000:03:00.0: 0xC362: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:856 - PDISPLAY_INTR_BH 0x00000000 0x00000020
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:586 - 0x610030: 0x000002b0
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:630 - type 3, or 0
>[drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:797 - head 0 pxclk: 66090KHz
>[drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1
>[drm] nouveau 0000:03:00.0: output script 2 not found
>[drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00614100
>[drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1
>[drm] nouveau 0000:03:00.0: 0xC1D1: parsing clock script 0
>[drm] nouveau 0000:03:00.0: 0xC1D1: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC1D1: Executing subroutine at 0xC2E5
>[drm] nouveau 0000:03:00.0: 0xC2E5: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xC2E5: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061C00C, Data: 0x01060200
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C00C, Data: 0x01060200
>[drm] nouveau 0000:03:00.0: 0xC2F2: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xC2F2: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000001
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061C00C, Data: 0x01060200
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C00C, Data: 0x01060201
>[drm] nouveau 0000:03:00.0: 0xC2FF: [ (0x74) - INIT_TIME ]
>[drm] nouveau 0000:03:00.0: 0xC2FF: Sleeping for 0x3E80 microseconds
>ACPI: PCI Interrupt Link [LUS2] enabled at IRQ 22
>ehci_hcd 0000:00:04.1: PCI INT B -> Link[LUS2] -> GSI 22 (level, low) -> IRQ 22
>ehci_hcd 0000:00:04.1: setting latency timer to 64
>ehci_hcd 0000:00:04.1: EHCI Host Controller
>ehci_hcd 0000:00:04.1: new USB bus registered, assigned bus number 1
>ehci_hcd 0000:00:04.1: debug port 1
>ehci_hcd 0000:00:04.1: cache line size of 32 is not supported
>ehci_hcd 0000:00:04.1: irq 22, io mem 0xf0889000
>ehci_hcd 0000:00:04.1: USB 2.0 started, EHCI 1.00
>usb usb1: configuration #1 chosen from 1 choice
>hub 1-0:1.0: USB hub found
>hub 1-0:1.0: 4 ports detected
>forcedeth: Reverse Engineered nForce ethernet driver. Version 0.64.
>ACPI: PCI Interrupt Link [LMAC] enabled at IRQ 21
>forcedeth 0000:00:0a.0: PCI INT A -> Link[LMAC] -> GSI 21 (level, low) -> IRQ 21
>forcedeth 0000:00:0a.0: setting latency timer to 64
>cfg80211: World regulatory domain updated:
>	(start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
>	(2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>	(2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
>	(2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
>	(5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>	(5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>[drm] nouveau 0000:03:00.0: 0xC302: [ (0x6E) - INIT_NV_REG ]
>[drm] nouveau 0000:03:00.0: 0xC302: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Read:  Reg: 0x0061C00C, Data: 0x01060201
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C00C, Data: 0x01060200
>[drm] nouveau 0000:03:00.0: 0xC30F: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC1D1: End of 0xC2E5 subroutine
>[drm] nouveau 0000:03:00.0: 0xC1D4: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC1D4: BaseReg: 0x4061C00C, Count: 0x05
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C00C, Data: 0x01060200
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C010, Data: 0x0100000A
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C014, Data: 0x00000000
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C018, Data: 0x000F4AF8
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C01C, Data: 0x0001CAF8
>[drm] nouveau 0000:03:00.0: 0xC1EE: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC1EE: Executing subroutine at 0xC33B
>[drm] nouveau 0000:03:00.0: 0xC33B: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC33B: BaseReg: 0x4061C118, Count: 0x02
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C118, Data: 0x0C0C0C0C
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C11C, Data: 0x0000000C
>[drm] nouveau 0000:03:00.0: 0xC349: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>[drm] nouveau 0000:03:00.0: 0xC349: BaseReg: 0x4061C198, Count: 0x02
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C198, Data: 0x0C0C0C0C
>[drm] nouveau 0000:03:00.0: 	Write: Reg: 0x0061C19C, Data: 0x0000000C
>[drm] nouveau 0000:03:00.0: 0xC357: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC1EE: End of 0xC33B subroutine
>[drm] nouveau 0000:03:00.0: 0xC1F1: [ (0x5B) - INIT_SUB_DIRECT ]
>[drm] nouveau 0000:03:00.0: 0xC1F1: Executing subroutine at 0xC358
>[drm] nouveau 0000:03:00.0: 0xC358: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: 0xC1F1: End of 0xC358 subroutine
>[drm] nouveau 0000:03:00.0: 0xC1F4: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:856 - PDISPLAY_INTR_BH 0x00000000 0x00000000
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler:960 - PDISPLAY_INTR 0x00000000 0x00000044
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler:960 - PDISPLAY_INTR 0x00000000 0x00000040
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:856 - PDISPLAY_INTR_BH 0x00000000 0x00000040
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:586 - 0x610030: 0x000002b0
>[drm] nouveau 0000:03:00.0: nv50_display_irq_head:630 - type 3, or 0
>[drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1
>[drm] nouveau 0000:03:00.0: 0xC359: parsing clock script 1
>[drm] nouveau 0000:03:00.0: 0xC359: [ (0x71) - INIT_DONE ]
>[drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:856 - PDISPLAY_INTR_BH 0x00000000 0x00000000
>forcedeth 0000:00:0a.0: ifname eth0, PHY OUI 0x50ef @ 0, addr 00:22:19:f1:37:3a
>forcedeth 0000:00:0a.0: highdma csum pwrctl gbit lnktim msi desc-v3
>i2c i2c-4: nForce2 SMBus adapter at 0x3040
>i2c i2c-5: nForce2 SMBus adapter at 0x2000
>HDA Intel 0000:00:08.0: power state changed by ACPI to D0
>HDA Intel 0000:00:08.0: power state changed by ACPI to D0
>ACPI: PCI Interrupt Link [LAZA] enabled at IRQ 17
>HDA Intel 0000:00:08.0: PCI INT A -> Link[LAZA] -> GSI 17 (level, low) -> IRQ 17
>hda_intel: Disable MSI for Nvidia chipset
>HDA Intel 0000:00:08.0: setting latency timer to 64
>hda-intel: azx_get_response timeout, switching to polling mode: last cmd=0x100f0000
>hda-intel: Codec #1 probe error; disabling it...
>input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:08.0/input/input9
>input: HDA NVidia Mic at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input10
>input: HDA NVidia HP Out at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input11
>input: HDA NVidia HP Out at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input12
>ACPI: PCI Interrupt Link [Z00P] enabled at IRQ 20
>ehci_hcd 0000:00:06.1: PCI INT B -> Link[Z00P] -> GSI 20 (level, low) -> IRQ 20
>ehci_hcd 0000:00:06.1: setting latency timer to 64
>ehci_hcd 0000:00:06.1: EHCI Host Controller
>ehci_hcd 0000:00:06.1: new USB bus registered, assigned bus number 2
>ehci_hcd 0000:00:06.1: debug port 1
>ehci_hcd 0000:00:06.1: cache line size of 32 is not supported
>ehci_hcd 0000:00:06.1: irq 20, io mem 0xf0889400
>ehci_hcd 0000:00:06.1: USB 2.0 started, EHCI 1.00
>usb usb2: configuration #1 chosen from 1 choice
>hub 2-0:1.0: USB hub found
>hub 2-0:1.0: 3 ports detected
>shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>ACPI: PCI Interrupt Link [LUS0] enabled at IRQ 19
>ohci_hcd 0000:00:04.0: PCI INT A -> Link[LUS0] -> GSI 19 (level, low) -> IRQ 19
>ohci_hcd 0000:00:04.0: setting latency timer to 64
>ohci_hcd 0000:00:04.0: OHCI Host Controller
>ohci_hcd 0000:00:04.0: new USB bus registered, assigned bus number 3
>ohci_hcd 0000:00:04.0: irq 19, io mem 0xf0886000
>usb usb3: configuration #1 chosen from 1 choice
>hub 3-0:1.0: USB hub found
>hub 3-0:1.0: 4 ports detected
>ACPI: PCI Interrupt Link [Z00O] enabled at IRQ 18
>ohci_hcd 0000:00:06.0: PCI INT A -> Link[Z00O] -> GSI 18 (level, low) -> IRQ 18
>ohci_hcd 0000:00:06.0: setting latency timer to 64
>ohci_hcd 0000:00:06.0: OHCI Host Controller
>ohci_hcd 0000:00:06.0: new USB bus registered, assigned bus number 4
>ohci_hcd 0000:00:06.0: irq 18, io mem 0xf0887000
>usb usb4: configuration #1 chosen from 1 choice
>hub 4-0:1.0: USB hub found
>hub 4-0:1.0: 3 ports detected
>usb 2-3: new high speed USB device using ehci_hcd and address 2
>usb 2-3: configuration #1 chosen from 1 choice
>usb 3-4: new full speed USB device using ohci_hcd and address 2
>usb 3-4: configuration #1 chosen from 1 choice
>hub 3-4:1.0: USB hub found
>hub 3-4:1.0: 3 ports detected
>usb 3-4.1: new full speed USB device using ohci_hcd and address 3
>usb 3-4.1: configuration #1 chosen from 1 choice
>usb 3-4.2: new full speed USB device using ohci_hcd and address 4
>usbcore: registered new interface driver hiddev
>input: HID 413c:8157 as /devices/pci0000:00/0000:00:04.0/usb3/3-4/3-4.1/3-4.1:1.0/input/input13
>generic-usb 0003:413C:8157.0001: input,hidraw0: USB HID v1.11 Keyboard [HID 413c:8157] on usb-0000:00:04.0-4.1/input0
>usbcore: registered new interface driver usbhid
>usbhid: v2.6:USB HID core driver
>usb 3-4.2: configuration #1 chosen from 1 choice
>input: HID 413c:8158 as /devices/pci0000:00/0000:00:04.0/usb3/3-4/3-4.2/3-4.2:1.0/input/input14
>generic-usb 0003:413C:8158.0002: input,hidraw1: USB HID v1.11 Mouse [HID 413c:8158] on usb-0000:00:04.0-4.2/input0
>EXT4-fs (dm-0): mounted filesystem with ordered data mode
>EXT4-fs (sda1): mounted filesystem with ordered data mode
>fuse init (API version 7.13)
>usb 3-4.3: new full speed USB device using ohci_hcd and address 5
>usb 3-4.3: configuration #1 chosen from 1 choice
>Bluetooth: Core ver 2.15
>NET: Registered protocol family 31
>Bluetooth: HCI device and connection manager initialized
>Bluetooth: HCI socket layer initialized
>Bluetooth: Generic Bluetooth USB driver ver 0.6
>usbcore: registered new interface driver btusb
>Adding 4095992k swap on /dev/mapper/vg_soulou2-LogVol02.  Priority:-1 extents:1 across:4095992k 
>NET: Registered protocol family 10
>lo: Disabled Privacy Extensions
>CPUFREQ: Per core ondemand sysfs interface is deprecated - ignore_nice_load
>ata1.00: configured for UDMA/133
>ata1: EH complete
>sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>ADDRCONF(NETDEV_UP): wlan0: link is not ready
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], crtc: ffff88015b297800 5 fb: ffff88015a5a63c0 connectors: ffff88015f8e8b00 num_connectors: 1 (x, y) (0, 0)
>[drm:drm_crtc_helper_set_config], setting connector 11 crtc to ffff88015b297800
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>[drm] nouveau 0000:03:00.0: nouveau_channel_cleanup:336 - clearing FIFO enables from file_priv
>[drm] nouveau 0000:03:00.0: nouveau_channel_cleanup:336 - clearing FIFO enables from file_priv
>vgaarb: device changed decodes: PCI:0000:03:00.0,olddecodes=io+mem,decodes=none:owns=io+mem
>vgaarb: transferring owner from PCI:0000:03:00.0 to PCI:0000:02:00.0
>[drm] nouveau 0000:03:00.0: nouveau_channel_cleanup:336 - clearing FIFO enables from file_priv
>[drm] nouveau 0000:03:00.0: nouveau_channel_cleanup:336 - clearing FIFO enables from file_priv
>[drm:drm_mode_getresources], Counted 2 3 4
>[drm:drm_mode_getresources], Counted 2 3 4
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm] nouveau 0000:03:00.0: Allocating FIFO number 2
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x10
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:970 - ch2 vram=0xd8000001 tt=0xd8000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:916 - ch2
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:938 - ch2 PRAMIN size: 0x0007f400 bytes, base alloc=0x00006000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=521216 align=4096 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff88015ab46900
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x1ba000 sz=0x80000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x1ba000, pte=884, pte_end=1140
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00670000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015ab46900
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x001ba200 b_offset=0xffffffff size=0x00004000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff8801564379c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=32768 align=16 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880156437900
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x00000000 gpuobj=ffff880156437900
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch2 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801566fbf60
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0xd8000001 gpuobj=ffff8801566fbf60
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000001
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000d0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000d0: h=0xd8000001, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0xd8000002 gpuobj=ffff8801566fbf60
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000002
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000c8
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000c8: h=0xd8000002, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch2 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=1 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801566fbea0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x00000000 gpuobj=ffff8801566fbea0
>[drm] nouveau 0000:03:00.0: nv50_graph_create_context:219 - ch2
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=307200 align=4096 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801566fbe40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff8801566fbe40
>[drm] nouveau 0000:03:00.0: nv50_fifo_create_context:249 - ch2
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=256 align=256 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801566fbf00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff8801566fbf00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=4096 align=1024 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801566fbde0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff8801566fbde0
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch2
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_thingo:46 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch2 class=0x5039
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880159df44e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000001 gpuobj=ffff880159df44e0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000001
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000088: h=0x80000001, c=0x00100e04
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x8000000e gpuobj=ffff880158d39000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x8000000e
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000f0: h=0x8000000e, c=0x00000004
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch2 class=0x003d offset=0x660000 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000006 gpuobj=ffff880158d39060
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000006
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000b0: h=0x80000006, c=0x00000e06
>[drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 2
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch2 class=0x0030
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d390c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x00000000 gpuobj=ffff880158d390c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000000: h=0x00000000, c=0x00100e08
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x20
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x30
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x40
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x50
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch2 class=0x003d offset=0x660020 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d395a0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0xd8000003 gpuobj=ffff880158d395a0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000003
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000c0: h=0xd8000003, c=0x00000e0a
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch2 class=0x502d
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39600
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000020 gpuobj=ffff880158d39600
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000020
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000180
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000180: h=0x80000020, c=0x00100e0c
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch2 class=0x5039
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39660
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000018 gpuobj=ffff880158d39660
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000018
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000040
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000040: h=0x80000018, c=0x00100e0e
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch2 class=0x8397
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d396c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000019 gpuobj=ffff880158d396c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000019
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000048
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000048: h=0x80000019, c=0x00100e20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0x80000021 gpuobj=ffff880158d39720
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000021
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000188
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x00000188: h=0x80000021, c=0x00000004
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch2 class=0x003d offset=0x660040 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch2 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39780
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch2 h=0xd8000004 gpuobj=ffff880158d39780
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000004
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f8
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch2 0x000000f8: h=0xd8000004, c=0x00000e22
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 4096
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x60
>[drm] nouveau 0000:03:00.0: Allocating FIFO number 3
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x1060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:970 - ch3 vram=0xbeef0201 tt=0xbeef0202
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:916 - ch3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:938 - ch3 PRAMIN size: 0x0007f400 bytes, base alloc=0x00006000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch-1 size=521216 align=4096 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39cc0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:245 - global heap
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:444 - st=0x23a000 sz=0x80000
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:451 - pramin=0x23a000, pte=1140, pte_end=1396
>[drm] nouveau 0000:03:00.0: nv50_instmem_bind:452 - first vram page: 0x00b40000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880158d39cc0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:580 - p_offset=0x0023a200 b_offset=0xffffffff size=0x00004000 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:585 - gpuobj ffff880158d39de0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff88015b0c2060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880159df4b40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=32768 align=16 flags=0x00000002
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39e40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x00000000 gpuobj=ffff880158d39e40
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch3 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39ea0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef0201 gpuobj=ffff880158d39ea0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0201
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000160
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000160: h=0xbeef0201, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef0202 gpuobj=ffff880158d39ea0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0202
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000178
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000178: h=0xbeef0202, c=0x00000e00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch3 class=0x003d offset=0x0 size=0x60000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=1 target=3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39f00
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x00000000 gpuobj=ffff880158d39f00
>[drm] nouveau 0000:03:00.0: nv50_graph_create_context:219 - ch3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=307200 align=4096 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880158d39f60
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880158d39f60
>[drm] nouveau 0000:03:00.0: nv50_fifo_create_context:249 - ch3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=256 align=256 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880153631000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880153631000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=4096 align=1024 flags=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880153631060
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch-1 h=0x00000000 gpuobj=ffff880153631060
>[drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:71 - ch3
>[drm] nouveau 0000:03:00.0: nv50_fifo_init_thingo:46 - 
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch3 class=0x5039
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801536310c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x80000001 gpuobj=ffff8801536310c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x80000001
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000088: h=0x80000001, c=0x00100e04
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x8000000e gpuobj=ffff880153631120
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x8000000e
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x000000f0: h=0x8000000e, c=0x00000004
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch3 class=0x003d offset=0x700000 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880153631180
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x80000006 gpuobj=ffff880153631180
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x80000006
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x000000b0: h=0x80000006, c=0x00000e06
>[drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 3
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch3 class=0x0030
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801536311e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0x00000000 gpuobj=ffff8801536311e0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000000
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000000: h=0x00000000, c=0x00100e08
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x1070
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x1080
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x1090
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:27 - num_pages = 16
>[drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:97 - pg=0x10a0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch3 class=0x5039
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801536316c0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef5039 gpuobj=ffff8801536316c0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef5039
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000001e8
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x000001e8: h=0xbeef5039, c=0x00100e0a
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch3 class=0x502d
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880153631720
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef502d gpuobj=ffff880153631720
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef502d
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000148
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000148: h=0xbeef502d, c=0x00100e0c
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:840 - ch3 class=0x8397
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff880153631780
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef5097 gpuobj=ffff880153631780
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef5097
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000498
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000498: h=0xbeef5097, c=0x00100e0e
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:679 - ch3 class=0x003d offset=0x700020 size=0x20
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:680 - access=0 target=0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:216 - ch3 size=24 align=16 flags=0x00000006
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:224 - gpuobj ffff8801536317e0
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:237 - private heap
>[drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:457 - ch3 h=0xbeef0301 gpuobj=ffff8801536317e0
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0301
>[drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000960
>[drm] nouveau 0000:03:00.0: nouveau_ramht_insert:141 - insert ch3 0x00000960: h=0xbeef0301, c=0x00000e20
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], crtc: ffff88015b297800 5 fb: ffff88015ada2e40 connectors: ffff8801567fa290 num_connectors: 1 (x, y) (0, 0)
>[drm:drm_crtc_helper_set_config], setting connector 11 crtc to ffff88015b297800
>[drm] nouveau 0000:03:00.0: nv50_crtc_do_mode_set_base:523 - index 0
>[drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - 
>ath9k 0000:06:00.0: PCI INT A disabled
>ath9k: Driver unloaded
>cfg80211: Calling CRDA to update world regulatory domain
>ath9k 0000:06:00.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21
>ath9k 0000:06:00.0: setting latency timer to 64
>cfg80211: World regulatory domain updated:
>	(start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
>	(2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>	(2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
>	(2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
>	(5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>	(5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
>ath: EEPROM regdomain: 0x60
>ath: EEPROM indicates we should expect a direct regpair map
>ath: Country alpha2 being used: 00
>ath: Regpair used: 0x60
>phy0: Selected rate control algorithm 'ath9k_rate_control'
>Registered led device: ath9k-phy0::radio
>Registered led device: ath9k-phy0::assoc
>Registered led device: ath9k-phy0::tx
>Registered led device: ath9k-phy0::rx
>phy0: Atheros AR9280 MAC/BB Rev:2 AR5133 RF Rev:d0: mem=0xffffc90000ae0000, irq=21
>ADDRCONF(NETDEV_UP): wlan0: link is not ready
>wlan0: direct probe to AP 12:68:16:9a:85:0c (try 1)
>wlan0: direct probe responded
>wlan0: authenticate with AP 12:68:16:9a:85:0c (try 1)
>wlan0: authenticated
>wlan0: associate with AP 12:68:16:9a:85:0c (try 1)
>wlan0: RX AssocResp from 12:68:16:9a:85:0c (capab=0x411 status=0 aid=2)
>wlan0: associated
>ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
>Intel AES-NI instructions are not detected.
>padlock: VIA PadLock not detected.
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 16:
>[drm:drm_helper_probe_single_connector_modes], VGA-1
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:85 - Using bios provided load_pattern of 384
>[drm] nouveau 0000:03:00.0: nv50_dac_detect:108 - Load was not detected on output with or 1
>[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 17:
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 4 addr 0x50 len 1
>[drm] nouveau 0000:03:00.0: nouveau_dp_auxch:449 - ch 0 cmd 0 addr 0x50 len 1
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return -16
>[drm:drm_helper_probe_single_connector_modes], DisplayPort-1 is disconnected
>[drm:drm_mode_getconnector], connector id 11:
>[drm:drm_helper_probe_single_connector_modes], LVDS-1
>[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
>[drm:drm_mode_debug_printmodeline], Modeline 19:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 21:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 23:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 22:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 24:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[drm:drm_mode_debug_printmodeline], Modeline 25:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[drm:drm_mode_getconnector], connector id 11:
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:119 - 
>[drm] nouveau 0000:03:00.0: nv50_cursor_show:44 -

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Attachments on bug 31366: 40026 | 40028

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