Attachment 41530 Details for Bug 27187 – Poke the GWB bit.

[patch] Poke the GWB bit.

0001-agp-intel-Experiment-with-a-855GM-GWB-bit.patch (text/plain), 2.92 KB, created by Chris Wilson on 2010-12-30 08:17:11 UTC

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Creator: Chris Wilson

Created: 2010-12-30 08:17:11 UTC

Size: 2.92 KB

patch

obsolete

>From 1eabea1343a646c098f2b906fb09dc2d7aac37e6 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Wed, 22 Dec 2010 11:37:09 +0000
>Subject: [PATCH] agp/intel: Experiment with a 855GM GWB bit
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27187
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/char/agp/intel-agp.h |    1 +
> drivers/char/agp/intel-gtt.c |   44 ++++++++++++++++++++++++++++++++++++-----
> 2 files changed, 39 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
>index c195bfe..5feebe2 100644
>--- a/drivers/char/agp/intel-agp.h
>+++ b/drivers/char/agp/intel-agp.h
>@@ -130,6 +130,7 @@
> #define INTEL_GMCH_GMS_STOLEN_352M	(0xd << 4)
> 
> #define I915_IFPADDR    0x60
>+#define I830_HIC        0x70
> 
> /* Intel 965G registers */
> #define I965_MSAC 0x62
>diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
>index da81618..5c79382 100644
>--- a/drivers/char/agp/intel-gtt.c
>+++ b/drivers/char/agp/intel-gtt.c
>@@ -21,6 +21,7 @@
> #include <linux/kernel.h>
> #include <linux/pagemap.h>
> #include <linux/agp_backend.h>
>+#include <linux/delay.h>
> #include <asm/smp.h>
> #include "agp.h"
> #include "intel-agp.h"
>@@ -745,6 +746,24 @@ static void intel_i830_setup_flush(void)
> 		i830_cleanup();
> }
> 
>+static void i855_chipset_flush(void)
>+{
>+	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
>+
>+	/* Now we've only seen documents for this magic bit on 855GM,
>+	 * we hope it exists for the other gen2 chipsets...
>+	 */
>+	writel(readl(intel_private.registers+I830_HIC) | (1<<31),
>+	       intel_private.registers+I830_HIC);
>+
>+	while (readl(intel_private.registers+I830_HIC) & (1<<31)) {
>+		if (time_after(jiffies, timeout))
>+			break;
>+
>+		udelay(50);
>+	}
>+}
>+
> /* The chipset_flush interface needs to get data that has already been
>  * flushed out of the CPU all the way out to main memory, because the GPU
>  * doesn't snoop those buffers.
>@@ -757,14 +776,27 @@ static void intel_i830_setup_flush(void)
>  */
> static void i830_chipset_flush(void)
> {
>-	unsigned int *pg = intel_private.i8xx_flush_page;
>+	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
>+
>+	/* Forcibly evict everything from the CPU write buffers.
>+	 * clflush appears to be insufficient.
>+	 */
>+	wbinvd_on_all_cpus();
> 
>-	memset(pg, 0, 1024);
>+	/* Now we've only seen documents for this magic bit on 855GM,
>+	 * we hope it exists for the other gen2 chipsets...
>+	 *
>+	 * Also works as advertised on my 845G.
>+	 */
>+	writel(readl(intel_private.registers+I830_HIC) | (1<<31),
>+	       intel_private.registers+I830_HIC);
> 
>-	if (cpu_has_clflush)
>-		clflush_cache_range(pg, 1024);
>-	else if (wbinvd_on_all_cpus() != 0)
>-		printk(KERN_ERR "Timed out waiting for cache flush.\n");
>+	while (readl(intel_private.registers+I830_HIC) & (1<<31)) {
>+		if (time_after(jiffies, timeout))
>+			break;
>+
>+		udelay(50);
>+	}
> }
> 
> static void i830_write_entry(dma_addr_t addr, unsigned int entry,
>-- 
>1.7.2.3
>

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