Attachment 45724 Details for Bug 36246 – Check that the plane points to the pipe's framebuffer

[patch] Check that the plane points to the pipe's framebuffer

0001-drm-i915-Check-that-the-plane-points-to-the-pipe-s-f.patch (text/plain), 2.52 KB, created by Chris Wilson on 2011-04-17 00:02:20 UTC

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Creator: Chris Wilson

Created: 2011-04-17 00:02:20 UTC

Size: 2.52 KB

patch

obsolete

>From 8f142e70d6f0f1c54fb33040b233e6b40587e7b3 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Sat, 16 Apr 2011 19:15:30 +0100
>Subject: [PATCH] drm/i915: Check that the plane points to the pipe's framebuffer before enabling
>
>Knut Petersen reported a GPU hang when he left x11perf running
>overnight. The error state quite clearly indicates that plane A was
>enabled without being fully setup:
>
>PGTBL_ER: 0x00000010
>    Display A: Invalid GTT PTE
>Plane [0]:
>  CNTR: c1000000
>  STRIDE: 00000c80
>  SIZE: 03ff04ff
>  POS: 00000000
>  ADDR: 00000000
>
>[That GTT offset on his system being pinned for the ringbuffer.]
>
>This is a simple debugging patch to assert that this cannot be so!
>
>References: https://bugs.freedesktop.org/show_bug.cgi?id=36246
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
>---
> drivers/gpu/drm/i915/intel_display.c |   26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 7734d1e..dea051d 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -1274,6 +1274,31 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
> 	intel_wait_for_pipe_off(dev_priv->dev, pipe);
> }
> 
>+/* Check that the DSPADDR points to the right framebufffer for the pipe. */
>+static void assert_fb_bound_to_plane(struct drm_i915_private *dev_priv,
>+				     enum pipe pipe, enum plane plane)
>+{
>+	struct drm_crtc *crtc;
>+	struct intel_framebuffer *intel_fb;
>+	u32 val, base, size;
>+
>+	crtc = intel_get_crtc_for_pipe(dev_priv->dev, pipe);
>+	if (WARN(crtc->fb == NULL,
>+		 "no framebuffer attached to pipe %c\n",
>+		 pipe_name(pipe)))
>+		return;
>+
>+	intel_fb = to_intel_framebuffer(crtc->fb);
>+	base = intel_fb->obj->gtt_offset;
>+	size = intel_fb->obj->base.size;
>+
>+	val = I915_READ(DSPADDR(plane));
>+	WARN(val < base || val >= base + size,
>+	     "mismatching framebuffer for plane %c attached to pipe %c, expected %x-%x found %x\n",
>+	     plane_name(plane), pipe_name(pipe),
>+	     base, base + size, val);
>+}
>+
> /**
>  * intel_enable_plane - enable a display plane on a given pipe
>  * @dev_priv: i915 private structure
>@@ -1290,6 +1315,7 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
> 
> 	/* If the pipe isn't enabled, we can't pump pixels and may hang */
> 	assert_pipe_enabled(dev_priv, pipe);
>+	assert_fb_bound_to_plane(dev_priv, pipe, plane);
> 
> 	reg = DSPCNTR(plane);
> 	val = I915_READ(reg);
>-- 
>1.7.4.1
>

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Attachments on bug 36246: 45634 | 45635 | 45715 | 45724 | 45743 | 45744 | 45745 | 45829 | 45830 | 46037 | 46103

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