Attachment 47964 Details for Bug 38238 – Alternate patch to silence warnings

[patch] Alternate patch to silence warnings

0001-Silence-comparison-between-anonymous-enums-warnings.patch (text/plain), 7.59 KB, created by Trevour Crow on 2011-06-14 08:45:29 UTC

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Creator: Trevour Crow

Created: 2011-06-14 08:45:29 UTC

Size: 7.59 KB

patch

obsolete

>From a8a782aceda95c9e7a79c8992e41804d7a0c3050 Mon Sep 17 00:00:00 2001
>From: "Trevour Crow" <crowtr@yahoo.com>
>Date: Tue, 14 Jun 2011 10:26:34 -0500
>Subject: [PATCH] Silence "comparison between anonymous enums" warnings
>
>Also line up the backslashes in the PACK0 macros.
>---
> src/evergreen_state.h |   53 ++++++++++++++++++++++---------------------
> src/r600_state.h      |   59 +++++++++++++++++++++++++------------------------
> 2 files changed, 57 insertions(+), 55 deletions(-)
>
>diff --git a/src/evergreen_state.h b/src/evergreen_state.h
>index 40fec22..3f43312 100644
>--- a/src/evergreen_state.h
>+++ b/src/evergreen_state.h
>@@ -254,32 +254,33 @@ do {                                                                    \
> 
> /* write num registers, start at reg */
> /* If register falls in a special area, special commands are issued */
>-#define PACK0(reg, num)                                             \
>-do {                                                                    \
>-    if ((reg) >= SET_CONFIG_REG_offset && (reg) < SET_CONFIG_REG_end) {	\
>-	PACK3(IT_SET_CONFIG_REG, (num) + 1);			\
>-	E32(((reg) - SET_CONFIG_REG_offset) >> 2);                  \
>-    } else if ((reg) >= SET_CONTEXT_REG_offset && (reg) < SET_CONTEXT_REG_end) { \
>-	PACK3(IT_SET_CONTEXT_REG, (num) + 1);			\
>-	E32(((reg) - SET_CONTEXT_REG_offset) >> 2);			\
>-    } else if ((reg) >= SET_RESOURCE_offset && (reg) < SET_RESOURCE_end) { \
>-	PACK3(IT_SET_RESOURCE, num + 1);				\
>-	E32(((reg) - SET_RESOURCE_offset) >> 2);			\
>-    } else if ((reg) >= SET_SAMPLER_offset && (reg) < SET_SAMPLER_end) { \
>-	PACK3(IT_SET_SAMPLER, (num) + 1);				\
>-	E32((reg - SET_SAMPLER_offset) >> 2);			\
>-    } else if ((reg) >= SET_CTL_CONST_offset && (reg) < SET_CTL_CONST_end) { \
>-	PACK3(IT_SET_CTL_CONST, (num) + 1);			\
>-	E32(((reg) - SET_CTL_CONST_offset) >> 2);		\
>-    } else if ((reg) >= SET_LOOP_CONST_offset && (reg) < SET_LOOP_CONST_end) { \
>-	PACK3(IT_SET_LOOP_CONST, (num) + 1);			\
>-	E32(((reg) - SET_LOOP_CONST_offset) >> 2);		\
>-    } else if ((reg) >= SET_BOOL_CONST_offset && (reg) < SET_BOOL_CONST_end) { \
>-	PACK3(IT_SET_BOOL_CONST, (num) + 1);			\
>-	E32(((reg) - SET_BOOL_CONST_offset) >> 2);		\
>-    } else {								\
>-	E32(CP_PACKET0 ((reg), (num) - 1));			\
>-    }									\
>+#define PACK0(reg, num)                                                  \
>+do {                                                                     \
>+    int r = (reg);                                                       \
>+    if (r >= SET_CONFIG_REG_offset && r < SET_CONFIG_REG_end) {	         \
>+	PACK3(IT_SET_CONFIG_REG, (num) + 1);			         \
>+	E32((r - SET_CONFIG_REG_offset) >> 2);                           \
>+    } else if (r >= SET_CONTEXT_REG_offset && r < SET_CONTEXT_REG_end) { \
>+	PACK3(IT_SET_CONTEXT_REG, (num) + 1);			         \
>+	E32((r - SET_CONTEXT_REG_offset) >> 2);			         \
>+    } else if (r >= SET_RESOURCE_offset && r < SET_RESOURCE_end) {       \
>+	PACK3(IT_SET_RESOURCE, num + 1);				 \
>+	E32((r - SET_RESOURCE_offset) >> 2);			         \
>+    } else if (r >= SET_SAMPLER_offset && r < SET_SAMPLER_end) {         \
>+	PACK3(IT_SET_SAMPLER, (num) + 1);				 \
>+	E32((r - SET_SAMPLER_offset) >> 2);			         \
>+    } else if (r >= SET_CTL_CONST_offset && r < SET_CTL_CONST_end) {     \
>+	PACK3(IT_SET_CTL_CONST, (num) + 1);			         \
>+	E32((r - SET_CTL_CONST_offset) >> 2);		                 \
>+    } else if (r >= SET_LOOP_CONST_offset && r < SET_LOOP_CONST_end) {   \
>+	PACK3(IT_SET_LOOP_CONST, (num) + 1);			         \
>+	E32((r - SET_LOOP_CONST_offset) >> 2);		                 \
>+    } else if (r >= SET_BOOL_CONST_offset && r < SET_BOOL_CONST_end) {   \
>+	PACK3(IT_SET_BOOL_CONST, (num) + 1);			         \
>+	E32((r - SET_BOOL_CONST_offset) >> 2);		                 \
>+    } else {								 \
>+	E32(CP_PACKET0 (r, (num) - 1));			                 \
>+    }									 \
> } while (0)
> 
> /* write a single register */
>diff --git a/src/r600_state.h b/src/r600_state.h
>index d5785cd..c62fd35 100644
>--- a/src/r600_state.h
>+++ b/src/r600_state.h
>@@ -238,35 +238,36 @@ do {                                                                    \
> 
> /* write num registers, start at reg */
> /* If register falls in a special area, special commands are issued */
>-#define PACK0(ib, reg, num)                                             \
>-do {                                                                    \
>-    if ((reg) >= SET_CONFIG_REG_offset && (reg) < SET_CONFIG_REG_end) {	\
>-	PACK3((ib), IT_SET_CONFIG_REG, (num) + 1);			\
>-	E32((ib), ((reg) - SET_CONFIG_REG_offset) >> 2);		\
>-    } else if ((reg) >= SET_CONTEXT_REG_offset && (reg) < SET_CONTEXT_REG_end) { \
>-	PACK3((ib), IT_SET_CONTEXT_REG, (num) + 1);			\
>-	E32((ib), ((reg) - SET_CONTEXT_REG_offset) >> 2);		\
>-    } else if ((reg) >= SET_ALU_CONST_offset && (reg) < SET_ALU_CONST_end) { \
>-	PACK3((ib), IT_SET_ALU_CONST, (num) + 1);			\
>-	E32((ib), ((reg) - SET_ALU_CONST_offset) >> 2);			\
>-    } else if ((reg) >= SET_RESOURCE_offset && (reg) < SET_RESOURCE_end) { \
>-	PACK3((ib), IT_SET_RESOURCE, num + 1);				\
>-	E32((ib), ((reg) - SET_RESOURCE_offset) >> 2);			\
>-    } else if ((reg) >= SET_SAMPLER_offset && (reg) < SET_SAMPLER_end) { \
>-	PACK3((ib), IT_SET_SAMPLER, (num) + 1);				\
>-	E32((ib), (reg - SET_SAMPLER_offset) >> 2);			\
>-    } else if ((reg) >= SET_CTL_CONST_offset && (reg) < SET_CTL_CONST_end) { \
>-	PACK3((ib), IT_SET_CTL_CONST, (num) + 1);			\
>-	E32((ib), ((reg) - SET_CTL_CONST_offset) >> 2);		\
>-    } else if ((reg) >= SET_LOOP_CONST_offset && (reg) < SET_LOOP_CONST_end) { \
>-	PACK3((ib), IT_SET_LOOP_CONST, (num) + 1);			\
>-	E32((ib), ((reg) - SET_LOOP_CONST_offset) >> 2);		\
>-    } else if ((reg) >= SET_BOOL_CONST_offset && (reg) < SET_BOOL_CONST_end) { \
>-	PACK3((ib), IT_SET_BOOL_CONST, (num) + 1);			\
>-	E32((ib), ((reg) - SET_BOOL_CONST_offset) >> 2);		\
>-    } else {								\
>-	E32((ib), CP_PACKET0 ((reg), (num) - 1));			\
>-    }									\
>+#define PACK0(ib, reg, num)                                              \
>+do {                                                                     \
>+    int r = (reg);                                                       \
>+    if (r >= SET_CONFIG_REG_offset && r < SET_CONFIG_REG_end) {	         \
>+	PACK3((ib), IT_SET_CONFIG_REG, (num) + 1);			 \
>+	E32((ib), (r - SET_CONFIG_REG_offset) >> 2);		         \
>+    } else if (r >= SET_CONTEXT_REG_offset && r < SET_CONTEXT_REG_end) { \
>+	PACK3((ib), IT_SET_CONTEXT_REG, (num) + 1);			 \
>+	E32((ib), (r - SET_CONTEXT_REG_offset) >> 2);		         \
>+    } else if (r >= SET_ALU_CONST_offset && r < SET_ALU_CONST_end) {     \
>+	PACK3((ib), IT_SET_ALU_CONST, (num) + 1);			 \
>+	E32((ib), (r - SET_ALU_CONST_offset) >> 2);			 \
>+    } else if (r >= SET_RESOURCE_offset && r < SET_RESOURCE_end) {       \
>+	PACK3((ib), IT_SET_RESOURCE, num + 1);				 \
>+	E32((ib), (r - SET_RESOURCE_offset) >> 2);			 \
>+    } else if (r >= SET_SAMPLER_offset && r < SET_SAMPLER_end) {         \
>+	PACK3((ib), IT_SET_SAMPLER, (num) + 1);				 \
>+	E32((ib), (r - SET_SAMPLER_offset) >> 2);			 \
>+    } else if (r >= SET_CTL_CONST_offset && r < SET_CTL_CONST_end) {     \
>+	PACK3((ib), IT_SET_CTL_CONST, (num) + 1);			 \
>+	E32((ib), (r - SET_CTL_CONST_offset) >> 2);		         \
>+    } else if (r >= SET_LOOP_CONST_offset && r < SET_LOOP_CONST_end) {   \
>+	PACK3((ib), IT_SET_LOOP_CONST, (num) + 1);			 \
>+	E32((ib), (r - SET_LOOP_CONST_offset) >> 2);		         \
>+    } else if (r >= SET_BOOL_CONST_offset && r < SET_BOOL_CONST_end) {   \
>+	PACK3((ib), IT_SET_BOOL_CONST, (num) + 1);			 \
>+	E32((ib), (r - SET_BOOL_CONST_offset) >> 2);		         \
>+    } else {								 \
>+	E32((ib), CP_PACKET0 (r, (num) - 1));			         \
>+    }									 \
> } while (0)
> 
> /* write a single register */
>-- 
>1.7.5.3
>

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