Attachment 48741 Details for Bug 33487 – Set persistent mode on FBC

[patch] Set persistent mode on FBC

0001-drm-i915-Set-persistent-mode-for-SNB-framebuffer-com.patch (text/plain), 2.53 KB, created by Chris Wilson on 2011-07-04 05:34:24 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Chris Wilson

Created: 2011-07-04 05:34:24 UTC

Size: 2.53 KB

patch

obsolete

>From 794314e124d9dc6ced69aca28a66e818e0190b3b Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Mon, 4 Jul 2011 13:17:07 +0100
>Subject: [PATCH] drm/i915: Set persistent-mode for SNB framebuffer
> compression
>
>Persistent mode is intended for use with front-buffer rendering, such as
>X, where it is necessary to detect writes to the scanout either by the
>GPU or through the CPU's fence, and recompress the dirty regions on the
>fly. (By comparison to the back-buffer rendering, the scanout is always
>recompressed after a page-flip.)
>
>This fixes the missing rendering oft triggered in the past, but easily
>reproduced by using compiz with sna, for which the current workaround is
>to disable fbc entirely.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33487
>Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/i915_reg.h      |    1 +
> drivers/gpu/drm/i915/intel_display.c |   11 +++++++++--
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 5d5def7..22f50da 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -579,6 +579,7 @@
> #define   DPFC_CTL_PLANEA	(0<<30)
> #define   DPFC_CTL_PLANEB	(1<<30)
> #define   DPFC_CTL_FENCE_EN	(1<<29)
>+#define   SNB_DPFC_CTL_PERSISTENT_MODE	(1<<25)
> #define   DPFC_SR_EN		(1<<10)
> #define   DPFC_CTL_LIMIT_1X	(0<<6)
> #define   DPFC_CTL_LIMIT_2X	(1<<6)
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index ec05497..a32a894 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -1601,16 +1601,23 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
> 		   (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
> 	I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y);
> 	I915_WRITE(ILK_FBC_RT_BASE, obj->gtt_offset | ILK_FBC_RT_VALID);
>-	/* enable it... */
>-	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
> 
> 	if (IS_GEN6(dev)) {
> 		I915_WRITE(SNB_DPFC_CTL_SA,
> 			   SNB_CPU_FENCE_ENABLE | dev_priv->cfb_fence);
> 		I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
>+
>+		/* Set persistent mode for front-buffer rendering and to
>+		 * detect direct writes through the CPU.
>+		  */
>+		dpfc_ctl |= SNB_DPFC_CTL_PERSISTENT_MODE;
>+
> 		sandybridge_blit_fbc_update(dev);
> 	}
> 
>+	/* and finally enable it... */
>+	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
>+
> 	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
> }
> 
>-- 
>1.7.5.4
>

Actions: View | Splinter Review

Attachments on bug 33487: 42539 | 44487 | 48741 | 48840 | 48844

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.