Attachment 49582 Details for Bug 38750 – A patch which optionally turns off SSC for all outputs based on a parameter.

[patch] A patch which optionally turns off SSC for all outputs based on a parameter.

i915-nossc-1.patch (text/plain), 5.44 KB, created by ben.brewer on 2011-07-26 09:22:18 UTC

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Creator: ben.brewer

Created: 2011-07-26 09:22:18 UTC

Size: 5.44 KB

patch

obsolete

>diff -uNr linux-2.6.38/drivers/gpu/drm/i915//i915_drv.c linux-2.6.38-nossc/drivers/gpu/drm/i915//i915_drv.c
>--- linux-2.6.38/drivers/gpu/drm/i915//i915_drv.c	2011-03-15 01:20:32.000000000 +0000
>+++ linux-2.6.38-nossc/drivers/gpu/drm/i915//i915_drv.c	2011-07-26 15:06:34.762058717 +0100
>@@ -55,7 +55,10 @@
> unsigned int i915_lvds_downclock = 0;
> module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
> 
>-unsigned int i915_panel_use_ssc = 1;
>+unsigned int i915_use_ssc = 0;
>+module_param_named(global_use_ssc, i915_use_ssc, int, 0600);
>+
>+unsigned int i915_panel_use_ssc = 0;
> module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
> 
> bool i915_try_reset = true;
>diff -uNr linux-2.6.38/drivers/gpu/drm/i915//i915_drv.h linux-2.6.38-nossc/drivers/gpu/drm/i915//i915_drv.h
>--- linux-2.6.38/drivers/gpu/drm/i915//i915_drv.h	2011-03-15 01:20:32.000000000 +0000
>+++ linux-2.6.38-nossc/drivers/gpu/drm/i915//i915_drv.h	2011-07-26 13:50:31.198058201 +0100
>@@ -344,6 +344,7 @@
> 	unsigned int lvds_vbt:1;
> 	unsigned int int_crt_support:1;
> 	unsigned int lvds_use_ssc:1;
>+	unsigned int display_clock_mode:1;
> 	int lvds_ssc_freq;
> 	struct {
> 		int rate;
>@@ -958,6 +959,7 @@
> extern unsigned int i915_powersave;
> extern unsigned int i915_semaphores;
> extern unsigned int i915_lvds_downclock;
>+extern unsigned int i915_use_ssc;
> extern unsigned int i915_panel_use_ssc;
> extern unsigned int i915_enable_rc6;
> 
>diff -uNr linux-2.6.38/drivers/gpu/drm/i915//intel_bios.c linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_bios.c
>--- linux-2.6.38/drivers/gpu/drm/i915//intel_bios.c	2011-03-15 01:20:32.000000000 +0000
>+++ linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_bios.c	2011-07-20 12:53:52.281036594 +0100
>@@ -270,6 +270,8 @@
> 			dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 120;
> 		else
> 			dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 96;
>+
>+		dev_priv->display_clock_mode = general->display_clock_mode;
> 	}
> }
> 
>diff -uNr linux-2.6.38/drivers/gpu/drm/i915//intel_bios.h linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_bios.h
>--- linux-2.6.38/drivers/gpu/drm/i915//intel_bios.h	2011-03-15 01:20:32.000000000 +0000
>+++ linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_bios.h	2011-07-20 12:52:50.309036565 +0100
>@@ -120,7 +120,9 @@
> 	u8 ssc_freq:1;
> 	u8 enable_lfp_on_override:1;
> 	u8 disable_ssc_ddt:1;
>-	u8 rsvd8:3; /* finish byte */
>+	u8 rsvd7:1;
>+	u8 display_clock_mode:1;
>+	u8 rsvd8:1; /* finish byte */
> 
>         /* bits 3 */
> 	u8 disable_smooth_vision:1;
>diff -uNr linux-2.6.38/drivers/gpu/drm/i915//intel_display.c linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_display.c
>--- linux-2.6.38/drivers/gpu/drm/i915//intel_display.c	2011-07-25 10:12:09.904820505 +0100
>+++ linux-2.6.38-nossc/drivers/gpu/drm/i915//intel_display.c	2011-07-26 14:05:07.298058301 +0100
>@@ -3924,7 +3924,7 @@
> 
> static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> {
>-	return dev_priv->lvds_use_ssc && i915_panel_use_ssc;
>+	return dev_priv->lvds_use_ssc && i915_panel_use_ssc && i915_use_ssc;
> }
> 
> static int intel_crtc_mode_set(struct drm_crtc *crtc,
>@@ -4153,39 +4153,59 @@
> 	 */
> 	if (HAS_PCH_SPLIT(dev)) {
> 		temp = I915_READ(PCH_DREF_CONTROL);
>-		/* Always enable nonspread source */
> 		temp &= ~DREF_NONSPREAD_SOURCE_MASK;
>-		temp |= DREF_NONSPREAD_SOURCE_ENABLE;
> 		temp &= ~DREF_SSC_SOURCE_MASK;
>-		temp |= DREF_SSC_SOURCE_ENABLE;
>+		if (i915_use_ssc) {
>+			/* Always enable nonspread source */
>+			temp |= DREF_NONSPREAD_SOURCE_ENABLE;
>+			temp |= DREF_SSC_SOURCE_ENABLE;
>+		} else {
>+			temp &= ~DREF_SSC1_ENABLE;
>+			temp &= ~DREF_SSC4_ENABLE;
>+			temp &= ~DREF_SUPERSPREAD_SOURCE_ENABLE;
>+			temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
>+		}
> 		I915_WRITE(PCH_DREF_CONTROL, temp);
> 
> 		POSTING_READ(PCH_DREF_CONTROL);
> 		udelay(200);
> 
>-		if (has_edp_encoder) {
>-			if (intel_panel_use_ssc(dev_priv)) {
>-				temp |= DREF_SSC1_ENABLE;
>+		if (i915_use_ssc) {
>+			if (has_edp_encoder) {
>+				if (intel_panel_use_ssc(dev_priv)) {
>+					temp |= DREF_SSC1_ENABLE;
>+					I915_WRITE(PCH_DREF_CONTROL, temp);
>+					POSTING_READ(PCH_DREF_CONTROL);
>+					udelay(200);
>+				}
>+				temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
>+				
>+				/* Enable CPU source on attached eDP */
>+				if (!intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
>+					if (intel_panel_use_ssc(dev_priv))
>+						temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
>+					else
>+						temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
>+				} else {
>+					/* Enable SSC on PCH eDP if needed */
>+					if (intel_panel_use_ssc(dev_priv)) {
>+						DRM_ERROR("enabling SSC on PCH\n");
>+						temp |= DREF_SUPERSPREAD_SOURCE_ENABLE;
>+					}
>+				}
> 				I915_WRITE(PCH_DREF_CONTROL, temp);
>-
> 				POSTING_READ(PCH_DREF_CONTROL);
> 				udelay(200);
> 			}
>-			temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
>+		} else {
>+			if (dev_priv->display_clock_mode)
>+				temp |= DREF_NONSPREAD_CK505_ENABLE;
>+			else
>+				temp |= DREF_NONSPREAD_SOURCE_ENABLE;
>+			if (has_edp_encoder &&
>+				!intel_encoder_is_pch_edp(&has_edp_encoder->base))
>+				temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
> 
>-			/* Enable CPU source on CPU attached eDP */
>-			if (!intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
>-				if (intel_panel_use_ssc(dev_priv))
>-					temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
>-				else
>-					temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
>-			} else {
>-				/* Enable SSC on PCH eDP if needed */
>-				if (intel_panel_use_ssc(dev_priv)) {
>-					DRM_ERROR("enabling SSC on PCH\n");
>-					temp |= DREF_SUPERSPREAD_SOURCE_ENABLE;
>-				}
>-			}
> 			I915_WRITE(PCH_DREF_CONTROL, temp);
> 			POSTING_READ(PCH_DREF_CONTROL);
> 			udelay(200);

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