Attachment 53199 Details for Bug 42621 – Xorg log

Xorg log

Xorg.0.log (text/plain), 454.08 KB, created by Oskar on 2011-11-05 14:44:52 UTC

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Creator: Oskar

Created: 2011-11-05 14:44:52 UTC

Size: 454.08 KB

patch

obsolete

>[  7046.311] 
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>[  7046.311] 
>X.Org X Server 1.11.1.902 (1.11.2 RC 2)
>Release Date: 2011-10-28
>[  7046.311] X Protocol Version 11, Revision 0
>[  7046.311] Build Operating System: Linux 3.1.0-2-ARCH x86_64 
>[  7046.311] Current Operating System: Linux vaio-archlinux 3.0-ARCH #1 SMP PREEMPT Wed Oct 19 10:27:51 CEST 2011 x86_64
>[  7046.311] Kernel command line: BOOT_IMAGE=/vmlinuz-linux root=/dev/sda5 ro quiet radeon.modeset=1
>[  7046.311] Build Date: 30 October 2011  08:55:15AM
>[  7046.311]  
>[  7046.311] Current version of pixman: 0.22.2
>[  7046.311] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[  7046.311] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[  7046.311] (==) Log file: "/var/log/Xorg.0.log", Time: Sat Nov  5 13:26:38 2011
>[  7046.311] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[  7046.311] (==) No Layout section.  Using the first Screen section.
>[  7046.311] (==) No screen section available. Using defaults.
>[  7046.311] (**) |-->Screen "Default Screen Section" (0)
>[  7046.312] (**) |   |-->Monitor "<default monitor>"
>[  7046.312] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[  7046.312] (==) Automatically adding devices
>[  7046.312] (==) Automatically enabling devices
>[  7046.312] (WW) The directory "/usr/share/fonts/OTF/" does not exist.
>[  7046.312] 	Entry deleted from font path.
>[  7046.312] (==) FontPath set to:
>	/usr/share/fonts/misc/,
>	/usr/share/fonts/TTF/,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi/,
>	/usr/share/fonts/75dpi/
>[  7046.312] (==) ModulePath set to "/usr/lib/xorg/modules"
>[  7046.312] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[  7046.312] (II) Loader magic: 0x7c9e60
>[  7046.312] (II) Module ABI versions:
>[  7046.312] 	X.Org ANSI C Emulation: 0.4
>[  7046.312] 	X.Org Video Driver: 11.0
>[  7046.312] 	X.Org XInput driver : 13.0
>[  7046.312] 	X.Org Server Extension : 6.0
>[  7046.313] (--) PCI:*(0:1:0:0) 1002:95c4:104d:9035 rev 0, Mem @ 0xc0000000/268435456, 0xd0020000/65536, I/O @ 0x00006000/256, BIOS @ 0x????????/131072
>[  7046.313] (WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>[  7046.313] (II) LoadModule: "extmod"
>[  7046.313] (II) Loading /usr/lib/xorg/modules/extensions/libextmod.so
>[  7046.313] (II) Module extmod: vendor="X.Org Foundation"
>[  7046.313] 	compiled for 1.11.1.902, module version = 1.0.0
>[  7046.313] 	Module class: X.Org Server Extension
>[  7046.313] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.313] (II) Loading extension MIT-SCREEN-SAVER
>[  7046.313] (II) Loading extension XFree86-VidModeExtension
>[  7046.313] (II) Loading extension XFree86-DGA
>[  7046.313] (II) Loading extension DPMS
>[  7046.313] (II) Loading extension XVideo
>[  7046.313] (II) Loading extension XVideo-MotionCompensation
>[  7046.313] (II) Loading extension X-Resource
>[  7046.313] (II) LoadModule: "dbe"
>[  7046.314] (II) Loading /usr/lib/xorg/modules/extensions/libdbe.so
>[  7046.314] (II) Module dbe: vendor="X.Org Foundation"
>[  7046.314] 	compiled for 1.11.1.902, module version = 1.0.0
>[  7046.314] 	Module class: X.Org Server Extension
>[  7046.314] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.314] (II) Loading extension DOUBLE-BUFFER
>[  7046.314] (II) LoadModule: "glx"
>[  7046.314] (II) Loading /usr/lib/xorg/modules/extensions/libglx.so
>[  7046.314] (II) Module glx: vendor="X.Org Foundation"
>[  7046.314] 	compiled for 1.11.1.902, module version = 1.0.0
>[  7046.314] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.314] (==) AIGLX enabled
>[  7046.314] (II) Loading extension GLX
>[  7046.314] (II) LoadModule: "record"
>[  7046.314] (II) Loading /usr/lib/xorg/modules/extensions/librecord.so
>[  7046.314] (II) Module record: vendor="X.Org Foundation"
>[  7046.314] 	compiled for 1.11.1.902, module version = 1.13.0
>[  7046.314] 	Module class: X.Org Server Extension
>[  7046.314] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.314] (II) Loading extension RECORD
>[  7046.314] (II) LoadModule: "dri"
>[  7046.314] (II) Loading /usr/lib/xorg/modules/extensions/libdri.so
>[  7046.315] (II) Module dri: vendor="X.Org Foundation"
>[  7046.315] 	compiled for 1.11.1.902, module version = 1.0.0
>[  7046.315] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.315] (II) Loading extension XFree86-DRI
>[  7046.315] (II) LoadModule: "dri2"
>[  7046.315] (II) Loading /usr/lib/xorg/modules/extensions/libdri2.so
>[  7046.315] (II) Module dri2: vendor="X.Org Foundation"
>[  7046.315] 	compiled for 1.11.1.902, module version = 1.2.0
>[  7046.315] 	ABI class: X.Org Server Extension, version 6.0
>[  7046.315] (II) Loading extension DRI2
>[  7046.315] (==) Matched ati as autoconfigured driver 0
>[  7046.315] (==) Matched vesa as autoconfigured driver 1
>[  7046.315] (==) Matched fbdev as autoconfigured driver 2
>[  7046.315] (==) Assigned the driver to the xf86ConfigLayout
>[  7046.315] (II) LoadModule: "ati"
>[  7046.315] (II) Loading /usr/lib/xorg/modules/drivers/ati_drv.so
>[  7046.315] (II) Module ati: vendor="X.Org Foundation"
>[  7046.315] 	compiled for 1.11.1.902, module version = 6.14.99
>[  7046.315] 	Module class: X.Org Video Driver
>[  7046.315] 	ABI class: X.Org Video Driver, version 11.0
>[  7046.315] (II) LoadModule: "radeon"
>[  7046.315] (II) Loading /usr/lib/xorg/modules/drivers/radeon_drv.so
>[  7046.316] (II) Module radeon: vendor="X.Org Foundation"
>[  7046.316] 	compiled for 1.11.1.902, module version = 6.14.99
>[  7046.316] 	Module class: X.Org Video Driver
>[  7046.316] 	ABI class: X.Org Video Driver, version 11.0
>[  7046.316] (II) LoadModule: "vesa"
>[  7046.316] (WW) Warning, couldn't open module vesa
>[  7046.316] (II) UnloadModule: "vesa"
>[  7046.316] (II) Unloading vesa
>[  7046.316] (EE) Failed to load module "vesa" (module does not exist, 0)
>[  7046.316] (II) LoadModule: "fbdev"
>[  7046.316] (WW) Warning, couldn't open module fbdev
>[  7046.316] (II) UnloadModule: "fbdev"
>[  7046.316] (II) Unloading fbdev
>[  7046.316] (EE) Failed to load module "fbdev" (module does not exist, 0)
>[  7046.316] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI Radeon 9700 Pro ND (AGP),
>	ATI Radeon 9700/9500Pro NE (AGP), ATI Radeon 9600TX NF (AGP),
>	ATI FireGL X1 NG (AGP), ATI Radeon 9800PRO NH (AGP),
>	ATI Radeon 9800 NI (AGP), ATI FireGL X2 NK (AGP),
>	ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200, ATI Radeon 4100,
>	ATI Mobility Radeon HD 4200, ATI Mobility Radeon 4100,
>	ATI Radeon HD 4290, ATI Radeon HD 4250, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, AMD Radeon HD 6900 Series,
>	AMD Radeon HD 6900 Series, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series, BARTS,
>	BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS
>[  7046.323] (++) using VT number 7
>
>[  7046.326] (II) Loading /usr/lib/xorg/modules/drivers/radeon_drv.so
>[  7046.326] (II) [KMS] Kernel modesetting enabled.
>[  7046.327] (II) RADEON(0): RADEONPreInit_KMS
>[  7046.327] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[  7046.327] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[  7046.327] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[  7046.327] (==) RADEON(0): Default visual is TrueColor
>[  7046.327] (==) RADEON(0): RGB weight 888
>[  7046.327] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[  7046.327] (--) RADEON(0): Chipset: "ATI Mobility Radeon HD 3400 Series" (ChipID = 0x95c4)
>[  7046.327] (II) RADEON(0): PCIE card detected
>[  7046.327] drmOpenDevice: node name is /dev/dri/card0
>[  7046.327] drmOpenDevice: open result is 8, (OK)
>[  7046.327] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[  7046.327] drmOpenDevice: node name is /dev/dri/card0
>[  7046.327] drmOpenDevice: open result is 8, (OK)
>[  7046.327] drmOpenByBusid: drmOpenMinor returns 8
>[  7046.327] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[  7046.327] (II) Loading sub module "exa"
>[  7046.327] (II) LoadModule: "exa"
>[  7046.327] (II) Loading /usr/lib/xorg/modules/libexa.so
>[  7046.327] (II) Module exa: vendor="X.Org Foundation"
>[  7046.327] 	compiled for 1.11.1.902, module version = 2.5.0
>[  7046.327] 	ABI class: X.Org Video Driver, version 11.0
>[  7046.327] (II) RADEON(0): KMS Color Tiling: disabled
>[  7046.327] (II) RADEON(0): KMS Pageflipping: enabled
>[  7046.327] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[  7046.349] (II) RADEON(0): Output VGA-0 has no monitor section
>[  7046.349] (II) RADEON(0): Output LVDS has no monitor section
>[  7046.403] (II) RADEON(0): Output HDMI-0 has no monitor section
>[  7046.422] (II) RADEON(0): EDID for output VGA-0
>[  7046.423] (II) RADEON(0): EDID for output LVDS
>[  7046.423] (II) RADEON(0): Printing probed modes for output LVDS
>[  7046.423] (II) RADEON(0): Modeline "1600x900"x60.0   88.54  1600 1614 1626 1630  900 902 904 906 -hsync -vsync (54.3 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[  7046.423] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[  7046.423] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[  7046.423] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[  7046.423] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[  7046.423] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[  7046.477] (II) RADEON(0): EDID for output HDMI-0
>[  7046.477] (II) RADEON(0): Manufacturer: BNQ  Model: 8002  Serial#: 21573
>[  7046.477] (II) RADEON(0): Year: 2010  Week: 51
>[  7046.477] (II) RADEON(0): EDID Version: 1.3
>[  7046.477] (II) RADEON(0): Digital Display Input
>[  7046.477] (II) RADEON(0): Max Image Size [cm]: horiz.: 53  vert.: 30
>[  7046.477] (II) RADEON(0): Gamma: 2.20
>[  7046.477] (II) RADEON(0): DPMS capabilities: Off
>[  7046.477] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[  7046.477] (II) RADEON(0): Default color space is primary color space
>[  7046.477] (II) RADEON(0): First detailed timing is preferred mode
>[  7046.477] (II) RADEON(0): redX: 0.643 redY: 0.339   greenX: 0.329 greenY: 0.624
>[  7046.477] (II) RADEON(0): blueX: 0.155 blueY: 0.048   whiteX: 0.313 whiteY: 0.329
>[  7046.477] (II) RADEON(0): Supported established timings:
>[  7046.477] (II) RADEON(0): 640x480@60Hz
>[  7046.477] (II) RADEON(0): 800x600@60Hz
>[  7046.477] (II) RADEON(0): 1024x768@60Hz
>[  7046.477] (II) RADEON(0): Manufacturer's mask: 0
>[  7046.477] (II) RADEON(0): Supported standard timings:
>[  7046.477] (II) RADEON(0): #0: hsize: 1280  vsize 800  refresh: 60  vid: 129
>[  7046.477] (II) RADEON(0): #1: hsize: 1280  vsize 720  refresh: 60  vid: 49281
>[  7046.477] (II) RADEON(0): #2: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>[  7046.477] (II) RADEON(0): #3: hsize: 1600  vsize 900  refresh: 60  vid: 49321
>[  7046.477] (II) RADEON(0): #4: hsize: 1680  vsize 1050  refresh: 60  vid: 179
>[  7046.477] (II) RADEON(0): #5: hsize: 1920  vsize 1080  refresh: 60  vid: 49361
>[  7046.477] (II) RADEON(0): Supported detailed timing:
>[  7046.477] (II) RADEON(0): clock: 148.5 MHz   Image Size:  477 x 268 mm
>[  7046.477] (II) RADEON(0): h_active: 1920  h_sync: 2008  h_sync_end 2052 h_blank_end 2200 h_border: 0
>[  7046.477] (II) RADEON(0): v_active: 1080  v_sync: 1084  v_sync_end 1089 v_blanking: 1125 v_border: 0
>[  7046.477] (II) RADEON(0): Serial No: SCA06786SL0
>[  7046.477] (II) RADEON(0): Ranges: V min: 50 V max: 76 Hz, H min: 30 H max: 83 kHz, PixClock max 175 MHz
>[  7046.477] (II) RADEON(0): Monitor name: BenQ BL2400
>[  7046.477] (II) RADEON(0): EDID (in hex):
>[  7046.477] (II) RADEON(0): 	00ffffffffffff0009d1028045540000
>[  7046.477] (II) RADEON(0): 	3314010380351e782eb7d5a456549f27
>[  7046.477] (II) RADEON(0): 	0c5054210800810081c08180a9c0b300
>[  7046.477] (II) RADEON(0): 	d1c001010101023a801871382d40582c
>[  7046.477] (II) RADEON(0): 	4500dd0c1100001e000000ff00534341
>[  7046.477] (II) RADEON(0): 	3036373836534c300a20000000fd0032
>[  7046.477] (II) RADEON(0): 	4c1e5311000a202020202020000000fc
>[  7046.477] (II) RADEON(0): 	0042656e5120424c323430300a2000f4
>[  7046.477] (II) RADEON(0): Printing probed modes for output HDMI-0
>[  7046.477] (II) RADEON(0): Modeline "1920x1080"x60.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>[  7046.477] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[  7046.477] (II) RADEON(0): Modeline "1600x900"x60.0  118.96  1600 1696 1864 2128  900 901 904 932 -hsync +vsync (55.9 kHz)
>[  7046.477] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>[  7046.478] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 +hsync -vsync (49.7 kHz)
>[  7046.478] (II) RADEON(0): Modeline "1280x720"x60.0   74.44  1280 1336 1472 1664  720 721 724 746 -hsync +vsync (44.7 kHz)
>[  7046.478] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>[  7046.478] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>[  7046.478] (II) RADEON(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>[  7046.478] (II) RADEON(0): Output VGA-0 disconnected
>[  7046.478] (II) RADEON(0): Output LVDS connected
>[  7046.478] (II) RADEON(0): Output HDMI-0 connected
>[  7046.478] (II) RADEON(0): Using exact sizes for initial modes
>[  7046.478] (II) RADEON(0): Output LVDS using initial mode 1600x900
>[  7046.478] (II) RADEON(0): Output HDMI-0 using initial mode 1600x900
>[  7046.478] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[  7046.478] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:10000000 visible:f7d7000
>[  7046.478] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[  7046.478] (==) RADEON(0): DPI set to (96, 96)
>[  7046.478] (II) Loading sub module "fb"
>[  7046.478] (II) LoadModule: "fb"
>[  7046.478] (II) Loading /usr/lib/xorg/modules/libfb.so
>[  7046.478] (II) Module fb: vendor="X.Org Foundation"
>[  7046.478] 	compiled for 1.11.1.902, module version = 1.0.0
>[  7046.478] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[  7046.478] (II) Loading sub module "ramdac"
>[  7046.478] (II) LoadModule: "ramdac"
>[  7046.478] (II) Module "ramdac" already built-in
>[  7046.478] (--) Depth 24 pixmap format is 32 bpp
>[  7046.478] (II) RADEON(0): [DRI2] Setup complete
>[  7046.478] (II) RADEON(0): [DRI2]   DRI driver: r600
>[  7046.478] (II) RADEON(0): Front buffer size: 5652K
>[  7046.478] (II) RADEON(0): VRAM usage limit set to 223322K
>[  7046.478] (II) RADEON(0): Initializing backing store
>[  7046.478] (==) RADEON(0): Backing store disabled
>[  7046.478] (II) RADEON(0): Direct rendering enabled
>[  7046.478] (II) RADEON(0): Initializing Acceleration
>[  7046.478] (II) RADEON(0): Setting EXA maxPitchBytes
>[  7046.478] (II) EXA(0): Driver allocated offscreen pixmaps
>[  7046.479] (II) EXA(0): Driver registered support for the following operations:
>[  7046.479] (II)         Solid
>[  7046.479] (II)         Copy
>[  7046.479] (II)         Composite (RENDER acceleration)
>[  7046.479] (II)         UploadToScreen
>[  7046.479] (II)         DownloadFromScreen
>[  7046.479] (II) RADEON(0): Acceleration enabled
>[  7046.479] (II) RADEON(0): Initializing DPMS
>[  7046.479] (==) RADEON(0): DPMS enabled
>[  7046.479] (II) RADEON(0): Initializing Cursor
>[  7046.479] (==) RADEON(0): Silken mouse enabled
>[  7046.479] (II) RADEON(0): Initializing Xv
>[  7046.479] (II) RADEON(0): Set up textured video
>[  7046.479] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[  7046.479] (II) RADEON(0): Initializing kms color map
>[  7046.479] (II) RADEON(0): RADEONScreenInit finished
>[  7046.479] (--) RandR disabled
>[  7046.479] (II) Initializing built-in extension Generic Event Extension
>[  7046.479] (II) Initializing built-in extension SHAPE
>[  7046.479] (II) Initializing built-in extension MIT-SHM
>[  7046.479] (II) Initializing built-in extension XInputExtension
>[  7046.479] (II) Initializing built-in extension XTEST
>[  7046.479] (II) Initializing built-in extension BIG-REQUESTS
>[  7046.479] (II) Initializing built-in extension SYNC
>[  7046.479] (II) Initializing built-in extension XKEYBOARD
>[  7046.479] (II) Initializing built-in extension XC-MISC
>[  7046.479] (II) Initializing built-in extension SECURITY
>[  7046.479] (II) Initializing built-in extension XINERAMA
>[  7046.479] (II) Initializing built-in extension XFIXES
>[  7046.479] (II) Initializing built-in extension RENDER
>[  7046.479] (II) Initializing built-in extension RANDR
>[  7046.479] (II) Initializing built-in extension COMPOSITE
>[  7046.479] (II) Initializing built-in extension DAMAGE
>[  7046.487] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[  7046.487] (II) AIGLX: enabled GLX_INTEL_swap_event
>[  7046.487] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[  7046.487] (II) AIGLX: enabled GLX_SGI_make_current_read
>[  7046.487] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[  7046.487] (II) AIGLX: Loaded and initialized r600
>[  7046.487] (II) GLX: Initialized DRI2 GL provider for screen 0
>[  7046.513] (II) RADEON(0): Setting screen physical size to 423 x 238
>[  7046.604] (II) XKB: Reusing cached keymap
>[  7046.607] (II) config/udev: Adding input device Sony Vaio Keys (/dev/input/event5)
>[  7046.607] (**) Sony Vaio Keys: Applying InputClass "evdev keyboard catchall"
>[  7046.607] (II) LoadModule: "evdev"
>[  7046.607] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.607] (II) Module evdev: vendor="X.Org Foundation"
>[  7046.607] 	compiled for 1.10.99.902, module version = 2.6.0
>[  7046.607] 	Module class: X.Org XInput Driver
>[  7046.607] 	ABI class: X.Org XInput driver, version 13.0
>[  7046.607] (II) Using input driver 'evdev' for 'Sony Vaio Keys'
>[  7046.607] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.608] 	Option "XkbRules" "evdev"
>[  7046.608] 	Option "XkbModel" "evdev"
>[  7046.608] 	Option "XkbLayout" "us"
>[  7046.608] 	Option "_source" "server/udev"
>[  7046.608] 	Option "name" "Sony Vaio Keys"
>[  7046.608] 	Option "path" "/dev/input/event5"
>[  7046.608] 	Option "device" "/dev/input/event5"
>[  7046.608] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:04/SNY5001:00/input/input5/event5"
>[  7046.608] 	Option "driver" "evdev"
>[  7046.608] (**) Sony Vaio Keys: always reports core events
>[  7046.608] (**) Sony Vaio Keys: Device: "/dev/input/event5"
>[  7046.608] (--) Sony Vaio Keys: Found keys
>[  7046.608] (II) Sony Vaio Keys: Configuring as keyboard
>[  7046.608] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:04/SNY5001:00/input/input5/event5"
>[  7046.608] (II) XINPUT: Adding extended input device "Sony Vaio Keys" (type: KEYBOARD, id 6)
>[  7046.608] (**) Option "xkb_rules" "evdev"
>[  7046.608] (**) Option "xkb_model" "evdev"
>[  7046.608] (**) Option "xkb_layout" "us"
>[  7046.632] (II) config/udev: Adding input device Video Bus (/dev/input/event3)
>[  7046.632] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[  7046.633] (II) Using input driver 'evdev' for 'Video Bus'
>[  7046.633] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.633] 	Option "XkbRules" "evdev"
>[  7046.633] 	Option "XkbModel" "evdev"
>[  7046.633] 	Option "XkbLayout" "us"
>[  7046.633] 	Option "_source" "server/udev"
>[  7046.633] 	Option "name" "Video Bus"
>[  7046.633] 	Option "path" "/dev/input/event3"
>[  7046.633] 	Option "device" "/dev/input/event3"
>[  7046.633] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:2a/LNXVIDEO:01/input/input3/event3"
>[  7046.633] 	Option "driver" "evdev"
>[  7046.633] (**) Video Bus: always reports core events
>[  7046.633] (**) Video Bus: Device: "/dev/input/event3"
>[  7046.633] (--) Video Bus: Found keys
>[  7046.633] (II) Video Bus: Configuring as keyboard
>[  7046.633] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:2a/LNXVIDEO:01/input/input3/event3"
>[  7046.633] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[  7046.633] (**) Option "xkb_rules" "evdev"
>[  7046.633] (**) Option "xkb_model" "evdev"
>[  7046.633] (**) Option "xkb_layout" "us"
>[  7046.633] (II) XKB: Reusing cached keymap
>[  7046.633] (II) config/udev: Adding input device Power Button (/dev/input/event2)
>[  7046.633] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[  7046.633] (II) Using input driver 'evdev' for 'Power Button'
>[  7046.633] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.633] 	Option "XkbRules" "evdev"
>[  7046.633] 	Option "XkbModel" "evdev"
>[  7046.633] 	Option "XkbLayout" "us"
>[  7046.633] 	Option "_source" "server/udev"
>[  7046.633] 	Option "name" "Power Button"
>[  7046.633] 	Option "path" "/dev/input/event2"
>[  7046.633] 	Option "device" "/dev/input/event2"
>[  7046.633] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input2/event2"
>[  7046.633] 	Option "driver" "evdev"
>[  7046.633] (**) Power Button: always reports core events
>[  7046.633] (**) Power Button: Device: "/dev/input/event2"
>[  7046.633] (--) Power Button: Found keys
>[  7046.633] (II) Power Button: Configuring as keyboard
>[  7046.633] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input2/event2"
>[  7046.633] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[  7046.633] (**) Option "xkb_rules" "evdev"
>[  7046.633] (**) Option "xkb_model" "evdev"
>[  7046.633] (**) Option "xkb_layout" "us"
>[  7046.633] (II) XKB: Reusing cached keymap
>[  7046.634] (II) config/udev: Adding input device Lid Switch (/dev/input/event1)
>[  7046.634] (II) No input driver/identifier specified (ignoring)
>[  7046.634] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP (/dev/input/event12)
>[  7046.634] (II) No input driver/identifier specified (ignoring)
>[  7046.634] (II) config/udev: Adding input device UVC Camera (05ca:183d) (/dev/input/event13)
>[  7046.634] (**) UVC Camera (05ca:183d): Applying InputClass "evdev keyboard catchall"
>[  7046.634] (II) Using input driver 'evdev' for 'UVC Camera (05ca:183d)'
>[  7046.634] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.634] 	Option "XkbRules" "evdev"
>[  7046.634] 	Option "XkbModel" "evdev"
>[  7046.634] 	Option "XkbLayout" "us"
>[  7046.634] 	Option "_source" "server/udev"
>[  7046.634] 	Option "name" "UVC Camera (05ca:183d)"
>[  7046.634] 	Option "path" "/dev/input/event13"
>[  7046.635] 	Option "device" "/dev/input/event13"
>[  7046.635] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.7/usb1/1-2/1-2:1.0/input/input13/event13"
>[  7046.635] 	Option "driver" "evdev"
>[  7046.635] (**) UVC Camera (05ca:183d): always reports core events
>[  7046.635] (**) UVC Camera (05ca:183d): Device: "/dev/input/event13"
>[  7046.635] (--) UVC Camera (05ca:183d): Found keys
>[  7046.635] (II) UVC Camera (05ca:183d): Configuring as keyboard
>[  7046.635] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.7/usb1/1-2/1-2:1.0/input/input13/event13"
>[  7046.635] (II) XINPUT: Adding extended input device "UVC Camera (05ca:183d)" (type: KEYBOARD, id 9)
>[  7046.635] (**) Option "xkb_rules" "evdev"
>[  7046.635] (**) Option "xkb_model" "evdev"
>[  7046.635] (**) Option "xkb_layout" "us"
>[  7046.635] (II) XKB: Reusing cached keymap
>[  7046.635] (II) config/udev: Adding input device HDA Digital PCBeep (/dev/input/event9)
>[  7046.635] (II) No input driver/identifier specified (ignoring)
>[  7046.635] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event10)
>[  7046.635] (II) No input driver/identifier specified (ignoring)
>[  7046.636] (II) config/udev: Adding input device HDA Intel Headphone (/dev/input/event11)
>[  7046.636] (II) No input driver/identifier specified (ignoring)
>[  7046.636] (II) config/udev: Adding input device Logitech Trackball (/dev/input/event14)
>[  7046.636] (**) Logitech Trackball: Applying InputClass "evdev pointer catchall"
>[  7046.636] (II) Using input driver 'evdev' for 'Logitech Trackball'
>[  7046.636] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.636] 	Option "XkbRules" "evdev"
>[  7046.636] 	Option "XkbModel" "evdev"
>[  7046.636] 	Option "XkbLayout" "us"
>[  7046.636] 	Option "_source" "server/udev"
>[  7046.636] 	Option "name" "Logitech Trackball"
>[  7046.636] 	Option "path" "/dev/input/event14"
>[  7046.636] 	Option "device" "/dev/input/event14"
>[  7046.636] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.3/2-2.3:1.0/input/input14/event14"
>[  7046.636] 	Option "driver" "evdev"
>[  7046.636] (**) Logitech Trackball: always reports core events
>[  7046.636] (**) Logitech Trackball: Device: "/dev/input/event14"
>[  7046.636] (--) Logitech Trackball: Found 3 mouse buttons
>[  7046.636] (--) Logitech Trackball: Found scroll wheel(s)
>[  7046.636] (--) Logitech Trackball: Found relative axes
>[  7046.636] (--) Logitech Trackball: Found x and y relative axes
>[  7046.636] (II) Logitech Trackball: Configuring as mouse
>[  7046.636] (II) Logitech Trackball: Adding scrollwheel support
>[  7046.636] (**) Logitech Trackball: YAxisMapping: buttons 4 and 5
>[  7046.636] (**) Logitech Trackball: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[  7046.636] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.3/2-2.3:1.0/input/input14/event14"
>[  7046.636] (II) XINPUT: Adding extended input device "Logitech Trackball" (type: MOUSE, id 10)
>[  7046.636] (II) Logitech Trackball: initialized for relative axes.
>[  7046.636] (**) Logitech Trackball: (accel) keeping acceleration scheme 1
>[  7046.636] (**) Logitech Trackball: (accel) acceleration profile 0
>[  7046.637] (**) Logitech Trackball: (accel) acceleration factor: 2.000
>[  7046.637] (**) Logitech Trackball: (accel) acceleration threshold: 4
>[  7046.637] (II) config/udev: Adding input device Logitech Trackball (/dev/input/mouse3)
>[  7046.637] (II) No input driver/identifier specified (ignoring)
>[  7046.637] (II) config/udev: Adding input device Logitech USB Receiver (/dev/input/event15)
>[  7046.637] (**) Logitech USB Receiver: Applying InputClass "evdev keyboard catchall"
>[  7046.637] (II) Using input driver 'evdev' for 'Logitech USB Receiver'
>[  7046.637] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.637] 	Option "XkbRules" "evdev"
>[  7046.637] 	Option "XkbModel" "evdev"
>[  7046.637] 	Option "XkbLayout" "us"
>[  7046.637] 	Option "_source" "server/udev"
>[  7046.637] 	Option "name" "Logitech USB Receiver"
>[  7046.637] 	Option "path" "/dev/input/event15"
>[  7046.637] 	Option "device" "/dev/input/event15"
>[  7046.637] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.0/input/input15/event15"
>[  7046.637] 	Option "driver" "evdev"
>[  7046.637] (**) Logitech USB Receiver: always reports core events
>[  7046.637] (**) Logitech USB Receiver: Device: "/dev/input/event15"
>[  7046.637] (--) Logitech USB Receiver: Found keys
>[  7046.637] (II) Logitech USB Receiver: Configuring as keyboard
>[  7046.637] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.0/input/input15/event15"
>[  7046.637] (II) XINPUT: Adding extended input device "Logitech USB Receiver" (type: KEYBOARD, id 11)
>[  7046.637] (**) Option "xkb_rules" "evdev"
>[  7046.637] (**) Option "xkb_model" "evdev"
>[  7046.637] (**) Option "xkb_layout" "us"
>[  7046.637] (II) XKB: Reusing cached keymap
>[  7046.638] (II) config/udev: Adding input device Logitech USB Receiver (/dev/input/event16)
>[  7046.638] (**) Logitech USB Receiver: Applying InputClass "evdev pointer catchall"
>[  7046.638] (**) Logitech USB Receiver: Applying InputClass "evdev keyboard catchall"
>[  7046.638] (II) Using input driver 'evdev' for 'Logitech USB Receiver'
>[  7046.638] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.638] 	Option "XkbRules" "evdev"
>[  7046.638] 	Option "XkbModel" "evdev"
>[  7046.638] 	Option "XkbLayout" "us"
>[  7046.638] 	Option "_source" "server/udev"
>[  7046.638] 	Option "name" "Logitech USB Receiver"
>[  7046.638] 	Option "path" "/dev/input/event16"
>[  7046.638] 	Option "device" "/dev/input/event16"
>[  7046.638] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.1/input/input16/event16"
>[  7046.638] 	Option "driver" "evdev"
>[  7046.638] (**) Logitech USB Receiver: always reports core events
>[  7046.638] (**) Logitech USB Receiver: Device: "/dev/input/event16"
>[  7046.638] (--) Logitech USB Receiver: Found 20 mouse buttons
>[  7046.638] (--) Logitech USB Receiver: Found scroll wheel(s)
>[  7046.638] (--) Logitech USB Receiver: Found relative axes
>[  7046.638] (--) Logitech USB Receiver: Found x and y relative axes
>[  7046.638] (--) Logitech USB Receiver: Found absolute axes
>[  7046.638] (--) Logitech USB Receiver: Found keys
>[  7046.638] (II) Logitech USB Receiver: Configuring as mouse
>[  7046.638] (II) Logitech USB Receiver: Configuring as keyboard
>[  7046.638] (II) Logitech USB Receiver: Adding scrollwheel support
>[  7046.638] (**) Logitech USB Receiver: YAxisMapping: buttons 4 and 5
>[  7046.638] (**) Logitech USB Receiver: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[  7046.638] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.1/input/input16/event16"
>[  7046.638] (II) XINPUT: Adding extended input device "Logitech USB Receiver" (type: KEYBOARD, id 12)
>[  7046.638] (**) Option "xkb_rules" "evdev"
>[  7046.638] (**) Option "xkb_model" "evdev"
>[  7046.638] (**) Option "xkb_layout" "us"
>[  7046.638] (II) XKB: Reusing cached keymap
>[  7046.638] (II) Logitech USB Receiver: initialized for relative axes.
>[  7046.638] (WW) Logitech USB Receiver: ignoring absolute axes.
>[  7046.639] (**) Logitech USB Receiver: (accel) keeping acceleration scheme 1
>[  7046.639] (**) Logitech USB Receiver: (accel) acceleration profile 0
>[  7046.639] (**) Logitech USB Receiver: (accel) acceleration factor: 2.000
>[  7046.639] (**) Logitech USB Receiver: (accel) acceleration threshold: 4
>[  7046.639] (II) config/udev: Adding input device Logitech USB Receiver (/dev/input/mouse4)
>[  7046.639] (II) No input driver/identifier specified (ignoring)
>[  7046.639] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event0)
>[  7046.639] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[  7046.639] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[  7046.639] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.639] 	Option "XkbRules" "evdev"
>[  7046.639] 	Option "XkbModel" "evdev"
>[  7046.639] 	Option "XkbLayout" "us"
>[  7046.639] 	Option "_source" "server/udev"
>[  7046.639] 	Option "name" "AT Translated Set 2 keyboard"
>[  7046.639] 	Option "path" "/dev/input/event0"
>[  7046.639] 	Option "device" "/dev/input/event0"
>[  7046.639] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input0/event0"
>[  7046.639] 	Option "driver" "evdev"
>[  7046.639] (**) AT Translated Set 2 keyboard: always reports core events
>[  7046.639] (**) AT Translated Set 2 keyboard: Device: "/dev/input/event0"
>[  7046.639] (--) AT Translated Set 2 keyboard: Found keys
>[  7046.639] (II) AT Translated Set 2 keyboard: Configuring as keyboard
>[  7046.639] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input0/event0"
>[  7046.639] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 13)
>[  7046.639] (**) Option "xkb_rules" "evdev"
>[  7046.639] (**) Option "xkb_model" "evdev"
>[  7046.639] (**) Option "xkb_layout" "us"
>[  7046.639] (II) XKB: Reusing cached keymap
>[  7046.640] (II) config/udev: Adding input device PS/2 Mouse (/dev/input/event7)
>[  7046.640] (**) PS/2 Mouse: Applying InputClass "evdev pointer catchall"
>[  7046.640] (II) Using input driver 'evdev' for 'PS/2 Mouse'
>[  7046.640] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[  7046.640] 	Option "XkbRules" "evdev"
>[  7046.640] 	Option "XkbModel" "evdev"
>[  7046.640] 	Option "XkbLayout" "us"
>[  7046.640] 	Option "_source" "server/udev"
>[  7046.640] 	Option "name" "PS/2 Mouse"
>[  7046.640] 	Option "path" "/dev/input/event7"
>[  7046.640] 	Option "device" "/dev/input/event7"
>[  7046.640] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input7/event7"
>[  7046.640] 	Option "driver" "evdev"
>[  7046.640] (**) PS/2 Mouse: always reports core events
>[  7046.640] (**) PS/2 Mouse: Device: "/dev/input/event7"
>[  7046.640] (--) PS/2 Mouse: Found 3 mouse buttons
>[  7046.640] (--) PS/2 Mouse: Found relative axes
>[  7046.640] (--) PS/2 Mouse: Found x and y relative axes
>[  7046.640] (II) PS/2 Mouse: Configuring as mouse
>[  7046.640] (**) PS/2 Mouse: YAxisMapping: buttons 4 and 5
>[  7046.640] (**) PS/2 Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[  7046.640] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input7/event7"
>[  7046.640] (II) XINPUT: Adding extended input device "PS/2 Mouse" (type: MOUSE, id 14)
>[  7046.640] (II) PS/2 Mouse: initialized for relative axes.
>[  7046.640] (**) PS/2 Mouse: (accel) keeping acceleration scheme 1
>[  7046.640] (**) PS/2 Mouse: (accel) acceleration profile 0
>[  7046.640] (**) PS/2 Mouse: (accel) acceleration factor: 2.000
>[  7046.640] (**) PS/2 Mouse: (accel) acceleration threshold: 4
>[  7046.641] (II) config/udev: Adding input device PS/2 Mouse (/dev/input/mouse1)
>[  7046.641] (II) No input driver/identifier specified (ignoring)
>[  7046.641] (II) config/udev: Adding input device AlpsPS/2 ALPS GlidePoint (/dev/input/event8)
>[  7046.641] (**) AlpsPS/2 ALPS GlidePoint: Applying InputClass "evdev touchpad catchall"
>[  7046.641] (**) AlpsPS/2 ALPS GlidePoint: Applying InputClass "touchpad catchall"
>[  7046.641] (II) LoadModule: "synaptics"
>[  7046.641] (II) Loading /usr/lib/xorg/modules/input/synaptics_drv.so
>[  7046.641] (II) Module synaptics: vendor="X.Org Foundation"
>[  7046.641] 	compiled for 1.11.0, module version = 1.5.0
>[  7046.641] 	Module class: X.Org XInput Driver
>[  7046.641] 	ABI class: X.Org XInput driver, version 13.0
>[  7046.641] (II) Using input driver 'synaptics' for 'AlpsPS/2 ALPS GlidePoint'
>[  7046.641] (II) Loading /usr/lib/xorg/modules/input/synaptics_drv.so
>[  7046.641] 	Option "_source" "server/udev"
>[  7046.641] 	Option "name" "AlpsPS/2 ALPS GlidePoint"
>[  7046.641] 	Option "path" "/dev/input/event8"
>[  7046.641] 	Option "device" "/dev/input/event8"
>[  7046.641] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input8/event8"
>[  7046.641] 	Option "driver" "synaptics"
>[  7046.641] 	Option "TapButton1" "1"
>[  7046.641] 	Option "TapButton2" "2"
>[  7046.641] 	Option "TapButton3" "3"
>[  7046.641] (**) AlpsPS/2 ALPS GlidePoint: always reports core events
>[  7046.641] (**) Option "Device" "/dev/input/event8"
>[  7046.742] (**) Option "Device" "/dev/input/event8"
>[  7046.742] port opened successfully
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: x-axis range 0 - 1023
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: y-axis range 0 - 767
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: pressure range 0 - 127
>[  7046.849] (II) synaptics: AlpsPS/2 ALPS GlidePoint: device does not report finger width.
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: buttons: left right middle
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: Vendor 0x2 Product 0x8
>[  7046.849] (--) synaptics: AlpsPS/2 ALPS GlidePoint: invalid finger width range.  defaulting to 0 - 15
>[  7046.849] (**) Option "TapButton1" "1"
>[  7046.849] (**) Option "TapButton2" "2"
>[  7046.849] (**) Option "TapButton3" "3"
>[  7046.956] (--) synaptics: AlpsPS/2 ALPS GlidePoint: touchpad found
>[  7046.956] (**) AlpsPS/2 ALPS GlidePoint: always reports core events
>[  7047.062] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input8/event8"
>[  7047.062] (II) XINPUT: Adding extended input device "AlpsPS/2 ALPS GlidePoint" (type: TOUCHPAD, id 15)
>[  7047.062] (**) synaptics: AlpsPS/2 ALPS GlidePoint: (accel) MinSpeed is now constant deceleration 2.5
>[  7047.062] (**) synaptics: AlpsPS/2 ALPS GlidePoint: MaxSpeed is now 1.75
>[  7047.062] (**) synaptics: AlpsPS/2 ALPS GlidePoint: AccelFactor is now 0.156
>[  7047.062] (**) AlpsPS/2 ALPS GlidePoint: (accel) keeping acceleration scheme 1
>[  7047.063] (**) AlpsPS/2 ALPS GlidePoint: (accel) acceleration profile 1
>[  7047.063] (**) AlpsPS/2 ALPS GlidePoint: (accel) acceleration factor: 2.000
>[  7047.063] (**) AlpsPS/2 ALPS GlidePoint: (accel) acceleration threshold: 4
>[  7047.063] (**) Option "Device" "/dev/input/event8"
>[  7047.063] (--) synaptics: AlpsPS/2 ALPS GlidePoint: touchpad found
>[  7047.063] (II) config/udev: Adding input device AlpsPS/2 ALPS GlidePoint (/dev/input/mouse2)
>[  7047.063] (II) No input driver/identifier specified (ignoring)
>[  7047.063] (II) config/udev: Adding input device PC Speaker (/dev/input/event4)
>[  7047.063] (II) No input driver/identifier specified (ignoring)
>[  7047.064] (II) config/udev: Adding input device Sony Vaio Jogdial (/dev/input/event6)
>[  7047.064] (II) No input driver/identifier specified (ignoring)
>[  7047.064] (II) config/udev: Adding input device Sony Vaio Jogdial (/dev/input/mouse0)
>[  7047.064] (II) No input driver/identifier specified (ignoring)
>[  7047.067] (II) RADEON(0): RADEONSaveScreen(2)
>[  7048.831] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7048.848] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7048.848] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7048.864] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7048.865] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7048.881] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7048.882] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7048.898] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7048.898] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7048.914] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7048.915] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7048.931] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7048.932] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7048.948] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7048.948] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7048.964] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7048.965] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7048.981] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7048.982] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7048.998] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7048.998] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.014] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.015] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.031] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.032] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.048] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.125] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.131] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.139] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.148] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.149] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.164] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.165] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.181] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.182] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.198] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.199] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.215] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.216] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.231] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.232] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.248] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.249] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.265] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.266] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.281] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.282] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.298] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.299] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.315] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.316] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.331] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.332] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.348] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.349] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.365] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.366] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.381] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.382] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.398] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.399] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.415] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.416] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.431] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.432] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda12c0]
>[  7049.448] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda12c0] width 1600 pitch 6400 (/4 1600)
>[  7049.449] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.468] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.469] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.481] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.482] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.498] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.499] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.515] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.516] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.531] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.532] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.548] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.549] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.565] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.566] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.581] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.582] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.598] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.599] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.615] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.616] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.631] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.632] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.648] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.649] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.665] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.666] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.682] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.682] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.698] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.699] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.762] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.763] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.783] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.798] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.799] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.815] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.816] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.833] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.848] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.849] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.865] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.866] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.882] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.883] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.898] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.899] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.915] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.916] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.932] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.933] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.948] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.949] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.965] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.966] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7049.982] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7049.983] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7049.998] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7049.999] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7050.015] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7050.016] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.033] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd88960]
>[  7050.048] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd88960] width 1600 pitch 6400 (/4 1600)
>[  7050.049] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.065] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.407] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.415] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.560] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.582] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.583] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.617] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.633] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.666] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.682] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.683] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.700] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.717] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.733] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7050.808] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1470]
>[  7050.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1470] width 1600 pitch 6400 (/4 1600)
>[  7050.976] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda4bc0]
>[  7050.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda4bc0] width 1600 pitch 6400 (/4 1600)
>[  7051.042] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1480]
>[  7051.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1480] width 1600 pitch 6400 (/4 1600)
>[  7051.050] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1420]
>[  7051.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1420] width 1600 pitch 6400 (/4 1600)
>[  7051.067] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1480]
>[  7051.083] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1480] width 1600 pitch 6400 (/4 1600)
>[  7051.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1420]
>[  7051.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1420] width 1600 pitch 6400 (/4 1600)
>[  7051.100] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1480]
>[  7051.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1480] width 1600 pitch 6400 (/4 1600)
>[  7051.117] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1420]
>[  7051.133] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1420] width 1600 pitch 6400 (/4 1600)
>[  7051.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1480]
>[  7051.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1480] width 1600 pitch 6400 (/4 1600)
>[  7051.150] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1420]
>[  7051.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1420] width 1600 pitch 6400 (/4 1600)
>[  7051.167] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda1480]
>[  7051.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda1480] width 1600 pitch 6400 (/4 1600)
>[  7053.627] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd54370]
>[  7053.635] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd54370] width 1600 pitch 6400 (/4 1600)
>[  7054.265] (II) RADEON(0): Allocate new frame buffer 1920x1080 stride 1920
>[  7054.265] (II) RADEON(0): VRAM usage limit set to 221119K
>[  7056.061] (II) RADEON(0): EDID vendor "BNQ", prod id 32770
>[  7056.061] (II) RADEON(0): Using EDID range info for horizontal sync
>[  7056.061] (II) RADEON(0): Using EDID range info for vertical refresh
>[  7056.061] (II) RADEON(0): Printing DDC gathered Modelines:
>[  7056.061] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>[  7056.061] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>[  7056.061] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 +hsync -vsync (49.3 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1280x720"x60.0   74.48  1280 1336 1472 1664  720 721 724 746 -hsync +vsync (44.8 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1600x900"x60.0  119.00  1600 1696 1864 2128  900 901 904 932 -hsync +vsync (55.9 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1680x1050"x0.0  119.00  1680 1728 1760 1840  1050 1053 1059 1080 +hsync -vsync (64.7 kHz)
>[  7056.061] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz)
>[  7058.990] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1387c60]
>[  7058.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1387c60] width 1920 pitch 7680 (/4 1920)
>[  7059.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13901e0]
>[  7059.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13901e0] width 1920 pitch 7680 (/4 1920)
>[  7059.067] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x138ead0]
>[  7059.082] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x138ead0] width 1920 pitch 7680 (/4 1920)
>[  7059.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13901e0]
>[  7059.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13901e0] width 1920 pitch 7680 (/4 1920)
>[  7059.382] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13d4170]
>[  7059.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13d4170] width 1920 pitch 7680 (/4 1920)
>[  7059.400] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13d4110]
>[  7059.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13d4110] width 1920 pitch 7680 (/4 1920)
>[  7059.465] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1394180]
>[  7059.498] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1394180] width 1920 pitch 7680 (/4 1920)
>[  7059.989] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13d4170]
>[  7060.036] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13d4170] width 1920 pitch 7680 (/4 1920)
>[  7060.152] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4020]
>[  7060.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4020] width 1920 pitch 7680 (/4 1920)
>[  7060.217] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a45b0]
>[  7060.253] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a45b0] width 1920 pitch 7680 (/4 1920)
>[  7060.376] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a3b70]
>[  7060.405] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a3b70] width 1920 pitch 7680 (/4 1920)
>[  7060.831] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4020]
>[  7060.860] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4020] width 1920 pitch 7680 (/4 1920)
>[  7061.096] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4020]
>[  7061.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4020] width 1920 pitch 7680 (/4 1920)
>[  7061.137] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4020]
>[  7061.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4020] width 1920 pitch 7680 (/4 1920)
>[  7061.867] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7061.982] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7061.984] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7062.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7062.596] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7062.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7062.885] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7062.899] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.172] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.182] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.185] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.218] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.252] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.285] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.319] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.350] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.367] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.384] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.400] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.416] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.433] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.787] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.819] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.852] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.882] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.885] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.918] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.950] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7063.967] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7063.982] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7063.984] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7063.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.000] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7064.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7064.017] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.348] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7064.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7064.369] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.402] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x139cb30]
>[  7064.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x139cb30] width 1920 pitch 7680 (/4 1920)
>[  7064.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.469] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13897b0]
>[  7064.499] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13897b0] width 1920 pitch 7680 (/4 1920)
>[  7064.500] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.517] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13897b0]
>[  7064.532] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13897b0] width 1920 pitch 7680 (/4 1920)
>[  7064.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13897b0]
>[  7064.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13897b0] width 1920 pitch 7680 (/4 1920)
>[  7064.567] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.582] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7064.583] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13897b0]
>[  7064.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13897b0] width 1920 pitch 7680 (/4 1920)
>[  7064.600] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc31d0]
>[  7064.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc31d0] width 1920 pitch 7680 (/4 1920)
>[  7065.153] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13897b0]
>[  7065.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13897b0] width 1920 pitch 7680 (/4 1920)
>[  7065.350] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60b70]
>[  7065.384] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60b70] width 1920 pitch 7680 (/4 1920)
>[  7065.411] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13cd180]
>[  7065.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13cd180] width 1920 pitch 7680 (/4 1920)
>[  7065.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c55f0]
>[  7065.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c55f0] width 1920 pitch 7680 (/4 1920)
>[  7071.531] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c5fa0]
>[  7071.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c5fa0] width 1920 pitch 7680 (/4 1920)
>[  7071.576] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c73e0]
>[  7071.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c73e0] width 1920 pitch 7680 (/4 1920)
>[  7071.607] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c5fa0]
>[  7071.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c5fa0] width 1920 pitch 7680 (/4 1920)
>[  7071.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c73e0]
>[  7071.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c73e0] width 1920 pitch 7680 (/4 1920)
>[  7071.674] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c5fa0]
>[  7071.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c5fa0] width 1920 pitch 7680 (/4 1920)
>[  7071.705] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c73e0]
>[  7071.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c73e0] width 1920 pitch 7680 (/4 1920)
>[  7071.738] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c5fa0]
>[  7071.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c5fa0] width 1920 pitch 7680 (/4 1920)
>[  7071.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c73e0]
>[  7071.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c73e0] width 1920 pitch 7680 (/4 1920)
>[  7072.318] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c5fa0]
>[  7072.332] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c5fa0] width 1920 pitch 7680 (/4 1920)
>[  7072.494] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  7072.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  7072.532] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  7072.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  7072.572] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c6e80]
>[  7072.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c6e80] width 1920 pitch 7680 (/4 1920)
>[  7072.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  7072.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  7072.639] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c6e80]
>[  7072.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c6e80] width 1920 pitch 7680 (/4 1920)
>[  7072.670] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  7072.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  7072.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe68d00]
>[  7072.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe68d00] width 1920 pitch 7680 (/4 1920)
>[  7072.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe69ae0]
>[  7072.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe69ae0] width 1920 pitch 7680 (/4 1920)
>[  7072.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe68d00]
>[  7072.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe68d00] width 1920 pitch 7680 (/4 1920)
>[  7072.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe69ae0]
>[  7072.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe69ae0] width 1920 pitch 7680 (/4 1920)
>[  7072.868] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe68d00]
>[  7072.882] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe68d00] width 1920 pitch 7680 (/4 1920)
>[  7072.940] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe69ae0]
>[  7072.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe69ae0] width 1920 pitch 7680 (/4 1920)
>[  7073.040] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe68d00]
>[  7073.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe68d00] width 1920 pitch 7680 (/4 1920)
>[  7073.145] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe76e70]
>[  7073.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe76e70] width 1920 pitch 7680 (/4 1920)
>[  7073.254] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13b1ac0]
>[  7073.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13b1ac0] width 1920 pitch 7680 (/4 1920)
>[  7073.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a5f60]
>[  7073.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a5f60] width 1920 pitch 7680 (/4 1920)
>[  7073.399] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a5f00]
>[  7073.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a5f00] width 1920 pitch 7680 (/4 1920)
>[  7363.461] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7363.499] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7363.503] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7363.532] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7363.536] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7363.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7363.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7363.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7363.603] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7363.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7363.636] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7363.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7363.669] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7363.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7363.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7363.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7364.252] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7364.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7364.468] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7364.482] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7364.768] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7840]
>[  7364.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7840] width 1920 pitch 7680 (/4 1920)
>[  7367.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7367.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7367.573] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7367.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7367.604] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7367.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7367.635] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7367.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7367.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7367.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7367.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7367.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7367.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7367.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7367.772] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bbb40]
>[  7367.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bbb40] width 1920 pitch 7680 (/4 1920)
>[  7367.880] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7367.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7367.981] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  7367.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  7368.092] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7368.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7368.182] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7368.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7368.283] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7368.299] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7368.383] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7368.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7368.500] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7368.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7368.583] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7368.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7368.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7368.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7368.785] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7368.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7368.886] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7368.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7368.987] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7369.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7369.088] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7369.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7369.189] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d9bc0]
>[  7369.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d9bc0] width 1920 pitch 7680 (/4 1920)
>[  7369.299] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7369.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7369.391] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7369.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7369.492] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7369.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7369.593] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7369.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7369.694] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7369.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7369.794] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b7a90]
>[  7369.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b7a90] width 1920 pitch 7680 (/4 1920)
>[  7369.895] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d9bc0]
>[  7369.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d9bc0] width 1920 pitch 7680 (/4 1920)
>[  7369.996] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7370.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7370.097] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7370.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7370.198] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7370.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7370.298] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7370.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7370.407] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dbdc0]
>[  7370.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dbdc0] width 1920 pitch 7680 (/4 1920)
>[  7370.513] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x128bcf0]
>[  7370.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x128bcf0] width 1920 pitch 7680 (/4 1920)
>[  7370.615] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7370.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7370.716] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bdd10]
>[  7370.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bdd10] width 1920 pitch 7680 (/4 1920)
>[  7370.819] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1301a30]
>[  7370.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1301a30] width 1920 pitch 7680 (/4 1920)
>[  7370.917] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1301350]
>[  7370.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1301350] width 1920 pitch 7680 (/4 1920)
>[  7371.018] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7371.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7371.118] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7371.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7371.219] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7371.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7371.320] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7371.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7371.420] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7371.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7371.527] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7371.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7371.626] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7371.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7371.727] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7371.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7371.827] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7371.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7371.928] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7371.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7372.032] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dd2c0]
>[  7372.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dd2c0] width 1920 pitch 7680 (/4 1920)
>[  7372.136] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7372.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7372.236] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12dd2c0]
>[  7372.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12dd2c0] width 1920 pitch 7680 (/4 1920)
>[  7372.339] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7372.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7372.440] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7372.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7372.541] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7372.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7372.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e9920]
>[  7372.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e9920] width 1920 pitch 7680 (/4 1920)
>[  7372.753] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7372.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7372.857] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7372.882] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7372.958] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7372.982] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.058] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7373.082] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7373.159] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7373.182] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.259] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7373.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.359] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13067b0]
>[  7373.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13067b0] width 1920 pitch 7680 (/4 1920)
>[  7373.473] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7373.499] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.574] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13067b0]
>[  7373.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13067b0] width 1920 pitch 7680 (/4 1920)
>[  7373.674] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7373.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.775] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13067b0]
>[  7373.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13067b0] width 1920 pitch 7680 (/4 1920)
>[  7373.876] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7373.899] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7373.976] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13067b0]
>[  7373.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13067b0] width 1920 pitch 7680 (/4 1920)
>[  7374.076] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13038b0]
>[  7374.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13038b0] width 1920 pitch 7680 (/4 1920)
>[  7374.177] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13067b0]
>[  7374.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13067b0] width 1920 pitch 7680 (/4 1920)
>[  7374.278] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1303240]
>[  7374.299] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1303240] width 1920 pitch 7680 (/4 1920)
>[  7374.378] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1306720]
>[  7374.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1306720] width 1920 pitch 7680 (/4 1920)
>[  7374.479] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7374.499] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7374.579] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1306720]
>[  7374.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1306720] width 1920 pitch 7680 (/4 1920)
>[  7374.680] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7374.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7374.781] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1306720]
>[  7374.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1306720] width 1920 pitch 7680 (/4 1920)
>[  7374.882] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1303240]
>[  7374.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1303240] width 1920 pitch 7680 (/4 1920)
>[  7374.982] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1306720]
>[  7375.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1306720] width 1920 pitch 7680 (/4 1920)
>[  7375.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13014e0]
>[  7375.118] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13014e0] width 1920 pitch 7680 (/4 1920)
>[  7375.186] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1316210]
>[  7375.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1316210] width 1920 pitch 7680 (/4 1920)
>[  7375.286] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1315e10]
>[  7375.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1315e10] width 1920 pitch 7680 (/4 1920)
>[  7375.387] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13025a0]
>[  7375.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13025a0] width 1920 pitch 7680 (/4 1920)
>[  7375.488] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1315e60]
>[  7375.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1315e60] width 1920 pitch 7680 (/4 1920)
>[  7375.588] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13025a0]
>[  7375.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13025a0] width 1920 pitch 7680 (/4 1920)
>[  7375.688] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1315e60]
>[  7375.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1315e60] width 1920 pitch 7680 (/4 1920)
>[  7375.789] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13025a0]
>[  7375.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13025a0] width 1920 pitch 7680 (/4 1920)
>[  7375.890] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1302600]
>[  7375.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1302600] width 1920 pitch 7680 (/4 1920)
>[  7375.990] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12913d0]
>[  7376.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12913d0] width 1920 pitch 7680 (/4 1920)
>[  7376.091] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7376.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7376.192] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7376.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7376.292] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7376.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7376.393] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7376.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7376.494] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7376.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7376.594] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7376.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7376.695] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7376.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7376.796] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7376.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7376.897] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7376.932] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7377.008] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7377.098] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7377.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7377.199] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.232] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7377.300] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7377.332] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7377.400] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7377.501] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.532] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7377.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7377.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7377.702] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7377.803] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7377.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7377.904] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7377.932] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7378.005] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7378.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7378.106] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7378.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7378.207] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7378.232] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7378.308] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7378.332] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7378.408] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7378.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7378.509] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7378.532] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7378.610] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7378.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7378.711] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7378.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7378.812] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7378.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7378.913] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7378.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7379.013] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7379.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7379.114] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7379.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7379.215] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7379.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7379.316] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7379.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7379.416] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7379.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7379.517] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7379.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7379.618] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7379.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7379.719] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7379.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7379.821] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7379.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7379.922] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7379.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7380.022] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7380.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7380.123] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7380.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7380.223] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7380.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7380.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130be90]
>[  7380.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130be90] width 1920 pitch 7680 (/4 1920)
>[  7380.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13065e0]
>[  7380.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13065e0] width 1920 pitch 7680 (/4 1920)
>[  7380.525] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1313030]
>[  7380.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1313030] width 1920 pitch 7680 (/4 1920)
>[  7380.625] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1317c00]
>[  7380.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1317c00] width 1920 pitch 7680 (/4 1920)
>[  7380.726] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13159a0]
>[  7380.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13159a0] width 1920 pitch 7680 (/4 1920)
>[  7380.827] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7380.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7380.928] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7380.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7381.028] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4640]
>[  7381.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4640] width 1920 pitch 7680 (/4 1920)
>[  7381.129] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13197b0]
>[  7381.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13197b0] width 1920 pitch 7680 (/4 1920)
>[  7381.229] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7381.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7381.330] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7381.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7381.430] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7381.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7381.532] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7381.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7381.633] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7381.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7381.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7381.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7381.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7381.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7381.935] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13197b0]
>[  7381.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13197b0] width 1920 pitch 7680 (/4 1920)
>[  7382.036] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4640]
>[  7382.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4640] width 1920 pitch 7680 (/4 1920)
>[  7382.137] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7382.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7382.238] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7382.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7382.338] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4a60]
>[  7382.402] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4a60] width 1920 pitch 7680 (/4 1920)
>[  7382.440] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7382.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7382.541] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f4640]
>[  7382.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f4640] width 1920 pitch 7680 (/4 1920)
>[  7382.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13197b0]
>[  7382.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13197b0] width 1920 pitch 7680 (/4 1920)
>[  7382.742] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1285bd0]
>[  7382.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1285bd0] width 1920 pitch 7680 (/4 1920)
>[  7382.843] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7382.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7382.944] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1285bd0]
>[  7382.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1285bd0] width 1920 pitch 7680 (/4 1920)
>[  7383.046] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7383.082] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7383.146] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1285bd0]
>[  7383.182] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1285bd0] width 1920 pitch 7680 (/4 1920)
>[  7383.247] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7383.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7383.352] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1285bd0]
>[  7383.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1285bd0] width 1920 pitch 7680 (/4 1920)
>[  7383.453] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7383.482] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7383.483] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1285bd0]
>[  7383.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1285bd0] width 1920 pitch 7680 (/4 1920)
>[  7384.999] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13191d0]
>[  7385.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13191d0] width 1920 pitch 7680 (/4 1920)
>[  7385.034] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319050]
>[  7385.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319050] width 1920 pitch 7680 (/4 1920)
>[  7385.067] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13191d0]
>[  7385.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13191d0] width 1920 pitch 7680 (/4 1920)
>[  7385.101] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319050]
>[  7385.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319050] width 1920 pitch 7680 (/4 1920)
>[  7385.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319540]
>[  7385.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319540] width 1920 pitch 7680 (/4 1920)
>[  7385.168] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319050]
>[  7385.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319050] width 1920 pitch 7680 (/4 1920)
>[  7385.201] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7385.232] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7385.234] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319050]
>[  7385.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319050] width 1920 pitch 7680 (/4 1920)
>[  7386.042] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13193e0]
>[  7386.087] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13193e0] width 1920 pitch 7680 (/4 1920)
>[  7386.094] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7386.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7386.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b5560]
>[  7386.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b5560] width 1920 pitch 7680 (/4 1920)
>[  7386.167] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7386.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7386.200] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b5560]
>[  7386.232] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b5560] width 1920 pitch 7680 (/4 1920)
>[  7386.234] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7386.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7386.267] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b5560]
>[  7386.299] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b5560] width 1920 pitch 7680 (/4 1920)
>[  7386.300] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  7386.332] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  7749.828] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f06e0]
>[  7749.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f06e0] width 1920 pitch 7680 (/4 1920)
>[  7759.741] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0a00]
>[  7759.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0a00] width 1920 pitch 7680 (/4 1920)
>[  7880.003] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11712e0]
>[  7880.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11712e0] width 1920 pitch 7680 (/4 1920)
>[  7880.427] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7880.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7881.545] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11712e0]
>[  7881.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11712e0] width 1920 pitch 7680 (/4 1920)
>[  7881.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7881.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7881.603] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11712e0]
>[  7881.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11712e0] width 1920 pitch 7680 (/4 1920)
>[  7881.636] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7881.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7881.669] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11712e0]
>[  7881.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11712e0] width 1920 pitch 7680 (/4 1920)
>[  7881.703] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7881.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7881.736] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11712e0]
>[  7881.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11712e0] width 1920 pitch 7680 (/4 1920)
>[  7883.010] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7883.036] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7883.151] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7883.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7888.586] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7888.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7888.617] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7888.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7888.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7888.682] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7888.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7888.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7888.717] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7888.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7888.751] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7888.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7888.784] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7888.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7888.817] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7888.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7890.463] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7890.502] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7890.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7891.003] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7891.005] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7891.032] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7891.034] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7891.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7891.067] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7891.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7891.100] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7891.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7891.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7891.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7891.167] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7891.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7891.200] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7891.232] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7891.567] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7891.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7892.189] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7892.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7892.217] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7892.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7892.250] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7892.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7892.284] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7892.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7892.317] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7892.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7892.350] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7892.382] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7892.384] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7892.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7892.417] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7892.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7902.093] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7902.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7902.460] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11474a0]
>[  7902.482] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11474a0] width 1920 pitch 7680 (/4 1920)
>[  7906.518] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7906.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7906.570] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7906.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7906.603] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7906.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7906.636] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7906.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7906.669] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7906.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7906.710] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7906.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7907.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7907.486] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7907.587] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7907.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7910.095] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7910.132] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7910.611] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7910.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7912.597] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7912.632] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7912.634] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7912.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7912.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7912.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7912.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7912.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7912.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7912.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7912.768] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7912.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7912.801] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7912.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7912.834] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7912.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7916.824] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7916.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7916.851] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7916.882] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7916.884] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7916.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7916.918] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7916.949] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7916.951] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7916.982] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7916.984] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7917.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7917.018] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7917.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7917.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  7917.083] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  7956.755] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7956.782] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7956.784] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11474a0]
>[  7956.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11474a0] width 1920 pitch 7680 (/4 1920)
>[  7956.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7956.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7956.853] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11474a0]
>[  7956.883] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11474a0] width 1920 pitch 7680 (/4 1920)
>[  7956.886] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7956.962] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7956.964] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11474a0]
>[  7956.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11474a0] width 1920 pitch 7680 (/4 1920)
>[  7957.001] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7957.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7958.985] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7959.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7962.779] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7962.804] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7964.046] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11474a0]
>[  7964.076] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11474a0] width 1920 pitch 7680 (/4 1920)
>[  7964.117] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7964.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7964.151] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7964.182] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7964.184] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7964.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7964.217] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7964.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7964.251] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1141db0]
>[  7964.283] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1141db0] width 1920 pitch 7680 (/4 1920)
>[  7964.321] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7964.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7964.436] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  7964.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  7964.536] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  7964.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  7964.655] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdb00]
>[  7964.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdb00] width 1920 pitch 7680 (/4 1920)
>[  7964.693] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1188d20]
>[  7964.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1188d20] width 1920 pitch 7680 (/4 1920)
>[  7979.806] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9710]
>[  7979.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9710] width 1920 pitch 7680 (/4 1920)
>[  7980.330] GetModeLine - scrn: 0 clock: 148500
>[  7980.330] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  7980.330]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  7980.392] (II) RADEON(0): RADEONSaveScreen(2)
>[  7982.765] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1174020]
>[  7982.800] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1174020] width 1920 pitch 7680 (/4 1920)
>[  7984.451] GetModeLine - scrn: 0 clock: 148500
>[  7984.451] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  7984.451]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  7984.481] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1212590]
>[  7984.482] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1212590] width 1920 pitch 7680 (/4 1920)
>[  7984.558] (II) RADEON(0): RADEONSaveScreen(2)
>[  7986.703] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11d6830]
>[  7986.732] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11d6830] width 1920 pitch 7680 (/4 1920)
>[  8005.350] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11d5770]
>[  8005.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11d5770] width 1920 pitch 7680 (/4 1920)
>[  8006.167] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b6590]
>[  8006.221] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b6590] width 1920 pitch 7680 (/4 1920)
>[  8008.304] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11df670]
>[  8008.332] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11df670] width 1920 pitch 7680 (/4 1920)
>[  8026.387] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8026.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8097.344] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  8097.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  8097.599] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8097.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8097.680] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114d820]
>[  8097.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114d820] width 1920 pitch 7680 (/4 1920)
>[  8097.785] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x113a6c0]
>[  8097.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x113a6c0] width 1920 pitch 7680 (/4 1920)
>[  8098.004] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  8098.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  8098.552] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8098.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8110.293] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  8110.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  8110.383] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8110.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8110.421] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8110.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8110.454] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8110.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8110.484] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8110.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8110.518] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8110.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8110.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8110.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8110.585] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8110.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8110.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  8110.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  8111.152] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8111.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8111.371] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114b1b0]
>[  8111.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114b1b0] width 1920 pitch 7680 (/4 1920)
>[  8111.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  8111.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  8111.486] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114b1b0]
>[  8111.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114b1b0] width 1920 pitch 7680 (/4 1920)
>[  8111.520] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  8111.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  8111.553] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114b1b0]
>[  8111.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114b1b0] width 1920 pitch 7680 (/4 1920)
>[  8111.586] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  8111.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  8111.620] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114b1b0]
>[  8111.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114b1b0] width 1920 pitch 7680 (/4 1920)
>[  8111.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f20c0]
>[  8111.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f20c0] width 1920 pitch 7680 (/4 1920)
>[  8111.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x114b1b0]
>[  8111.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x114b1b0] width 1920 pitch 7680 (/4 1920)
>[  8111.717] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12f1810]
>[  8111.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12f1810] width 1920 pitch 7680 (/4 1920)
>[  8112.270] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8112.299] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8112.485] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8112.516] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8112.517] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8112.549] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8112.550] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8112.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8112.584] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8112.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8112.617] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8112.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8112.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11451f0]
>[  8112.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11451f0] width 1920 pitch 7680 (/4 1920)
>[  8112.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13bc4d0]
>[  8112.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13bc4d0] width 1920 pitch 7680 (/4 1920)
>[  8518.836] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d0b80]
>[  8518.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d0b80] width 1920 pitch 7680 (/4 1920)
>[  8518.870] GetModeLine - scrn: 0 clock: 148500
>[  8518.871] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  8518.871]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  8518.956] (II) RADEON(0): RADEONSaveScreen(2)
>[  8541.072] GetModeLine - scrn: 0 clock: 148500
>[  8541.072] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  8541.072]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  8541.099] (II) RADEON(0): RADEONSaveScreen(2)
>[  8550.886] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11897b0]
>[  8550.899] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11897b0] width 1920 pitch 7680 (/4 1920)
>[  8667.802] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf92db0]
>[  8667.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf92db0] width 1920 pitch 7680 (/4 1920)
>[  8722.610] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  8722.633] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  8863.544] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  8863.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  8863.593] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a8150]
>[  8863.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a8150] width 1920 pitch 7680 (/4 1920)
>[  8863.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bfbe0]
>[  8863.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bfbe0] width 1920 pitch 7680 (/4 1920)
>[  8863.685] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a80f0]
>[  8863.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a80f0] width 1920 pitch 7680 (/4 1920)
>[  8863.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bfbe0]
>[  8863.749] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bfbe0] width 1920 pitch 7680 (/4 1920)
>[  8863.751] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a8140]
>[  8863.783] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a8140] width 1920 pitch 7680 (/4 1920)
>[  8863.784] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bfbe0]
>[  8863.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bfbe0] width 1920 pitch 7680 (/4 1920)
>[  8863.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a8140]
>[  8863.849] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a8140] width 1920 pitch 7680 (/4 1920)
>[  8864.933] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bf960]
>[  8864.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bf960] width 1920 pitch 7680 (/4 1920)
>[  8864.968] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8864.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8865.001] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bf960]
>[  8865.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bf960] width 1920 pitch 7680 (/4 1920)
>[  8865.034] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8865.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8865.068] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bf960]
>[  8865.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bf960] width 1920 pitch 7680 (/4 1920)
>[  8865.101] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8865.133] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8865.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bf960]
>[  8865.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bf960] width 1920 pitch 7680 (/4 1920)
>[  8865.910] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8865.933] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8880.870] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1393cd0]
>[  8880.899] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1393cd0] width 1920 pitch 7680 (/4 1920)
>[  8880.903] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1172840]
>[  8880.933] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1172840] width 1920 pitch 7680 (/4 1920)
>[  8880.935] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1393cd0]
>[  8880.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1393cd0] width 1920 pitch 7680 (/4 1920)
>[  8880.973] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1172840]
>[  8880.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1172840] width 1920 pitch 7680 (/4 1920)
>[  8881.005] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1172840]
>[  8881.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1172840] width 1920 pitch 7680 (/4 1920)
>[  8881.037] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8881.066] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8881.070] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1172840]
>[  8881.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1172840] width 1920 pitch 7680 (/4 1920)
>[  8881.101] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1138420]
>[  8881.133] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1138420] width 1920 pitch 7680 (/4 1920)
>[  8881.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1172840]
>[  8881.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1172840] width 1920 pitch 7680 (/4 1920)
>[  8881.761] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bb0f0]
>[  8881.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bb0f0] width 1920 pitch 7680 (/4 1920)
>[  8881.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.016] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.019] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x118d270]
>[  8882.049] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x118d270] width 1920 pitch 7680 (/4 1920)
>[  8882.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.083] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  8882.118] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.151] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  8882.184] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.218] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.249] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  8882.251] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.283] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.284] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  8882.318] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.349] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  8882.384] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1177030]
>[  8882.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1177030] width 1920 pitch 7680 (/4 1920)
>[  8882.418] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2490]
>[  8882.449] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2490] width 1920 pitch 7680 (/4 1920)
>[  9002.670] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9002.699] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9002.705] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c53d0]
>[  9002.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c53d0] width 1920 pitch 7680 (/4 1920)
>[  9003.907] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c53d0]
>[  9003.933] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c53d0] width 1920 pitch 7680 (/4 1920)
>[  9005.147] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c3ae0]
>[  9005.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c3ae0] width 1920 pitch 7680 (/4 1920)
>[  9005.199] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9005.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9005.301] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c3ae0]
>[  9005.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c3ae0] width 1920 pitch 7680 (/4 1920)
>[  9005.342] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9005.366] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9006.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9006.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9006.344] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a83f0]
>[  9006.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a83f0] width 1920 pitch 7680 (/4 1920)
>[  9006.396] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9006.433] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9006.444] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a83f0]
>[  9006.466] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a83f0] width 1920 pitch 7680 (/4 1920)
>[  9006.707] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9006.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9006.747] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb320]
>[  9006.783] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb320] width 1920 pitch 7680 (/4 1920)
>[  9006.798] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9006.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9006.847] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb320]
>[  9006.883] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb320] width 1920 pitch 7680 (/4 1920)
>[  9012.077] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.099] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.102] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.133] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9012.135] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.169] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.200] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9012.203] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.233] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.236] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9012.269] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.299] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.302] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9012.562] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.599] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.614] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.649] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9012.696] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c0e50]
>[  9012.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c0e50] width 1920 pitch 7680 (/4 1920)
>[  9012.769] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9012.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9014.087] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb320]
>[  9014.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb320] width 1920 pitch 7680 (/4 1920)
>[  9014.236] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cce10]
>[  9014.266] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cce10] width 1920 pitch 7680 (/4 1920)
>[  9015.940] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9015.983] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9016.839] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b35d0]
>[  9016.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b35d0] width 1920 pitch 7680 (/4 1920)
>[  9016.868] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a83f0]
>[  9016.900] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a83f0] width 1920 pitch 7680 (/4 1920)
>[  9016.901] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b35d0]
>[  9016.933] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b35d0] width 1920 pitch 7680 (/4 1920)
>[  9016.934] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9016.966] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9016.968] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b35d0]
>[  9016.999] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b35d0] width 1920 pitch 7680 (/4 1920)
>[  9017.001] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9017.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9017.053] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b35d0]
>[  9017.083] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b35d0] width 1920 pitch 7680 (/4 1920)
>[  9017.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c5100]
>[  9017.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c5100] width 1920 pitch 7680 (/4 1920)
>[  9019.010] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cb000]
>[  9019.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cb000] width 1920 pitch 7680 (/4 1920)
>[  9019.079] GetModeLine - scrn: 0 clock: 148500
>[  9019.079] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  9019.079]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  9019.138] (II) RADEON(0): RADEONSaveScreen(2)
>[  9024.401] GetModeLine - scrn: 0 clock: 148500
>[  9024.401] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  9024.401]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  9024.430] (II) RADEON(0): RADEONSaveScreen(2)
>[  9028.032] GetModeLine - scrn: 0 clock: 148500
>[  9028.032] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[  9028.032]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[  9028.059] (II) RADEON(0): RADEONSaveScreen(2)
>[  9049.774] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1219250]
>[  9049.799] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1219250] width 1920 pitch 7680 (/4 1920)
>[  9480.805] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11a83f0]
>[  9480.835] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11a83f0] width 1920 pitch 7680 (/4 1920)
>[  9482.637] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13160f0]
>[  9482.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13160f0] width 1920 pitch 7680 (/4 1920)
>[  9976.501] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.533] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.600] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.618] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.633] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.634] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.650] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.700] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9976.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1189040]
>[  9976.750] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1189040] width 1920 pitch 7680 (/4 1920)
>[  9976.751] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9976.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9977.319] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4950]
>[  9977.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4950] width 1920 pitch 7680 (/4 1920)
>[  9977.536] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9977.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9977.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4950]
>[  9977.850] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4950] width 1920 pitch 7680 (/4 1920)
>[  9978.143] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9978.166] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9979.616] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13a4950]
>[  9979.633] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13a4950] width 1920 pitch 7680 (/4 1920)
>[  9980.575] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.587] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60e70]
>[  9980.616] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60e70] width 1920 pitch 7680 (/4 1920)
>[  9980.621] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.650] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60e70]
>[  9980.666] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60e70] width 1920 pitch 7680 (/4 1920)
>[  9980.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.685] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60e70]
>[  9980.700] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60e70] width 1920 pitch 7680 (/4 1920)
>[  9980.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.716] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60e70]
>[  9980.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60e70] width 1920 pitch 7680 (/4 1920)
>[  9980.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.750] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.751] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe60e70]
>[  9980.766] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe60e70] width 1920 pitch 7680 (/4 1920)
>[  9980.769] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c6e80]
>[  9980.786] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c6e80] width 1920 pitch 7680 (/4 1920)
>[  9980.788] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7590]
>[  9980.816] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7590] width 1920 pitch 7680 (/4 1920)
>[  9980.821] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9980.850] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9980.855] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7590]
>[  9980.866] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7590] width 1920 pitch 7680 (/4 1920)
>[  9980.897] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7610]
>[  9980.916] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7610] width 1920 pitch 7680 (/4 1920)
>[  9981.011] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13583b0]
>[  9981.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13583b0] width 1920 pitch 7680 (/4 1920)
>[  9981.097] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7590]
>[  9981.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7590] width 1920 pitch 7680 (/4 1920)
>[  9981.198] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12cdcd0]
>[  9981.216] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12cdcd0] width 1920 pitch 7680 (/4 1920)
>[  9981.299] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13c7590]
>[  9981.316] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13c7590] width 1920 pitch 7680 (/4 1920)
>[  9981.399] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11825e0]
>[  9981.416] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11825e0] width 1920 pitch 7680 (/4 1920)
>[  9981.539] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf148c0]
>[  9981.566] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf148c0] width 1920 pitch 7680 (/4 1920)
>[  9981.642] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1303290]
>[  9981.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1303290] width 1920 pitch 7680 (/4 1920)
>[  9981.708] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf148c0]
>[  9981.750] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf148c0] width 1920 pitch 7680 (/4 1920)
>[ 10714.712] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 10714.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 10720.656] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1319010]
>[ 10720.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1319010] width 1920 pitch 7680 (/4 1920)
>[ 10720.688] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe786c0]
>[ 10720.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe786c0] width 1920 pitch 7680 (/4 1920)
>[ 10729.403] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132fd00]
>[ 10729.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132fd00] width 1920 pitch 7680 (/4 1920)
>[ 10752.970] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10752.983] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10753.827] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe786c0]
>[ 10753.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe786c0] width 1920 pitch 7680 (/4 1920)
>[ 10753.868] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10753.900] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10761.077] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10761.100] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10761.645] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c6990]
>[ 10761.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c6990] width 1920 pitch 7680 (/4 1920)
>[ 10761.696] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10761.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10761.805] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c6990]
>[ 10761.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c6990] width 1920 pitch 7680 (/4 1920)
>[ 10762.130] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10762.150] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10762.158] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c6990]
>[ 10762.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c6990] width 1920 pitch 7680 (/4 1920)
>[ 10762.908] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10762.933] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10762.935] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1293500]
>[ 10762.967] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1293500] width 1920 pitch 7680 (/4 1920)
>[ 10763.052] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b9ad0]
>[ 10763.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b9ad0] width 1920 pitch 7680 (/4 1920)
>[ 10788.172] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.200] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.201] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.217] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.218] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.233] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.235] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.250] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.251] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.267] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.268] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.283] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.285] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.300] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.301] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.318] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.335] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.350] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10788.368] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10788.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10788.385] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe795c0]
>[ 10788.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe795c0] width 1920 pitch 7680 (/4 1920)
>[ 10792.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.401] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.418] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.433] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.450] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.467] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.468] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.484] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.500] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.502] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.518] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.533] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.535] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.568] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10792.584] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10792.600] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10792.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a0d40]
>[ 10792.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a0d40] width 1920 pitch 7680 (/4 1920)
>[ 10796.937] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18cc0]
>[ 10796.950] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18cc0] width 1920 pitch 7680 (/4 1920)
>[ 10822.250] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1128990]
>[ 10822.278] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1128990] width 1920 pitch 7680 (/4 1920)
>[ 10823.706] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18cc0]
>[ 10823.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18cc0] width 1920 pitch 7680 (/4 1920)
>[ 10824.011] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1128990]
>[ 10824.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1128990] width 1920 pitch 7680 (/4 1920)
>[ 10824.363] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18cc0]
>[ 10824.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18cc0] width 1920 pitch 7680 (/4 1920)
>[ 10824.503] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10824.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10832.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10832.650] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10912.568] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10912.600] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10912.608] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10912.633] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10912.636] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10912.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10912.673] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10912.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10912.686] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10912.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10912.721] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10912.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10912.739] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10912.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10912.769] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10912.800] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10912.802] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10912.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10912.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10912.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.195] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10913.233] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10913.412] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.433] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.450] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.484] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.500] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.501] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.533] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.568] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.584] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.618] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.650] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.667] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.700] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.750] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.759] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.785] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.800] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.801] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10913.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 10913.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5a110]
>[ 10913.833] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5a110] width 1920 pitch 7680 (/4 1920)
>[ 10913.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf18100]
>[ 10913.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf18100] width 1920 pitch 7680 (/4 1920)
>[ 10921.341] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9650]
>[ 10921.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9650] width 1920 pitch 7680 (/4 1920)
>[ 12159.158] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120fa40]
>[ 12159.184] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120fa40] width 1920 pitch 7680 (/4 1920)
>[ 12159.190] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xef9eb0]
>[ 12159.200] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xef9eb0] width 1920 pitch 7680 (/4 1920)
>[ 12599.733] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12599.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12599.755] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12599.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12599.788] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12599.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12599.821] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12599.851] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12599.855] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12599.884] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12599.888] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12599.917] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12599.921] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12599.951] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12599.953] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12599.984] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12599.986] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12600.017] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12600.526] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12600.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12600.742] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12600.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12601.040] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253b10]
>[ 12601.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253b10] width 1920 pitch 7680 (/4 1920)
>[ 12602.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12602.334] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12602.350] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe72330]
>[ 12602.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe72330] width 1920 pitch 7680 (/4 1920)
>[ 12602.417] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12602.434] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12602.517] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe72330]
>[ 12602.534] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe72330] width 1920 pitch 7680 (/4 1920)
>[ 12602.618] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12602.634] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12602.719] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe72330]
>[ 12602.734] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe72330] width 1920 pitch 7680 (/4 1920)
>[ 12602.820] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12602.834] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12602.920] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124ff00]
>[ 12602.934] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124ff00] width 1920 pitch 7680 (/4 1920)
>[ 12603.029] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124ff00]
>[ 12603.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124ff00] width 1920 pitch 7680 (/4 1920)
>[ 12603.122] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12603.134] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12603.222] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124ff00]
>[ 12603.234] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124ff00] width 1920 pitch 7680 (/4 1920)
>[ 12603.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12603.334] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12603.423] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12603.434] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12603.524] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12603.534] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12603.625] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12603.651] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12603.726] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12603.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12603.827] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12603.884] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12603.927] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12603.951] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12604.028] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12604.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12604.129] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12604.151] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12604.230] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12604.251] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12604.331] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12604.351] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12604.432] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12604.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12604.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12604.551] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12604.634] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12604.651] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12604.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12604.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12604.836] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12604.851] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12604.937] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12604.951] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12605.038] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12605.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12605.139] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12605.151] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12605.240] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12605.251] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12605.340] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12605.351] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12605.441] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12605.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12605.542] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12605.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12605.643] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12605.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12605.744] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12605.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12605.844] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12605.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12605.945] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12605.967] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12606.047] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12606.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12606.153] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12606.167] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12606.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12606.301] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12606.361] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12606.384] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12606.428] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 12606.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 12608.655] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12827d0]
>[ 12608.684] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12827d0] width 1920 pitch 7680 (/4 1920)
>[ 12608.716] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x124c6f0]
>[ 12608.734] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x124c6f0] width 1920 pitch 7680 (/4 1920)
>[ 12647.066] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12bc040]
>[ 12647.084] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12bc040] width 1920 pitch 7680 (/4 1920)
>[ 13512.622] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1084430]
>[ 13512.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1084430] width 1920 pitch 7680 (/4 1920)
>[ 13512.792] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1083c70]
>[ 13512.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1083c70] width 1920 pitch 7680 (/4 1920)
>[ 13513.319] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11ae060]
>[ 13513.351] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11ae060] width 1920 pitch 7680 (/4 1920)
>[ 13513.758] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf2a220]
>[ 13513.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf2a220] width 1920 pitch 7680 (/4 1920)
>[ 13514.043] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 13514.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 13514.844] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1084430]
>[ 13514.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1084430] width 1920 pitch 7680 (/4 1920)
>[ 14929.246] (II) RADEON(0): EDID vendor "BNQ", prod id 32770
>[ 14929.246] (II) RADEON(0): Using hsync ranges from config file
>[ 14929.246] (II) RADEON(0): Using vrefresh ranges from config file
>[ 14929.246] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 14929.246] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 +hsync -vsync (49.3 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1280x720"x60.0   74.48  1280 1336 1472 1664  720 721 724 746 -hsync +vsync (44.8 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1600x900"x60.0  119.00  1600 1696 1864 2128  900 901 904 932 -hsync +vsync (55.9 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1680x1050"x0.0  119.00  1680 1728 1760 1840  1050 1053 1059 1080 +hsync -vsync (64.7 kHz)
>[ 14929.246] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz)
>[ 14939.262] (II) RADEON(0): RADEONSaveScreen(2)
>[ 14939.262] (II) RADEON(0): RADEONSaveScreen(0)
>[ 15351.275] (II) RADEON(0): RADEONSaveScreen(1)
>[ 15357.855] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15357.871] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15357.873] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15357.888] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15357.889] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15357.905] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15357.906] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15357.921] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15357.923] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15357.938] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15357.939] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15357.955] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15357.956] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15357.971] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15357.973] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15357.988] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15357.989] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15358.005] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15358.006] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15358.021] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15358.023] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15358.038] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15358.039] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15358.055] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15358.056] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10860c0]
>[ 15358.071] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10860c0] width 1920 pitch 7680 (/4 1920)
>[ 15359.315] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a9f6c0]
>[ 15359.338] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a9f6c0] width 1920 pitch 7680 (/4 1920)
>[ 15359.344] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85160]
>[ 15359.371] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85160] width 1920 pitch 7680 (/4 1920)
>[ 15359.374] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.388] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.391] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.405] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15359.407] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.421] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.438] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15359.441] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.455] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.471] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15359.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.488] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.489] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.505] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15359.506] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.521] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.523] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.538] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15359.539] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa6210]
>[ 15359.555] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa6210] width 1920 pitch 7680 (/4 1920)
>[ 15359.556] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c0500]
>[ 15359.571] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c0500] width 1920 pitch 7680 (/4 1920)
>[ 15360.059] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85160]
>[ 15360.071] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85160] width 1920 pitch 7680 (/4 1920)
>[ 15362.061] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b2970]
>[ 15362.071] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b2970] width 1920 pitch 7680 (/4 1920)
>[ 15362.073] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.088] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.089] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.105] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.106] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.121] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.123] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.138] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.139] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.155] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.156] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.171] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.173] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.188] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.189] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.206] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.221] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.223] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.238] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.239] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.255] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.256] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.271] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.273] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.288] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.290] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.321] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.338] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.339] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.355] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.356] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.371] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.373] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.388] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.389] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.405] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.406] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10611b0]
>[ 15362.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10611b0] width 1920 pitch 7680 (/4 1920)
>[ 15362.423] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85f00]
>[ 15362.438] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85f00] width 1920 pitch 7680 (/4 1920)
>[ 15362.439] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a85160]
>[ 15362.455] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a85160] width 1920 pitch 7680 (/4 1920)
>[ 15362.529] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd471f0]
>[ 15362.538] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd471f0] width 1920 pitch 7680 (/4 1920)
>[ 15362.568] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x108fe40]
>[ 15362.588] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x108fe40] width 1920 pitch 7680 (/4 1920)
>[ 15375.722] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdaf4f0]
>[ 15375.738] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdaf4f0] width 1920 pitch 7680 (/4 1920)
>[ 15596.058] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa80e0]
>[ 15596.088] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa80e0] width 1920 pitch 7680 (/4 1920)
>[ 15596.094] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd7b2c0]
>[ 15596.105] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd7b2c0] width 1920 pitch 7680 (/4 1920)
>[ 15662.675] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15662.705] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15662.972] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ace810]
>[ 15662.988] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ace810] width 1920 pitch 7680 (/4 1920)
>[ 15676.261] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.271] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.273] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15676.288] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15676.289] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15676.321] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15676.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.338] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.340] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15676.355] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15676.356] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.374] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15676.388] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15676.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.405] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.406] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15676.421] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15676.423] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.438] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.440] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15676.455] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15676.456] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15676.471] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15676.473] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15676.488] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15677.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15677.231] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15677.873] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15677.888] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15677.925] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15677.955] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15677.958] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15677.971] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15677.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15677.988] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15677.991] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15678.005] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15678.006] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15678.021] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15678.026] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15678.055] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15678.056] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15678.071] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15678.073] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15678.088] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15678.090] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15678.105] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15680.555] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15680.571] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15680.677] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aca850]
>[ 15680.688] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aca850] width 1920 pitch 7680 (/4 1920)
>[ 15683.417] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15683.438] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15683.646] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af5730]
>[ 15683.671] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af5730] width 1920 pitch 7680 (/4 1920)
>[ 15697.625] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af46a0]
>[ 15697.638] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af46a0] width 1920 pitch 7680 (/4 1920)
>[ 15705.090] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b401f0]
>[ 15705.105] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b401f0] width 1920 pitch 7680 (/4 1920)
>[ 15705.272] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acb300]
>[ 15705.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acb300] width 1920 pitch 7680 (/4 1920)
>[ 15705.314] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b401f0]
>[ 15705.338] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b401f0] width 1920 pitch 7680 (/4 1920)
>[ 15705.346] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad4ce0]
>[ 15705.371] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad4ce0] width 1920 pitch 7680 (/4 1920)
>[ 15705.582] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a8f340]
>[ 15705.605] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a8f340] width 1920 pitch 7680 (/4 1920)
>[ 15707.136] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aab3c0]
>[ 15707.155] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aab3c0] width 1920 pitch 7680 (/4 1920)
>[ 15707.189] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa3040]
>[ 15707.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa3040] width 1920 pitch 7680 (/4 1920)
>[ 15712.611] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aca850]
>[ 15712.621] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aca850] width 1920 pitch 7680 (/4 1920)
>[ 15899.590] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15899.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15899.674] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15899.705] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15899.710] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15899.738] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15899.753] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aae050]
>[ 15899.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aae050] width 1920 pitch 7680 (/4 1920)
>[ 15899.774] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15899.788] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15899.795] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15899.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15899.850] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15899.855] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15899.867] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15899.888] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15899.889] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15899.905] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15899.914] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15899.938] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15899.941] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15899.955] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15899.959] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aa2e20]
>[ 15900.028] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aa2e20] width 1920 pitch 7680 (/4 1920)
>[ 15900.031] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.055] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.192] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b40310]
>[ 15900.238] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b40310] width 1920 pitch 7680 (/4 1920)
>[ 15900.411] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.438] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.439] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b40310]
>[ 15900.455] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b40310] width 1920 pitch 7680 (/4 1920)
>[ 15900.456] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.473] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b40310]
>[ 15900.488] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b40310] width 1920 pitch 7680 (/4 1920)
>[ 15900.489] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.505] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.506] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b40310]
>[ 15900.538] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b40310] width 1920 pitch 7680 (/4 1920)
>[ 15900.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.555] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.556] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.588] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.589] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.605] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.606] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.622] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.638] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.639] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.655] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.658] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.672] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.688] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.689] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.705] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.708] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.722] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.738] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.750] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.772] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.788] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.791] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.805] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15900.806] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab90c0]
>[ 15900.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab90c0] width 1920 pitch 7680 (/4 1920)
>[ 15900.822] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15900.838] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 15921.059] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12aff60]
>[ 15921.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12aff60] width 1920 pitch 7680 (/4 1920)
>[ 16362.746] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad67d0]
>[ 16362.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad67d0] width 1920 pitch 7680 (/4 1920)
>[ 16394.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b42b60]
>[ 16394.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b42b60] width 1920 pitch 7680 (/4 1920)
>[ 17008.408] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17008.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17008.448] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17008.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17008.477] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17008.505] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17008.510] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17008.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17008.543] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17008.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17008.575] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17008.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17008.591] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17008.605] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17008.608] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17008.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17009.176] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17009.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17009.392] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17009.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17009.693] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17009.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17009.832] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17009.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4e360]
>[ 17014.555] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4e360] width 1920 pitch 7680 (/4 1920)
>[ 17014.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17014.705] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.717] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17014.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17014.743] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17014.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.777] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17014.805] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17014.808] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17014.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.841] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17014.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17014.875] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17014.905] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.908] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17014.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17014.940] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17014.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17014.973] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17014.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17016.600] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17016.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.002] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17017.005] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.015] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17017.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17017.048] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17017.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.082] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17017.105] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17017.114] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17017.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.148] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17017.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17017.179] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17017.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.220] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17017.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17017.760] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17017.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17017.992] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17018.022] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17018.292] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57280]
>[ 17018.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57280] width 1920 pitch 7680 (/4 1920)
>[ 17020.399] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17020.443] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17020.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17020.480] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.505] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17020.508] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17020.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17020.542] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17020.573] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17020.605] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17020.607] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17020.647] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b42b60]
>[ 17020.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b42b60] width 1920 pitch 7680 (/4 1920)
>[ 17020.746] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.755] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17020.847] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b42b60]
>[ 17020.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b42b60] width 1920 pitch 7680 (/4 1920)
>[ 17020.948] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17020.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17021.048] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b54440]
>[ 17021.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b54440] width 1920 pitch 7680 (/4 1920)
>[ 17021.149] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4c810]
>[ 17021.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4c810] width 1920 pitch 7680 (/4 1920)
>[ 17021.250] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b54440]
>[ 17021.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b54440] width 1920 pitch 7680 (/4 1920)
>[ 17021.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4c810]
>[ 17021.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4c810] width 1920 pitch 7680 (/4 1920)
>[ 17021.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b54440]
>[ 17021.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b54440] width 1920 pitch 7680 (/4 1920)
>[ 17021.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4c810]
>[ 17021.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4c810] width 1920 pitch 7680 (/4 1920)
>[ 17021.652] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b54440]
>[ 17021.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b54440] width 1920 pitch 7680 (/4 1920)
>[ 17021.753] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4c810]
>[ 17021.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4c810] width 1920 pitch 7680 (/4 1920)
>[ 17021.854] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b56360]
>[ 17021.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b56360] width 1920 pitch 7680 (/4 1920)
>[ 17021.954] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17021.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17022.055] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b56360]
>[ 17022.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b56360] width 1920 pitch 7680 (/4 1920)
>[ 17022.156] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17022.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17022.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b56360]
>[ 17022.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b56360] width 1920 pitch 7680 (/4 1920)
>[ 17022.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17022.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17022.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17022.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17022.558] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17022.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17022.659] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17022.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17022.780] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adf230]
>[ 17022.805] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adf230] width 1920 pitch 7680 (/4 1920)
>[ 17022.875] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2acccc0]
>[ 17022.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2acccc0] width 1920 pitch 7680 (/4 1920)
>[ 17022.943] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17022.955] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17024.931] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b4de30]
>[ 17024.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b4de30] width 1920 pitch 7680 (/4 1920)
>[ 17075.748] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae8220]
>[ 17075.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae8220] width 1920 pitch 7680 (/4 1920)
>[ 17075.841] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf319a0]
>[ 17075.855] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf319a0] width 1920 pitch 7680 (/4 1920)
>[ 17433.067] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b84340]
>[ 17433.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b84340] width 1920 pitch 7680 (/4 1920)
>[ 17440.142] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17440.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17440.395] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 17440.405] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 17456.811] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13aef60]
>[ 17456.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13aef60] width 1920 pitch 7680 (/4 1920)
>[ 17457.620] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17457.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17457.758] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x116b9b0]
>[ 17457.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x116b9b0] width 1920 pitch 7680 (/4 1920)
>[ 17601.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17601.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17827.513] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x116b9b0]
>[ 17827.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x116b9b0] width 1920 pitch 7680 (/4 1920)
>[ 17838.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b7ca70]
>[ 17838.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b7ca70] width 1920 pitch 7680 (/4 1920)
>[ 17842.633] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17842.655] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17844.315] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aec80]
>[ 17844.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aec80] width 1920 pitch 7680 (/4 1920)
>[ 17854.840] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 17854.855] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 17858.195] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf46eb0]
>[ 17858.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf46eb0] width 1920 pitch 7680 (/4 1920)
>[ 17858.800] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aec80]
>[ 17858.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aec80] width 1920 pitch 7680 (/4 1920)
>[ 17858.832] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf46eb0]
>[ 17858.855] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf46eb0] width 1920 pitch 7680 (/4 1920)
>[ 17858.869] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aec80]
>[ 17858.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aec80] width 1920 pitch 7680 (/4 1920)
>[ 17859.579] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf46eb0]
>[ 17859.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf46eb0] width 1920 pitch 7680 (/4 1920)
>[ 17859.591] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x116b9b0]
>[ 17859.605] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x116b9b0] width 1920 pitch 7680 (/4 1920)
>[ 17859.710] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf46eb0]
>[ 17859.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf46eb0] width 1920 pitch 7680 (/4 1920)
>[ 17885.175] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.190] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.205] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.207] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.223] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.240] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.255] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.274] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.290] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.307] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.324] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.340] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.355] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17885.374] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17885.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17885.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17885.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17888.846] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 17888.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 17890.444] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7c8f0]
>[ 17890.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7c8f0] width 1920 pitch 7680 (/4 1920)
>[ 17890.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17890.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17890.490] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7c8f0]
>[ 17890.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7c8f0] width 1920 pitch 7680 (/4 1920)
>[ 17890.506] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17890.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17890.523] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7c8f0]
>[ 17890.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7c8f0] width 1920 pitch 7680 (/4 1920)
>[ 17890.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 17890.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 17890.557] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7c8f0]
>[ 17890.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7c8f0] width 1920 pitch 7680 (/4 1920)
>[ 17890.573] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b84340]
>[ 17890.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b84340] width 1920 pitch 7680 (/4 1920)
>[ 17890.606] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7c8f0]
>[ 17890.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7c8f0] width 1920 pitch 7680 (/4 1920)
>[ 17890.623] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b84340]
>[ 17890.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b84340] width 1920 pitch 7680 (/4 1920)
>[ 17898.260] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.292] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.340] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.355] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.356] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.373] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.406] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.423] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.460] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.473] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.491] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.505] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.508] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.525] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.541] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.555] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.558] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.574] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.591] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.608] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.625] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.657] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11b4b70]
>[ 17898.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11b4b70] width 1920 pitch 7680 (/4 1920)
>[ 17898.674] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17898.866] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17898.890] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17898.891] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17898.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.109] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf131e0]
>[ 17899.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf131e0] width 1920 pitch 7680 (/4 1920)
>[ 17899.140] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.173] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.206] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf131e0]
>[ 17899.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf131e0] width 1920 pitch 7680 (/4 1920)
>[ 17899.223] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.240] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.273] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.290] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.305] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.306] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.323] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.340] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.356] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.373] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.406] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.423] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.440] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.456] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17899.473] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17899.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17899.490] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 17899.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 17900.373] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af2fc0]
>[ 17900.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af2fc0] width 1920 pitch 7680 (/4 1920)
>[ 17912.359] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b469e0]
>[ 17912.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b469e0] width 1920 pitch 7680 (/4 1920)
>[ 17915.463] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf131e0]
>[ 17915.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf131e0] width 1920 pitch 7680 (/4 1920)
>[ 17917.504] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2af8ca0]
>[ 17917.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2af8ca0] width 1920 pitch 7680 (/4 1920)
>[ 17955.471] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11aeaf0]
>[ 17955.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11aeaf0] width 1920 pitch 7680 (/4 1920)
>[ 17958.490] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 17958.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 18192.392] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b8eb80]
>[ 18192.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b8eb80] width 1920 pitch 7680 (/4 1920)
>[ 18204.902] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 18204.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 18230.903] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fdb00]
>[ 18230.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fdb00] width 1920 pitch 7680 (/4 1920)
>[ 18231.165] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe72330]
>[ 18231.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe72330] width 1920 pitch 7680 (/4 1920)
>[ 18342.983] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 18343.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 18382.428] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1253de0]
>[ 18382.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1253de0] width 1920 pitch 7680 (/4 1920)
>[ 18382.476] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2adecf0]
>[ 18382.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2adecf0] width 1920 pitch 7680 (/4 1920)
>[ 18508.338] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1245f10]
>[ 18508.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1245f10] width 1920 pitch 7680 (/4 1920)
>[ 18510.677] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b84340]
>[ 18510.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b84340] width 1920 pitch 7680 (/4 1920)
>[ 18516.577] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf16880]
>[ 18516.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf16880] width 1920 pitch 7680 (/4 1920)
>[ 18543.303] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18543.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18543.352] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18543.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18543.395] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18543.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18543.429] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18543.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18543.459] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18543.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18543.492] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18543.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18543.527] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18543.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18544.077] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18544.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18544.295] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18544.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18544.593] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18544.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18544.802] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18544.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18544.826] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18544.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18544.863] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18544.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18544.892] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18544.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18544.925] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18544.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18544.958] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18544.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18544.992] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18545.022] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18545.025] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18545.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18545.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18545.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18545.129] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad3610]
>[ 18545.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad3610] width 1920 pitch 7680 (/4 1920)
>[ 18545.235] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18545.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18545.330] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18545.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18545.430] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18545.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18545.531] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18545.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18545.631] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18545.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18545.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18545.757] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18545.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b7c9f0]
>[ 18545.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b7c9f0] width 1920 pitch 7680 (/4 1920)
>[ 18545.935] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18545.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18546.035] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18546.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18546.146] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18546.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18546.247] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18546.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18546.348] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18546.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18546.449] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18546.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18546.550] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18546.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18546.657] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10e65e0]
>[ 18546.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10e65e0] width 1920 pitch 7680 (/4 1920)
>[ 18546.694] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1256c50]
>[ 18546.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1256c50] width 1920 pitch 7680 (/4 1920)
>[ 18547.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18547.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18547.667] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf2c6d0]
>[ 18547.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf2c6d0] width 1920 pitch 7680 (/4 1920)
>[ 18547.738] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18547.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18547.812] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2abc970]
>[ 18547.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2abc970] width 1920 pitch 7680 (/4 1920)
>[ 18547.886] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18547.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18547.930] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6900]
>[ 18547.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6900] width 1920 pitch 7680 (/4 1920)
>[ 18547.980] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18548.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18548.012] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf2c6d0]
>[ 18548.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf2c6d0] width 1920 pitch 7680 (/4 1920)
>[ 18548.041] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18548.074] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18548.079] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126bc30]
>[ 18548.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126bc30] width 1920 pitch 7680 (/4 1920)
>[ 18548.109] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18548.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18548.143] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6900]
>[ 18548.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6900] width 1920 pitch 7680 (/4 1920)
>[ 18548.174] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18548.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18548.207] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6900]
>[ 18548.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6900] width 1920 pitch 7680 (/4 1920)
>[ 18548.241] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18548.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18548.274] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18548.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18548.366] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18548.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18548.468] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf2c6d0]
>[ 18548.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf2c6d0] width 1920 pitch 7680 (/4 1920)
>[ 18548.576] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126bc30]
>[ 18548.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126bc30] width 1920 pitch 7680 (/4 1920)
>[ 18548.676] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58200]
>[ 18548.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58200] width 1920 pitch 7680 (/4 1920)
>[ 18548.777] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b9fa0]
>[ 18548.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b9fa0] width 1920 pitch 7680 (/4 1920)
>[ 18548.877] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18548.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18548.927] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6900]
>[ 18548.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6900] width 1920 pitch 7680 (/4 1920)
>[ 18548.978] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6900]
>[ 18549.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6900] width 1920 pitch 7680 (/4 1920)
>[ 18549.078] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b9e50]
>[ 18549.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b9e50] width 1920 pitch 7680 (/4 1920)
>[ 18549.178] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18549.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18549.278] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18549.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18549.379] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18549.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18549.480] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18549.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18549.586] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2afed60]
>[ 18549.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2afed60] width 1920 pitch 7680 (/4 1920)
>[ 18549.704] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126bc30]
>[ 18549.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126bc30] width 1920 pitch 7680 (/4 1920)
>[ 18549.805] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b9e50]
>[ 18549.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b9e50] width 1920 pitch 7680 (/4 1920)
>[ 18549.905] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126bc30]
>[ 18549.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126bc30] width 1920 pitch 7680 (/4 1920)
>[ 18550.010] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18550.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18550.122] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126b200]
>[ 18550.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126b200] width 1920 pitch 7680 (/4 1920)
>[ 18550.157] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18550.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18550.228] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126b200]
>[ 18550.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126b200] width 1920 pitch 7680 (/4 1920)
>[ 18550.338] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18550.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18550.443] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126b200]
>[ 18550.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126b200] width 1920 pitch 7680 (/4 1920)
>[ 18550.555] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18550.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18550.656] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126b200]
>[ 18550.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126b200] width 1920 pitch 7680 (/4 1920)
>[ 18550.762] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126b250]
>[ 18550.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126b250] width 1920 pitch 7680 (/4 1920)
>[ 18550.857] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57c50]
>[ 18550.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57c50] width 1920 pitch 7680 (/4 1920)
>[ 18550.963] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57c50]
>[ 18550.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57c50] width 1920 pitch 7680 (/4 1920)
>[ 18551.058] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6af0]
>[ 18551.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6af0] width 1920 pitch 7680 (/4 1920)
>[ 18551.160] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57c50]
>[ 18551.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57c50] width 1920 pitch 7680 (/4 1920)
>[ 18551.260] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b57c50]
>[ 18551.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b57c50] width 1920 pitch 7680 (/4 1920)
>[ 18551.361] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18551.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18551.461] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6af0]
>[ 18551.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6af0] width 1920 pitch 7680 (/4 1920)
>[ 18551.562] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18551.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18551.630] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b6af0]
>[ 18551.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b6af0] width 1920 pitch 7680 (/4 1920)
>[ 18551.666] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18551.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18551.764] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x127f8c0]
>[ 18551.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x127f8c0] width 1920 pitch 7680 (/4 1920)
>[ 18551.864] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18551.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18551.965] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18551.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.066] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.166] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.233] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.267] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.331] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.367] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.479] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18552.524] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18552.579] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.682] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.733] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.781] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.833] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.882] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18552.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18552.934] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18552.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18552.983] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.033] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.084] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.133] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.185] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.233] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.285] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.334] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.386] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.487] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270920]
>[ 18553.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270920] width 1920 pitch 7680 (/4 1920)
>[ 18553.588] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.635] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.689] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18553.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18553.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.791] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18553.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18553.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.891] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18553.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18553.935] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18553.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18553.993] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.022] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.035] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.093] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.136] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.194] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.237] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.294] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.395] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.439] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.496] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.539] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.597] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.639] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.698] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.722] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.740] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.798] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.822] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.840] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18554.899] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18554.922] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18554.941] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18554.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.000] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.022] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.042] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.101] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.142] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.202] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.243] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.303] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.343] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.404] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.442] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.505] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.543] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.606] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.643] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.707] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.743] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.808] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.843] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18555.909] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18555.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18555.943] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18555.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.010] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.043] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.110] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.143] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.211] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.243] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.311] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.343] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.412] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.439] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.443] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.513] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.543] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.614] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.643] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.715] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.743] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.816] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.843] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18556.917] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18556.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18556.943] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18556.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.018] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.043] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.119] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.144] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.220] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.243] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.321] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.422] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.522] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.557] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.624] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.657] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.725] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.757] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.825] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.857] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18557.926] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18557.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18557.957] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18557.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.027] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.128] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.157] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.230] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.330] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.431] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.532] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.557] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.633] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.657] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.757] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.857] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18558.936] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18558.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18558.957] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18558.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.036] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.137] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.174] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.238] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.274] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.339] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.374] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.406] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.439] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.540] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.574] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.674] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.742] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.774] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.843] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.874] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18559.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18559.945] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18559.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18559.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.045] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.074] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.146] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.174] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.247] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.274] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.359] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.459] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.493] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.549] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.750] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18560.850] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18560.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18560.950] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18560.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18561.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18561.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18561.150] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18561.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18561.251] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23bb9c0]
>[ 18561.272] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23bb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18575.916] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x126baf0]
>[ 18575.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x126baf0] width 1920 pitch 7680 (/4 1920)
>[ 18576.218] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x133dba0]
>[ 18576.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x133dba0] width 1920 pitch 7680 (/4 1920)
>[ 18576.516] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1280370]
>[ 18576.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1280370] width 1920 pitch 7680 (/4 1920)
>[ 18576.737] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132af70]
>[ 18576.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132af70] width 1920 pitch 7680 (/4 1920)
>[ 18613.075] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b58680]
>[ 18613.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b58680] width 1920 pitch 7680 (/4 1920)
>[ 18615.936] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1241700]
>[ 18615.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1241700] width 1920 pitch 7680 (/4 1920)
>[ 18954.219] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 18954.242] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 18954.268] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 18954.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 18954.325] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 18954.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 18954.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 18954.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 18954.391] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 18954.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 18954.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 18954.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 18954.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 18954.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 18954.491] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 18954.522] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 18954.524] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 18954.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 18954.688] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 18954.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 18954.707] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 18954.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 18954.741] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xed4210]
>[ 18954.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xed4210] width 1920 pitch 7680 (/4 1920)
>[ 18954.774] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1317e50]
>[ 18954.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1317e50] width 1920 pitch 7680 (/4 1920)
>[ 18954.807] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 18954.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 18954.841] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1119600]
>[ 18954.872] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1119600] width 1920 pitch 7680 (/4 1920)
>[ 18954.874] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9780]
>[ 18954.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9780] width 1920 pitch 7680 (/4 1920)
>[ 18962.916] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0af30]
>[ 18962.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0af30] width 1920 pitch 7680 (/4 1920)
>[ 18962.941] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 18962.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 18962.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0af30]
>[ 18963.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0af30] width 1920 pitch 7680 (/4 1920)
>[ 18963.007] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 18963.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 18963.041] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0af30]
>[ 18963.072] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0af30] width 1920 pitch 7680 (/4 1920)
>[ 18963.074] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 18963.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 18963.107] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0af30]
>[ 18963.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0af30] width 1920 pitch 7680 (/4 1920)
>[ 18963.141] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 18963.172] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 18963.174] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0af30]
>[ 18963.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0af30] width 1920 pitch 7680 (/4 1920)
>[ 18964.163] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130ceb0]
>[ 18964.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130ceb0] width 1920 pitch 7680 (/4 1920)
>[ 18964.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0f8b0]
>[ 18964.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0f8b0] width 1920 pitch 7680 (/4 1920)
>[ 18964.224] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 18964.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 18964.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 18964.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 18964.291] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 18964.322] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 18964.324] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 18964.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 18964.402] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 18964.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 18964.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 18964.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 19042.739] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1317e50]
>[ 19042.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1317e50] width 1920 pitch 7680 (/4 1920)
>[ 19042.764] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7e090]
>[ 19042.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7e090] width 1920 pitch 7680 (/4 1920)
>[ 19046.948] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19046.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19046.994] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 19047.022] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 19047.027] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19047.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19047.061] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 19047.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 19047.094] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19047.122] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19047.127] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 19047.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 19047.160] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19047.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19047.204] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 19047.222] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 19047.728] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19047.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19047.959] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0b060]
>[ 19047.972] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0b060] width 1920 pitch 7680 (/4 1920)
>[ 19048.260] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 19048.273] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 19048.440] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 19048.472] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 19048.476] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 19048.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 19048.515] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 19048.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 19048.542] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 19048.572] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 19048.575] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 19048.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 19048.609] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 19048.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 19048.642] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 19048.672] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 19048.675] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 19048.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 19048.708] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 19048.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 19048.741] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1298230]
>[ 19048.772] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1298230] width 1920 pitch 7680 (/4 1920)
>[ 19048.814] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19048.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19048.915] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 19048.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 19049.014] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19049.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19049.115] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 19049.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 19049.216] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19049.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19049.317] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 19049.339] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 19049.422] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19049.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19049.523] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1366d80]
>[ 19049.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1366d80] width 1920 pitch 7680 (/4 1920)
>[ 19049.620] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19049.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19049.720] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1366d80]
>[ 19049.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1366d80] width 1920 pitch 7680 (/4 1920)
>[ 19049.820] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19049.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19049.970] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1119600]
>[ 19050.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1119600] width 1920 pitch 7680 (/4 1920)
>[ 19050.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 19050.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 19050.105] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1119600]
>[ 19050.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1119600] width 1920 pitch 7680 (/4 1920)
>[ 19050.766] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 19050.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 19051.279] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130ceb0]
>[ 19051.311] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130ceb0] width 1920 pitch 7680 (/4 1920)
>[ 19051.404] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a6530]
>[ 19051.422] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a6530] width 1920 pitch 7680 (/4 1920)
>[ 19051.669] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1317e50]
>[ 19051.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1317e50] width 1920 pitch 7680 (/4 1920)
>[ 19083.514] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf186e0]
>[ 19083.539] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf186e0] width 1920 pitch 7680 (/4 1920)
>[ 19085.313] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 19085.372] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 19104.020] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19104.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19104.110] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf186e0]
>[ 19104.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf186e0] width 1920 pitch 7680 (/4 1920)
>[ 19104.157] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 19104.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 19104.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130ceb0]
>[ 19104.223] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130ceb0] width 1920 pitch 7680 (/4 1920)
>[ 19104.224] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 19104.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 19104.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefee00]
>[ 19104.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefee00] width 1920 pitch 7680 (/4 1920)
>[ 19104.332] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 19104.356] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 19104.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7e090]
>[ 19104.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7e090] width 1920 pitch 7680 (/4 1920)
>[ 19104.392] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x123a6a0]
>[ 19104.423] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x123a6a0] width 1920 pitch 7680 (/4 1920)
>[ 19104.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1129260]
>[ 19104.456] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1129260] width 1920 pitch 7680 (/4 1920)
>[ 19104.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aada60]
>[ 19104.489] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aada60] width 1920 pitch 7680 (/4 1920)
>[ 19104.491] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 19104.523] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 19104.524] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1366d80]
>[ 19104.556] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1366d80] width 1920 pitch 7680 (/4 1920)
>[ 19104.559] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1254740]
>[ 19104.589] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1254740] width 1920 pitch 7680 (/4 1920)
>[ 19104.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 19104.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 19104.750] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf7e090]
>[ 19104.773] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf7e090] width 1920 pitch 7680 (/4 1920)
>[ 19106.485] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe77690]
>[ 19106.506] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe77690] width 1920 pitch 7680 (/4 1920)
>[ 19121.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe70ec0]
>[ 19121.625] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe70ec0] width 1920 pitch 7680 (/4 1920)
>[ 19121.849] GetModeLine - scrn: 0 clock: 148500
>[ 19121.849] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 19121.849]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 19121.897] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19123.595] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 19123.622] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 19124.810] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11c1f60]
>[ 19124.845] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11c1f60] width 1920 pitch 7680 (/4 1920)
>[ 19125.057] GetModeLine - scrn: 0 clock: 148500
>[ 19125.057] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 19125.057]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 19125.113] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19126.619] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2add580]
>[ 19126.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2add580] width 1920 pitch 7680 (/4 1920)
>[ 19129.584] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x13318d0]
>[ 19129.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x13318d0] width 1920 pitch 7680 (/4 1920)
>[ 19131.887] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1271110]
>[ 19131.894] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1271110] width 1920 pitch 7680 (/4 1920)
>[ 19131.998] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe616e0]
>[ 19132.023] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe616e0] width 1920 pitch 7680 (/4 1920)
>[ 19133.358] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b82f20]
>[ 19133.389] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b82f20] width 1920 pitch 7680 (/4 1920)
>[ 19134.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe61dc0]
>[ 19134.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe61dc0] width 1920 pitch 7680 (/4 1920)
>[ 19134.915] GetModeLine - scrn: 0 clock: 148500
>[ 19134.915] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 19134.915]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 19135.014] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19135.870] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19135.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19186.878] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19216.886] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19246.917] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19276.945] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19284.132] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19284.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19285.216] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19285.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19306.975] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19337.004] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19367.034] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19397.064] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19427.094] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19457.127] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19487.155] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19517.184] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19520.650] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.673] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.673] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.689] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.690] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.707] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.723] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.723] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.740] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.756] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.757] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.773] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.774] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.789] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.790] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.807] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.823] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.824] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.840] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19520.857] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e4560]
>[ 19520.873] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e4560] width 1920 pitch 7680 (/4 1920)
>[ 19520.874] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19520.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19524.863] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19524.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19524.890] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19524.906] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19524.907] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19524.923] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19524.924] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19524.939] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19524.940] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19524.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19524.957] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19524.973] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19524.974] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19524.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19524.990] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19525.006] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19525.007] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19525.023] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19525.023] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19525.039] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19525.040] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19525.056] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19525.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19525.073] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19525.074] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe61e20]
>[ 19525.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe61e20] width 1920 pitch 7680 (/4 1920)
>[ 19525.090] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132c710]
>[ 19525.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132c710] width 1920 pitch 7680 (/4 1920)
>[ 19526.096] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.106] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.107] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.123] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.124] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.139] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.140] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.156] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.157] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.173] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.173] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.189] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.190] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.206] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.207] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.223] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.223] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.239] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.240] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.256] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.257] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.273] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.273] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.289] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.290] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19526.306] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19526.307] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19526.323] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19542.992] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19543.044] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19545.579] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe73840]
>[ 19545.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe73840] width 1920 pitch 7680 (/4 1920)
>[ 19557.815] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e65b0]
>[ 19557.839] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e65b0] width 1920 pitch 7680 (/4 1920)
>[ 19557.903] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19561.134] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd081c0]
>[ 19561.173] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd081c0] width 1920 pitch 7680 (/4 1920)
>[ 19587.903] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19617.935] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19647.965] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19677.992] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19708.004] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19738.014] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19768.045] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19798.072] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19828.110] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19853.825] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21f90]
>[ 19853.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21f90] width 1920 pitch 7680 (/4 1920)
>[ 19855.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5f330]
>[ 19855.473] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5f330] width 1920 pitch 7680 (/4 1920)
>[ 19856.623] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e25b0]
>[ 19856.656] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e25b0] width 1920 pitch 7680 (/4 1920)
>[ 19856.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19856.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19856.777] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19856.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19856.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x111a790]
>[ 19856.856] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x111a790] width 1920 pitch 7680 (/4 1920)
>[ 19856.859] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19856.889] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19856.892] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x111a790]
>[ 19856.923] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x111a790] width 1920 pitch 7680 (/4 1920)
>[ 19856.926] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19856.956] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19856.959] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x111a790]
>[ 19856.989] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x111a790] width 1920 pitch 7680 (/4 1920)
>[ 19856.992] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19857.023] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19857.544] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x111a790]
>[ 19857.573] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x111a790] width 1920 pitch 7680 (/4 1920)
>[ 19857.768] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19857.806] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19858.062] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x111a790]
>[ 19858.089] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x111a790] width 1920 pitch 7680 (/4 1920)
>[ 19858.495] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19858.523] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19858.535] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21f90]
>[ 19858.573] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21f90] width 1920 pitch 7680 (/4 1920)
>[ 19858.578] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19858.606] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19858.609] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21f90]
>[ 19858.639] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21f90] width 1920 pitch 7680 (/4 1920)
>[ 19858.642] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19858.673] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19858.675] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21f90]
>[ 19858.706] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21f90] width 1920 pitch 7680 (/4 1920)
>[ 19858.709] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1270890]
>[ 19858.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1270890] width 1920 pitch 7680 (/4 1920)
>[ 19858.741] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21f90]
>[ 19858.774] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21f90] width 1920 pitch 7680 (/4 1920)
>[ 19858.784] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b2f0]
>[ 19858.823] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b2f0] width 1920 pitch 7680 (/4 1920)
>[ 19949.065] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5f330]
>[ 19949.073] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5f330] width 1920 pitch 7680 (/4 1920)
>[ 19950.151] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe5f330]
>[ 19950.173] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe5f330] width 1920 pitch 7680 (/4 1920)
>[ 19951.251] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19981.253] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20011.283] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20041.311] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20071.342] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20101.369] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20131.399] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20161.430] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20191.462] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20221.492] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20251.520] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20281.550] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20311.580] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20341.609] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20371.639] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20401.671] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20431.699] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20461.728] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20491.759] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20521.792] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20551.820] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20581.849] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20611.880] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20641.911] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20671.940] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20701.967] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20731.999] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20762.027] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20792.057] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20822.090] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20852.120] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20882.150] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20912.180] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20942.207] (II) RADEON(0): RADEONSaveScreen(2)
>[ 20972.239] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21002.268] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21032.296] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21062.327] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21092.357] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21122.387] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21152.418] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21182.448] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21212.478] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21242.506] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21272.537] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21302.565] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21332.598] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21362.625] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21392.655] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21422.685] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21452.717] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21482.744] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21496.315] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.340] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.341] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.357] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.357] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.373] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.374] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.390] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.391] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.407] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.407] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.423] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.424] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.440] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.441] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.457] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.457] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.473] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.490] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.491] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.507] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.507] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.523] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21496.524] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21496.540] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21496.541] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21496.557] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21499.789] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 21499.807] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 21502.033] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.073] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21502.078] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21502.090] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21502.093] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.107] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21502.107] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21502.123] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21502.124] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.140] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21502.141] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21502.157] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21502.157] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.173] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21502.174] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21502.190] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21502.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.207] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21502.207] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21502.223] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21502.224] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21502.240] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21503.153] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf6b780]
>[ 21503.199] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf6b780] width 1920 pitch 7680 (/4 1920)
>[ 21504.012] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 21504.023] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 21504.263] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 21504.290] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 21504.951] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10c8290]
>[ 21504.973] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10c8290] width 1920 pitch 7680 (/4 1920)
>[ 21508.003] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 21508.023] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 21508.333] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 21508.373] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 21512.754] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21542.794] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21572.821] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21602.852] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21632.883] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21662.913] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21692.922] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21722.964] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21752.992] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21783.023] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21813.054] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21843.081] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21862.460] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 21862.473] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 21864.490] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf30fd0]
>[ 21864.523] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf30fd0] width 1920 pitch 7680 (/4 1920)
>[ 21873.110] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21882.862] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 21882.890] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 21886.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae2940]
>[ 21886.857] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae2940] width 1920 pitch 7680 (/4 1920)
>[ 21887.952] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1307980]
>[ 21887.973] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1307980] width 1920 pitch 7680 (/4 1920)
>[ 21888.053] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10c8290]
>[ 21888.073] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10c8290] width 1920 pitch 7680 (/4 1920)
>[ 21888.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 21888.673] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 21893.355] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x120b350]
>[ 21893.373] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x120b350] width 1920 pitch 7680 (/4 1920)
>[ 21894.389] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe72610]
>[ 21894.407] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe72610] width 1920 pitch 7680 (/4 1920)
>[ 21894.480] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b36350]
>[ 21894.507] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b36350] width 1920 pitch 7680 (/4 1920)
>[ 21903.368] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1308130]
>[ 21903.390] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1308130] width 1920 pitch 7680 (/4 1920)
>[ 21921.946] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c5910]
>[ 21921.973] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c5910] width 1920 pitch 7680 (/4 1920)
>[ 21922.303] GetModeLine - scrn: 0 clock: 148500
>[ 21922.303] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 21922.303]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 21922.362] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21922.515] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 21922.540] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 21952.400] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21982.431] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22012.463] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22042.491] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22072.520] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22102.551] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22132.580] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22162.609] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22192.641] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22222.669] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22252.700] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22282.731] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22312.759] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22342.791] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22372.820] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22402.850] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22432.874] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22462.903] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22492.934] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22522.962] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22552.993] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22583.022] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22613.051] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22643.083] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22673.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22703.143] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22733.171] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22763.201] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22793.233] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22823.263] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22853.292] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22883.322] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22913.353] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22943.381] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22973.411] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23003.429] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23033.458] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23063.490] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23093.517] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23123.548] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23153.579] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23183.609] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23213.638] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23243.667] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23273.699] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23303.728] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23333.756] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23363.790] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23393.819] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23423.847] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23453.877] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23483.907] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23513.937] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23543.970] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23573.999] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23604.028] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23634.059] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23664.087] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23694.117] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23724.147] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23754.176] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23784.206] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23814.239] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23844.266] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23911.983] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.007] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.008] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.024] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.025] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.041] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.041] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.057] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.058] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.074] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.075] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.091] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.092] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.107] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.108] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.124] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.125] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.141] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.141] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.157] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.158] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.174] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.175] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.191] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23912.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089040]
>[ 23912.207] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089040] width 1920 pitch 7680 (/4 1920)
>[ 23912.208] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23912.224] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.213] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.224] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.225] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.241] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.241] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.257] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.258] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.274] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.275] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.291] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.291] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.307] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.308] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.324] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.325] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.341] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.341] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.357] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.358] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.374] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.375] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.391] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.391] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.407] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 23916.408] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xefeb70]
>[ 23916.424] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xefeb70] width 1920 pitch 7680 (/4 1920)
>[ 23916.425] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10ccb30]
>[ 23916.441] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10ccb30] width 1920 pitch 7680 (/4 1920)
>[ 24472.982] (II) RADEON(0): EDID vendor "BNQ", prod id 32770
>[ 24472.982] (II) RADEON(0): Using hsync ranges from config file
>[ 24472.982] (II) RADEON(0): Using vrefresh ranges from config file
>[ 24472.982] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24472.982] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 +hsync -vsync (49.3 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1280x720"x60.0   74.48  1280 1336 1472 1664  720 721 724 746 -hsync +vsync (44.8 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1600x900"x60.0  119.00  1600 1696 1864 2128  900 901 904 932 -hsync +vsync (55.9 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1680x1050"x0.0  119.00  1680 1728 1760 1840  1050 1053 1059 1080 +hsync -vsync (64.7 kHz)
>[ 24472.982] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz)
>[ 24483.256] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24483.256] (II) RADEON(0): RADEONSaveScreen(0)
>[ 24804.216] (II) RADEON(0): RADEONSaveScreen(1)
>[ 24816.604] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.614] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.614] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.630] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.631] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.647] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.648] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.664] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.665] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.680] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.681] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.697] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.698] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.714] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.715] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.730] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.731] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.747] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.748] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.764] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.765] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.780] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.781] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.797] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.798] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.814] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24816.815] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24816.830] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24816.831] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24816.847] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24819.288] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24820.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24820.847] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24820.848] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24820.907] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24820.908] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24820.930] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24820.931] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24820.947] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24820.948] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24820.964] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24820.965] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24820.980] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24820.981] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24820.997] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24820.998] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24821.014] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24821.015] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24821.030] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24821.031] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24821.047] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24821.048] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24821.064] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.400] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.414] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.418] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.430] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.439] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.464] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.468] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.480] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.485] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.497] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.498] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.514] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.515] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.530] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.532] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.547] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.549] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.564] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.565] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.580] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.581] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24822.597] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24822.598] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24822.614] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24822.615] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24822.630] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24823.685] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.714] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.730] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.733] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.747] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.753] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.764] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.780] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.784] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.797] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.800] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.814] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.817] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.830] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.832] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.847] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.850] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.864] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.867] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.880] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.885] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.914] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24823.917] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23c22d0]
>[ 24823.930] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23c22d0] width 1920 pitch 7680 (/4 1920)
>[ 24823.932] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 24823.947] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 24824.122] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.147] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.341] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.364] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.365] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.380] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.381] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.397] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.398] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.414] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.415] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.430] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.431] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.447] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.448] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.464] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.465] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.480] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.481] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.497] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.498] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.514] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.514] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.530] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.531] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.547] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.548] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.564] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.565] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.580] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.581] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.597] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.598] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b90a70]
>[ 24824.614] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b90a70] width 1920 pitch 7680 (/4 1920)
>[ 24824.615] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.630] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.631] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24824.647] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24824.648] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.664] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.664] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24824.680] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24824.681] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.697] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.698] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24824.714] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24824.714] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.730] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24824.731] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe62c40]
>[ 24824.747] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe62c40] width 1920 pitch 7680 (/4 1920)
>[ 24824.748] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 24824.764] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 24849.287] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24879.315] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24909.345] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24939.376] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24969.408] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24999.436] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25029.465] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25059.496] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25089.527] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25119.556] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25149.585] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25179.615] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25209.645] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25239.675] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25269.705] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25299.735] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25329.765] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25359.796] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25389.823] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25419.855] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25449.884] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25465.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x10c8290]
>[ 25465.497] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x10c8290] width 1920 pitch 7680 (/4 1920)
>[ 25466.646] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 25466.681] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 25488.328] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1129260]
>[ 25488.347] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1129260] width 1920 pitch 7680 (/4 1920)
>[ 25490.978] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1230f20]
>[ 25490.997] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1230f20] width 1920 pitch 7680 (/4 1920)
>[ 25494.928] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe6ff30]
>[ 25494.947] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe6ff30] width 1920 pitch 7680 (/4 1920)
>[ 25514.673] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e2550]
>[ 25514.681] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e2550] width 1920 pitch 7680 (/4 1920)
>[ 25514.770] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1089280]
>[ 25514.791] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1089280] width 1920 pitch 7680 (/4 1920)
>[ 25517.461] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0f8b0]
>[ 25517.481] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0f8b0] width 1920 pitch 7680 (/4 1920)
>[ 25517.815] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ab6ee0]
>[ 25517.831] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ab6ee0] width 1920 pitch 7680 (/4 1920)
>[ 25518.128] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11d2a40]
>[ 25518.147] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11d2a40] width 1920 pitch 7680 (/4 1920)
>[ 25518.511] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e0e0]
>[ 25518.531] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25518.672] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aada60]
>[ 25518.697] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aada60] width 1920 pitch 7680 (/4 1920)
>[ 25520.087] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x123a6a0]
>[ 25520.114] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x123a6a0] width 1920 pitch 7680 (/4 1920)
>[ 25522.992] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.014] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.028] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.047] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.060] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.081] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.095] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.114] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.119] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.147] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.164] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.197] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.537] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.564] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.597] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.603] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.631] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.636] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.664] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.667] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.697] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.700] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.731] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.733] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25523.764] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25523.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12b0ab0]
>[ 25523.810] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12b0ab0] width 1920 pitch 7680 (/4 1920)
>[ 25523.813] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 25523.831] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 25524.349] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d42d0]
>[ 25524.364] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d42d0] width 1920 pitch 7680 (/4 1920)
>[ 25524.566] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1254740]
>[ 25524.581] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1254740] width 1920 pitch 7680 (/4 1920)
>[ 25524.866] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d42d0]
>[ 25524.881] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d42d0] width 1920 pitch 7680 (/4 1920)
>[ 25569.112] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 25569.131] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 25569.337] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2add580]
>[ 25569.347] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2add580] width 1920 pitch 7680 (/4 1920)
>[ 25569.863] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad53f0]
>[ 25569.897] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad53f0] width 1920 pitch 7680 (/4 1920)
>[ 25573.056] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf2a220]
>[ 25573.081] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf2a220] width 1920 pitch 7680 (/4 1920)
>[ 25573.115] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23a95a0]
>[ 25573.131] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23a95a0] width 1920 pitch 7680 (/4 1920)
>[ 25573.339] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 25573.364] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 25573.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1254740]
>[ 25573.697] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1254740] width 1920 pitch 7680 (/4 1920)
>[ 25574.219] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf03b60]
>[ 25574.264] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf03b60] width 1920 pitch 7680 (/4 1920)
>[ 25575.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12c5f00]
>[ 25575.598] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12c5f00] width 1920 pitch 7680 (/4 1920)
>[ 25576.004] GetModeLine - scrn: 0 clock: 148500
>[ 25576.004] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 25576.004]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 25576.041] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf21df0]
>[ 25576.055] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25576.097] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf21df0] width 1920 pitch 7680 (/4 1920)
>[ 25606.086] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25636.119] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25666.146] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25696.178] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25726.200] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25756.226] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25786.255] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25816.287] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25846.316] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25876.345] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25906.377] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25936.406] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25966.439] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25996.468] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26026.498] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26056.527] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26086.556] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26116.586] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26146.617] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26176.645] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26206.675] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26236.706] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26266.735] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26296.769] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26326.798] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26356.825] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26386.856] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26416.886] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26446.916] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26476.944] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26506.975] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26537.004] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26567.035] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26597.066] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26627.095] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26657.125] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26687.153] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26717.184] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26747.214] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26777.243] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26807.272] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26837.303] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26867.335] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26897.365] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26927.393] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26957.423] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26987.429] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27017.458] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27047.487] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27077.512] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27107.546] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27137.573] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27167.602] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27197.635] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27227.662] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27257.693] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27287.722] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27317.753] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27347.783] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27377.812] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27407.842] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27437.871] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27467.905] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27497.934] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27527.964] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27557.992] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27588.023] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27618.054] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27648.083] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27678.112] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27708.142] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27738.175] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27768.203] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27798.232] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27828.263] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27858.292] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27888.319] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27918.351] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27948.383] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27978.411] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28008.443] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28036.476] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x104bec0]
>[ 28036.498] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x104bec0] width 1920 pitch 7680 (/4 1920)
>[ 28038.470] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28040.109] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x104be40]
>[ 28040.165] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x104be40] width 1920 pitch 7680 (/4 1920)
>[ 28068.500] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28098.530] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28128.561] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28158.590] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28175.431] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x104bec0]
>[ 28175.432] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x104bec0] width 1920 pitch 7680 (/4 1920)
>[ 28177.094] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf6b780]
>[ 28177.098] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf6b780] width 1920 pitch 7680 (/4 1920)
>[ 28181.177] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xda6be0]
>[ 28181.198] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xda6be0] width 1920 pitch 7680 (/4 1920)
>[ 28184.152] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9780]
>[ 28184.181] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9780] width 1920 pitch 7680 (/4 1920)
>[ 28184.230] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 28184.248] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 28184.491] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x132baa0]
>[ 28184.531] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x132baa0] width 1920 pitch 7680 (/4 1920)
>[ 28186.766] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe6ad90]
>[ 28186.798] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe6ad90] width 1920 pitch 7680 (/4 1920)
>[ 28187.761] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x130ceb0]
>[ 28187.781] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x130ceb0] width 1920 pitch 7680 (/4 1920)
>[ 28187.837] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b82f20]
>[ 28187.848] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b82f20] width 1920 pitch 7680 (/4 1920)
>[ 28188.275] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aada60]
>[ 28188.315] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aada60] width 1920 pitch 7680 (/4 1920)
>[ 28194.288] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x125d650]
>[ 28194.315] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x125d650] width 1920 pitch 7680 (/4 1920)
>[ 28195.597] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 28195.615] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 28195.667] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12042d0]
>[ 28195.681] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12042d0] width 1920 pitch 7680 (/4 1920)
>[ 28197.191] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11686f0]
>[ 28197.215] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11686f0] width 1920 pitch 7680 (/4 1920)
>[ 28198.549] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x103c5a0]
>[ 28198.565] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x103c5a0] width 1920 pitch 7680 (/4 1920)
>[ 28198.770] GetModeLine - scrn: 0 clock: 148500
>[ 28198.770] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 28198.770]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 28198.862] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28199.848] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e1d40]
>[ 28199.881] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e1d40] width 1920 pitch 7680 (/4 1920)
>[ 28228.929] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28258.956] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28288.989] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28319.017] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28349.048] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28379.063] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28409.090] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28439.124] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28469.154] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28499.185] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28529.212] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28559.245] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28589.271] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28619.304] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28649.333] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28679.351] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28709.381] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28739.412] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28769.439] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28799.468] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28829.498] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28859.527] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28889.559] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28919.590] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28949.620] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28979.649] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29009.681] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29039.707] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29069.742] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29099.769] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29129.796] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29159.827] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29189.857] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29219.888] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29249.918] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29279.950] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29309.979] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29340.008] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29636.040] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29666.088] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29696.119] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29726.149] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29756.179] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29786.209] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29816.236] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29846.266] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29876.297] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29906.326] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29936.358] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29966.387] (II) RADEON(0): RADEONSaveScreen(2)
>[ 29996.418] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30026.449] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30056.478] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30086.507] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30116.535] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30174.998] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30205.030] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30235.064] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30265.091] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30295.121] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30325.150] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30355.181] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30385.213] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30415.240] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30445.272] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30475.304] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30505.334] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30535.361] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30565.391] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30595.420] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30625.449] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30655.481] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30685.509] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30715.513] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30745.545] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30775.577] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30805.606] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30835.635] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30865.666] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30895.693] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30925.724] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30955.753] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30985.785] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31015.816] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31053.985] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31084.031] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31114.062] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31120.138] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe6ce00]
>[ 31120.188] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe6ce00] width 1920 pitch 7680 (/4 1920)
>[ 31121.807] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1254740]
>[ 31121.832] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1254740] width 1920 pitch 7680 (/4 1920)
>[ 31133.263] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1241930]
>[ 31133.282] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1241930] width 1920 pitch 7680 (/4 1920)
>[ 31134.120] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0eaa0]
>[ 31134.149] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0eaa0] width 1920 pitch 7680 (/4 1920)
>[ 31134.153] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1052ed0]
>[ 31134.182] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1052ed0] width 1920 pitch 7680 (/4 1920)
>[ 31135.378] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0f8b0]
>[ 31135.399] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0f8b0] width 1920 pitch 7680 (/4 1920)
>[ 31136.556] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x122e1d0]
>[ 31136.582] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x122e1d0] width 1920 pitch 7680 (/4 1920)
>[ 31136.862] GetModeLine - scrn: 0 clock: 148500
>[ 31136.862] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 31136.862]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 31136.902] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31137.090] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1271200]
>[ 31137.116] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1271200] width 1920 pitch 7680 (/4 1920)
>[ 31166.960] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31196.990] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31227.019] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31257.051] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31287.076] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31317.079] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31347.109] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31377.137] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31845.668] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31875.698] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31905.726] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31935.755] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31965.784] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31995.818] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32025.846] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32055.876] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32085.905] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32115.934] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32145.965] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32175.997] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32206.025] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32236.056] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32266.086] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32296.113] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32326.143] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32356.174] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32386.205] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32416.235] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32446.262] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32476.294] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32506.324] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32536.358] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32566.382] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32596.416] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32626.443] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32656.475] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32686.503] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32716.532] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32746.566] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32776.593] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32806.622] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32836.652] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32866.681] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32896.714] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32926.742] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32956.773] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32986.805] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33002.692] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf909b0]
>[ 33002.739] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf909b0] width 1920 pitch 7680 (/4 1920)
>[ 33004.977] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1135340]
>[ 33005.000] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1135340] width 1920 pitch 7680 (/4 1920)
>[ 33005.314] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d22e0]
>[ 33005.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d22e0] width 1920 pitch 7680 (/4 1920)
>[ 33005.707] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d22e0]
>[ 33005.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d22e0] width 1920 pitch 7680 (/4 1920)
>[ 33007.529] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12713d0]
>[ 33007.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12713d0] width 1920 pitch 7680 (/4 1920)
>[ 33020.705] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1271200]
>[ 33020.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1271200] width 1920 pitch 7680 (/4 1920)
>[ 33020.890] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1051b80]
>[ 33020.900] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1051b80] width 1920 pitch 7680 (/4 1920)
>[ 33021.057] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1051b80]
>[ 33021.083] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1051b80] width 1920 pitch 7680 (/4 1920)
>[ 33021.360] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bb410]
>[ 33021.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bb410] width 1920 pitch 7680 (/4 1920)
>[ 33021.679] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1051b80]
>[ 33021.700] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1051b80] width 1920 pitch 7680 (/4 1920)
>[ 33022.519] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11bb410]
>[ 33022.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11bb410] width 1920 pitch 7680 (/4 1920)
>[ 33023.232] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33053.269] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33083.299] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33113.328] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33143.358] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33173.388] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33203.419] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33233.449] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33263.477] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33293.509] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33323.537] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33353.567] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33383.599] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33413.628] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33443.657] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33473.687] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33503.718] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33533.749] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33563.779] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33593.805] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33623.838] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33653.866] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33683.897] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33713.924] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33743.955] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33773.985] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33804.015] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33834.048] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33864.076] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33894.107] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33924.135] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33954.165] (II) RADEON(0): RADEONSaveScreen(2)
>[ 33984.193] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34014.223] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34044.255] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34074.286] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34104.315] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34134.345] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34164.373] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34194.405] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34216.798] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1051b80]
>[ 34216.841] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1051b80] width 1920 pitch 7680 (/4 1920)
>[ 34219.698] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd7cf20]
>[ 34219.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd7cf20] width 1920 pitch 7680 (/4 1920)
>[ 34220.970] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11686f0]
>[ 34221.000] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11686f0] width 1920 pitch 7680 (/4 1920)
>[ 34221.170] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2add580]
>[ 34221.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2add580] width 1920 pitch 7680 (/4 1920)
>[ 34221.322] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae26b0]
>[ 34221.350] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae26b0] width 1920 pitch 7680 (/4 1920)
>[ 34221.858] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11d2a40]
>[ 34221.883] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11d2a40] width 1920 pitch 7680 (/4 1920)
>[ 34221.951] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d9000]
>[ 34221.967] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d9000] width 1920 pitch 7680 (/4 1920)
>[ 34225.882] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11686f0]
>[ 34225.900] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11686f0] width 1920 pitch 7680 (/4 1920)
>[ 34226.757] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf6b780]
>[ 34226.786] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf6b780] width 1920 pitch 7680 (/4 1920)
>[ 34226.848] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 34226.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 34227.881] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1254740]
>[ 34227.900] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1254740] width 1920 pitch 7680 (/4 1920)
>[ 34229.007] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd7b220]
>[ 34229.033] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd7b220] width 1920 pitch 7680 (/4 1920)
>[ 34229.248] GetModeLine - scrn: 0 clock: 148500
>[ 34229.248] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 34229.248]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 34229.304] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34230.098] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fe8b0]
>[ 34230.133] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fe8b0] width 1920 pitch 7680 (/4 1920)
>[ 34259.334] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34289.361] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34319.394] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34349.403] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34379.433] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34409.462] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34439.492] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34469.522] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34569.167] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.183] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.184] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.200] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.201] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.217] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.217] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.233] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.234] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.250] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.251] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.267] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.268] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.283] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.284] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.300] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.301] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.317] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.333] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.334] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.350] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34569.368] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34569.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34569.384] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34569.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.390] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.401] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.417] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.433] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.434] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.450] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.467] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.467] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.484] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.500] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.501] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.517] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.533] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.567] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34573.584] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34573.600] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34573.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 34573.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 34747.696] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34777.745] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34807.775] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34837.805] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34860.338] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.350] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.351] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.368] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.383] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.384] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.400] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.401] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.418] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.433] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.434] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.450] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.451] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.467] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.468] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.483] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.484] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.500] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.501] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.518] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.533] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34860.534] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34860.550] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34860.551] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34860.614] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.557] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.583] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.586] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.600] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.601] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.617] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.633] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.634] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.650] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.651] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.683] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.684] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.700] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.701] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.733] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.734] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.750] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34864.752] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 34864.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 34864.767] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf301e0]
>[ 34864.783] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf301e0] width 1920 pitch 7680 (/4 1920)
>[ 34867.837] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34897.865] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34927.897] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34957.926] (II) RADEON(0): RADEONSaveScreen(2)
>[ 34987.954] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35017.985] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35048.015] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35078.046] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35108.075] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35138.105] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35168.133] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35198.164] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35228.194] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35258.223] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35288.254] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35318.282] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35348.314] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35378.341] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35408.374] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35438.404] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35468.434] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35498.463] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35528.493] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35558.518] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35588.547] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35618.577] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35648.607] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35678.637] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35708.671] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35738.699] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35768.730] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35798.759] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35828.787] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35858.816] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35888.848] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35918.876] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35948.894] (II) RADEON(0): RADEONSaveScreen(2)
>[ 35978.902] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36008.931] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36038.962] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36068.992] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36099.024] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36129.051] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36159.085] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36189.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36219.141] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36249.173] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36279.204] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36309.231] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36339.263] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36369.292] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36399.321] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36429.353] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36459.380] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36472.004] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.017] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.024] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.034] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.035] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.068] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.084] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.085] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.101] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.102] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.117] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.118] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.134] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.135] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.151] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.152] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.167] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.168] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.184] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.186] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.201] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.201] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.217] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36472.218] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36472.234] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36472.235] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36472.251] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36473.434] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36473.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36477.653] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.668] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.684] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.685] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.701] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.702] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.734] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.735] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.751] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.768] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.785] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.801] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.801] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.818] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.834] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36477.835] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36477.851] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36477.851] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36477.867] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36493.264] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36496.566] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36496.584] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36499.720] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36499.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36499.756] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36499.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36499.791] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36499.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36499.823] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36499.851] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36499.855] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36499.884] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36499.888] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36499.917] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36499.921] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36499.951] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36499.952] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36499.984] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36499.986] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36500.017] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36500.474] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.501] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.502] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.534] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36500.541] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.571] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.601] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36500.604] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.634] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.641] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36500.671] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.701] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.709] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.734] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36500.738] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.771] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.801] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36500.804] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36500.834] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36500.906] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36500.934] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36501.016] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e1860]
>[ 36501.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e1860] width 1920 pitch 7680 (/4 1920)
>[ 36501.296] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36501.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36501.387] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e1860]
>[ 36501.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e1860] width 1920 pitch 7680 (/4 1920)
>[ 36501.799] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fe8b0]
>[ 36501.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fe8b0] width 1920 pitch 7680 (/4 1920)
>[ 36502.297] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.301] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.311] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36502.334] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36502.338] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fe8b0]
>[ 36502.367] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fe8b0] width 1920 pitch 7680 (/4 1920)
>[ 36502.369] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36502.401] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36502.402] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fe8b0]
>[ 36502.434] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fe8b0] width 1920 pitch 7680 (/4 1920)
>[ 36502.435] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36502.467] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36502.469] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12fe8b0]
>[ 36502.501] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12fe8b0] width 1920 pitch 7680 (/4 1920)
>[ 36502.502] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.534] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.535] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36502.551] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36502.552] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.567] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36502.584] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36502.585] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.601] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.602] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36502.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36502.619] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.634] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.635] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36502.651] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36502.652] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36502.667] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36502.869] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e1860]
>[ 36502.901] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e1860] width 1920 pitch 7680 (/4 1920)
>[ 36502.908] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36502.934] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36503.664] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36503.684] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36504.051] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36504.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.234] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.251] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.256] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.284] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.286] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.319] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.351] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.352] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.384] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.385] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.419] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.452] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.484] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.485] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.519] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.551] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.552] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.584] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.585] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x102e730]
>[ 36505.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x102e730] width 1920 pitch 7680 (/4 1920)
>[ 36505.619] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.651] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.652] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36505.684] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36505.685] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36505.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36505.740] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36505.767] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36505.898] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36505.917] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36795.219] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 36795.253] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 36795.941] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36806.300] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36806.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36806.319] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36806.351] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36806.352] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36806.384] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36806.386] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36806.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36806.419] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36806.451] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36806.452] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36806.484] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36806.486] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36806.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36806.519] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x112b440]
>[ 36806.551] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x112b440] width 1920 pitch 7680 (/4 1920)
>[ 36806.552] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf008c0]
>[ 36806.584] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf008c0] width 1920 pitch 7680 (/4 1920)
>[ 36810.272] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36810.301] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36810.533] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b0490]
>[ 36810.551] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b0490] width 1920 pitch 7680 (/4 1920)
>[ 36810.552] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36810.584] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36810.586] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b0490]
>[ 36810.617] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b0490] width 1920 pitch 7680 (/4 1920)
>[ 36810.619] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36810.651] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36810.652] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b0490]
>[ 36810.684] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b0490] width 1920 pitch 7680 (/4 1920)
>[ 36810.686] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36810.717] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36810.719] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x23b0490]
>[ 36810.751] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x23b0490] width 1920 pitch 7680 (/4 1920)
>[ 36810.752] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4d30]
>[ 36810.784] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4d30] width 1920 pitch 7680 (/4 1920)
>[ 36821.718] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11f4430]
>[ 36821.734] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11f4430] width 1920 pitch 7680 (/4 1920)
>[ 36822.303] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12a9410]
>[ 36822.317] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12a9410] width 1920 pitch 7680 (/4 1920)
>[ 36828.801] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf92730]
>[ 36828.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf92730] width 1920 pitch 7680 (/4 1920)
>[ 36829.486] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b82f20]
>[ 36829.517] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b82f20] width 1920 pitch 7680 (/4 1920)
>[ 36917.312] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1366d80]
>[ 36917.334] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1366d80] width 1920 pitch 7680 (/4 1920)
>[ 36917.612] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xd7cf20]
>[ 36917.634] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xd7cf20] width 1920 pitch 7680 (/4 1920)
>[ 36918.873] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2aada60]
>[ 36918.901] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2aada60] width 1920 pitch 7680 (/4 1920)
>[ 36919.315] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc1e20]
>[ 36919.334] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc1e20] width 1920 pitch 7680 (/4 1920)
>[ 36919.513] GetModeLine - scrn: 0 clock: 148500
>[ 36919.513] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 36919.513]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 36919.568] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36923.988] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xee2480]
>[ 36924.034] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xee2480] width 1920 pitch 7680 (/4 1920)
>[ 36949.616] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36979.645] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37009.671] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37039.702] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37043.413] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ad36e0]
>[ 37043.434] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ad36e0] width 1920 pitch 7680 (/4 1920)
>[ 37046.109] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1243230]
>[ 37046.151] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1243230] width 1920 pitch 7680 (/4 1920)
>[ 37069.711] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37099.740] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37129.770] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37159.797] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37187.061] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1366d80]
>[ 37187.109] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1366d80] width 1920 pitch 7680 (/4 1920)
>[ 37189.463] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 37189.501] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 37189.831] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37190.035] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xe6d120]
>[ 37190.067] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xe6d120] width 1920 pitch 7680 (/4 1920)
>[ 37191.244] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1243230]
>[ 37191.284] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1243230] width 1920 pitch 7680 (/4 1920)
>[ 37237.080] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37259.179] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf92730]
>[ 37259.201] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf92730] width 1920 pitch 7680 (/4 1920)
>[ 37260.378] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1087ca0]
>[ 37260.417] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1087ca0] width 1920 pitch 7680 (/4 1920)
>[ 37264.796] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2b82f20]
>[ 37264.817] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2b82f20] width 1920 pitch 7680 (/4 1920)
>[ 37265.402] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2a87800]
>[ 37265.434] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2a87800] width 1920 pitch 7680 (/4 1920)
>[ 37267.121] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37297.148] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37327.180] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37357.213] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37387.241] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37417.270] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37447.298] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37477.328] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37507.363] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37537.387] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37567.417] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37597.447] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37600.676] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11192f0]
>[ 37600.726] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11192f0] width 1920 pitch 7680 (/4 1920)
>[ 37602.042] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf92730]
>[ 37602.051] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf92730] width 1920 pitch 7680 (/4 1920)
>[ 37608.923] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf0eaa0]
>[ 37608.951] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf0eaa0] width 1920 pitch 7680 (/4 1920)
>[ 37609.973] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d9000]
>[ 37610.001] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d9000] width 1920 pitch 7680 (/4 1920)
>[ 37610.003] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x123a6a0]
>[ 37610.034] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x123a6a0] width 1920 pitch 7680 (/4 1920)
>[ 37611.116] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1119600]
>[ 37611.134] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1119600] width 1920 pitch 7680 (/4 1920)
>[ 37612.538] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1051b80]
>[ 37612.568] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1051b80] width 1920 pitch 7680 (/4 1920)
>[ 37612.679] GetModeLine - scrn: 0 clock: 148500
>[ 37612.679] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[ 37612.679]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[ 37612.727] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37613.180] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2700]
>[ 37613.218] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2700] width 1920 pitch 7680 (/4 1920)
>[ 37642.791] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37672.820] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37702.824] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37732.855] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37762.888] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37792.915] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37822.945] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37852.977] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37883.007] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37913.036] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37943.068] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37973.097] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38003.124] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38033.154] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38063.162] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38093.191] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38123.219] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38153.248] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38183.278] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38213.309] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38243.338] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38273.368] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38303.399] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38333.429] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38363.459] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38518.309] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38548.346] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38578.377] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38608.405] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38638.436] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38668.466] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38698.495] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38728.526] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38758.555] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38788.587] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38818.614] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38848.645] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38878.676] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38908.706] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38938.735] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38968.764] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38998.795] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39028.822] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39058.855] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39088.883] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39118.914] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39148.943] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39178.975] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39209.004] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39239.033] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39269.061] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39299.091] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39329.122] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39359.151] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39374.160] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e6100]
>[ 39374.208] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e6100] width 1920 pitch 7680 (/4 1920)
>[ 39376.089] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf6b780]
>[ 39376.118] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf6b780] width 1920 pitch 7680 (/4 1920)
>[ 39389.171] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39419.203] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39449.230] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39479.263] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39509.294] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39539.323] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39569.349] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39599.383] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39629.411] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39659.440] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39689.473] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39719.499] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39749.532] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39779.559] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39809.588] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39839.623] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39869.648] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39899.682] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39929.708] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39959.736] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39989.769] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40019.799] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40049.831] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40079.858] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40109.889] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40130.335] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf6b780]
>[ 40130.352] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf6b780] width 1920 pitch 7680 (/4 1920)
>[ 40131.984] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xdc1c20]
>[ 40132.002] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xdc1c20] width 1920 pitch 7680 (/4 1920)
>[ 40139.919] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40169.947] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40199.980] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40230.008] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40260.039] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40290.070] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40320.098] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40331.138] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12d2700]
>[ 40331.190] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12d2700] width 1920 pitch 7680 (/4 1920)
>[ 40333.926] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11cca50]
>[ 40333.935] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11cca50] width 1920 pitch 7680 (/4 1920)
>[ 40335.569] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x1032130]
>[ 40335.585] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x1032130] width 1920 pitch 7680 (/4 1920)
>[ 40336.766] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x11686f0]
>[ 40336.785] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x11686f0] width 1920 pitch 7680 (/4 1920)
>[ 40336.788] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0xf98100]
>[ 40336.802] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0xf98100] width 1920 pitch 7680 (/4 1920)
>[ 40336.852] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x12e6100]
>[ 40336.868] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x12e6100] width 1920 pitch 7680 (/4 1920)
>[ 40458.820] (II) RADEON(0): radeon_dri2_schedule_flip:619 fevent[0x2ae26b0]
>[ 40458.835] (II) RADEON(0): radeon_dri2_flip_event_handler:981 fevent[0x2ae26b0] width 1920 pitch 7680 (/4 1920)

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Attachments on bug 42621: 53184 | 53199 | 53200 | 53201 | 53202

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