Attachment 54627 Details for Bug 42263 – new dmesg log with 3.2 RC6

new dmesg log with 3.2 RC6

dmesg.log (text/plain), 17.55 KB, created by Guang Yang on 2011-12-21 00:02:13 UTC

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Creator: Guang Yang

Created: 2011-12-21 00:02:13 UTC

Size: 17.55 KB

patch

obsolete

>[drm:i915_hotplug_work_func], running encoder hotplug functions
>[drm:intel_dp_detect], DPCD: 110a810100000180
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_edp_panel_vdd_on], PCH_PP_STATUS: 0x80000008 PCH_PP_CONTROL: 0xabcd000f
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:output_poll_execute], [CONNECTOR:5:eDP-1] status updated from 1 to 1
>[drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x3f40018, result 1
>[drm:intel_crt_detect], CRT detected via hotplug
>[drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 2 to 1
>[drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:13:DP-1] status updated from 2 to 2
>[drm:output_poll_execute], [CONNECTOR:16:HDMI-A-2] status updated from 2 to 2
>[drm:output_poll_execute], [CONNECTOR:18:HDMI-A-3] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:21:DP-3] status updated from 2 to 2
>[drm:drm_fb_helper_hotplug_event], 
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:eDP-1]
>[drm:intel_dp_detect], DPCD: 110a810100000180
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:drm_edid_to_eld], ELD: no CEA Extension found
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:eDP-1] probed modes :
>[drm:drm_mode_debug_printmodeline], Modeline 24:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[drm:drm_mode_debug_printmodeline], Modeline 25:"1366x768" 40 46000 1366 1398 1422 1426 768 771 775 806 0x40 0x9
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x3f40018, result 1
>[drm:intel_crt_detect], CRT detected via hotplug
>[drm:drm_edid_to_eld], ELD: no CEA Extension found
>[drm:drm_mode_debug_printmodeline], Modeline 36:"1280x1024" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[drm:drm_mode_prune_invalid], Not using 1280x1024 mode 12
>[drm:drm_mode_debug_printmodeline], Modeline 31:"1152x864" 0 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[drm:drm_mode_prune_invalid], Not using 1152x864 mode 12
>[drm:drm_mode_debug_printmodeline], Modeline 30:"1280x1024" 0 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x48 0x5
>[drm:drm_mode_prune_invalid], Not using 1280x1024 mode 12
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] probed modes :
>[drm:drm_mode_debug_printmodeline], Modeline 37:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:drm_mode_debug_printmodeline], Modeline 38:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[drm:drm_mode_debug_printmodeline], Modeline 39:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[drm:drm_mode_debug_printmodeline], Modeline 32:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[drm:drm_mode_debug_printmodeline], Modeline 34:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline], Modeline 35:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1]
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1] disconnected
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DP-1]
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DP-1] disconnected
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-2]
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-2] disconnected
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-3]
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-3] disconnected
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:19:DP-2]
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:19:DP-2] disconnected
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:21:DP-3]
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:drm_helper_probe_single_connector_modes], [CONNECTOR:21:DP-3] disconnected
>[drm:drm_setup_crtcs], 
>[drm:drm_enable_connectors], connector 5 enabled? yes
>[drm:drm_enable_connectors], connector 9 enabled? yes
>[drm:drm_enable_connectors], connector 12 enabled? no
>[drm:drm_enable_connectors], connector 13 enabled? no
>[drm:drm_enable_connectors], connector 16 enabled? no
>[drm:drm_enable_connectors], connector 18 enabled? no
>[drm:drm_enable_connectors], connector 19 enabled? no
>[drm:drm_enable_connectors], connector 21 enabled? no
>[drm:drm_target_preferred], looking for cmdline mode on connector 5
>[drm:drm_target_preferred], looking for preferred mode on connector 5
>[drm:drm_target_preferred], found mode 1366x768
>[drm:drm_target_preferred], looking for cmdline mode on connector 9
>[drm:drm_target_preferred], looking for preferred mode on connector 9
>[drm:drm_target_preferred], found mode 1024x768
>[drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config
>[drm:drm_setup_crtcs], desired mode 1366x768 set on crtc 3
>[drm:drm_setup_crtcs], desired mode 1024x768 set on crtc 4
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], [CRTC:3] [FB:28] #connectors=1 (x y) (0 0)
>[drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[drm:drm_crtc_helper_set_config], [CONNECTOR:5:eDP-1] to [CRTC:3]
>[drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[drm:drm_mode_debug_printmodeline], Modeline 27:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[drm:intel_dp_mode_fixup], Display port link bw 06 lane count 1 clock 162000
>[drm:drm_crtc_helper_set_mode], [CRTC:3]
>[drm:ironlake_edp_backlight_off], 
>[drm:ironlake_edp_panel_off], Turn eDP power off
>[drm:ironlake_wait_panel_off], Wait for panel power off time
>[drm:ironlake_wait_panel_status], mask b000000f value 00000000 status 80000008 control abcd0000
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[drm:ironlake_edp_panel_vdd_on], PCH_PP_STATUS: 0x00000000 PCH_PP_CONTROL: 0xabcd0008
>[drm:ironlake_edp_panel_vdd_on], eDP was not running
>[drm:intel_dp_link_down], 
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[drm:ironlake_check_srwm], watermark 1: display plane 24, fbc lines 3, cursor 6
>[drm:ironlake_check_srwm], watermark 2: display plane 76, fbc lines 3, cursor 6
>[drm:intel_update_fbc], 
>[drm:intel_update_fbc], fbc set to per-chip default
>[drm:intel_update_fbc], fbc disabled per module param
>[drm:intel_choose_pipe_bpp_dither], clamping display bpc (was -1) to eDP (6)
>[drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 6)
>[drm:ironlake_crtc_mode_set], Mode for pipe 0:
>[drm:drm_mode_debug_printmodeline], Modeline 27:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[drm:ironlake_set_pll_edp], eDP PLL enable for clock 162000
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:ironlake_update_plane], Writing base 00043000 00000000 0 0 5504
>[drm:intel_update_fbc], 
>[drm:intel_update_fbc], fbc set to per-chip default
>[drm:intel_update_fbc], fbc disabled per module param
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[drm:ironlake_check_srwm], watermark 1: display plane 24, fbc lines 3, cursor 6
>[drm:ironlake_check_srwm], watermark 2: display plane 76, fbc lines 3, cursor 6
>[drm:drm_crtc_helper_set_mode], [ENCODER:6:TMDS-6] set [MODE:27:1366x768]
>[drm:ironlake_edp_pll_on], 
>[drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[drm:ironlake_check_srwm], watermark 1: display plane 24, fbc lines 3, cursor 6
>[drm:ironlake_check_srwm], watermark 2: display plane 76, fbc lines 3, cursor 6
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_update_fbc], 
>[drm:intel_update_fbc], fbc set to per-chip default
>[drm:intel_update_fbc], fbc disabled per module param
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], clock recovery OK
>[drm:ironlake_edp_panel_on], Turn eDP power on
>[drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[drm:ironlake_wait_panel_on], Wait for panel power on
>[drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 9000000a control abcd0009
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:ironlake_panel_vdd_off_sync], PCH_PP_STATUS: 0x80000008 PCH_PP_CONTROL: 0xabcd0003
>[drm:intel_dp_link_down], 
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], clock recovery OK
>[drm:intel_dp_link_down], 
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], too many voltage retries, give up
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], clock recovery OK
>[drm:intel_dp_link_down], 
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], clock recovery OK
>[drm:intel_dp_link_down], 
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], clock recovery OK
>[drm:intel_dp_link_down], 
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[drm:intel_dp_start_link_train], too many voltage retries, give up
>[drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[drm:intel_dp_link_down], 
>[drm:ironlake_edp_backlight_on], 
>[drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[drm:drm_crtc_helper_set_config], 	[CONNECTOR:5:eDP-1] set DPMS on
>[drm:drm_crtc_helper_set_config], 
>[drm:drm_crtc_helper_set_config], [CRTC:4] [FB:28] #connectors=1 (x y) (0 0)
>[drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[drm:drm_crtc_helper_set_config], modes are different, full mode set
>[drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[drm:drm_crtc_helper_set_config], [CONNECTOR:5:eDP-1] to [CRTC:3]
>[drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:4]
>[drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:drm_crtc_helper_set_mode], [CRTC:4]
>[drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
>[drm:ironlake_crtc_mode_set], Mode for pipe 1:
>[drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:ironlake_update_plane], Writing base 00043000 00000000 0 0 5504
>[drm:intel_update_fbc], 
>[drm:intel_update_fbc], more than one pipe active, disabling compression
>[drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[drm:ironlake_update_wm], FIFO watermarks For pipe B - plane 6, cursor: 6
>[drm:drm_crtc_helper_set_mode], [ENCODER:10:DAC-10] set [MODE:30:1024x768]
>[drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[drm:ironlake_update_wm], FIFO watermarks For pipe B - plane 6, cursor: 6
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:intel_wait_for_vblank], vblank wait timed out
>[drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[drm:ironlake_fdi_link_train], FDI train 1 done.
>[drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[drm:ironlake_fdi_link_train], FDI train 2 done.
>[drm:ironlake_fdi_link_train], FDI train done
>[drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[drm:intel_update_fbc], 
>[drm:intel_update_fbc], more than one pipe active, disabling compression
>[drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[drm:drm_crtc_helper_set_config], 	[CONNECTOR:9:VGA-1] set DPMS on
>[drm:intel_dp_detect], DPCD: 110a810100000180
>[drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[drm:ironlake_edp_panel_vdd_on], PCH_PP_STATUS: 0x80000008 PCH_PP_CONTROL: 0xabcd000f
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[drm:output_poll_execute], [CONNECTOR:5:eDP-1] status updated from 1 to 1
>[drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xc3f40018, result 1
>[drm:intel_crt_detect], CRT detected via hotplug
>[drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:13:DP-1] status updated from 2 to 2
>[drm:output_poll_execute], [CONNECTOR:16:HDMI-A-2] status updated from 2 to 2
>[drm:output_poll_execute], [CONNECTOR:18:HDMI-A-3] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 2 to 2
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x5145003e
>[drm:intel_dp_detect], DPCD: 0000000000000000
>[drm:output_poll_execute], [CONNECTOR:21:DP-3] status updated from 2 to 2
>[drm:ironlake_panel_vdd_off_sync], PCH_PP_STATUS: 0x80000008 PCH_PP_CONTROL: 0xabcd0007

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Attachments on bug 42263: 52780 | 54608 | 54627 | 56178

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