Attachment 58312 Details for Bug 46796 – Verbose test patch with crash fixed

[patch] Verbose test patch with crash fixed

fdo46796.diff (text/plain), 5.91 KB, created by Michel Dänzer on 2012-03-12 05:13:22 UTC

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Creator: Michel Dänzer

Created: 2012-03-12 05:13:22 UTC

Size: 5.91 KB

patch

obsolete

>diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
>index ec995ca..1414900 100644
>--- a/drivers/gpu/drm/radeon/radeon.h
>+++ b/drivers/gpu/drm/radeon/radeon.h
>@@ -375,9 +375,6 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
> 				int alignment, int initial_domain,
> 				bool discardable, bool kernel,
> 				struct drm_gem_object **obj);
>-int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
>-			  uint64_t *gpu_addr);
>-void radeon_gem_object_unpin(struct drm_gem_object *obj);
> 
> int radeon_mode_dumb_create(struct drm_file *file_priv,
> 			    struct drm_device *dev,
>diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
>index fde25c0..779f0e4 100644
>--- a/drivers/gpu/drm/radeon/radeon_cursor.c
>+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
>@@ -151,7 +151,9 @@ int radeon_crtc_cursor_set(struct drm_crtc *crtc,
> 			   uint32_t height)
> {
> 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
>+	struct radeon_device *rdev = crtc->dev->dev_private;
> 	struct drm_gem_object *obj;
>+	struct radeon_bo *robj;
> 	uint64_t gpu_addr;
> 	int ret;
> 
>@@ -173,7 +175,26 @@ int radeon_crtc_cursor_set(struct drm_crtc *crtc,
> 		return -ENOENT;
> 	}
> 
>-	ret = radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
>+	robj = gem_to_radeon_bo(obj);
>+	ret = radeon_bo_reserve(robj, false);
>+	if (unlikely(ret != 0))
>+		goto fail;
>+	ret = radeon_bo_pin(robj, RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
>+	if (ret) {
>+		radeon_bo_unreserve(robj);
>+		goto fail;
>+	}
>+	if (!ASIC_IS_AVIVO(rdev) &&
>+	    (gpu_addr - radeon_crtc->legacy_display_base_addr) >= (1 << 27)) {
>+		/* Only 27 bit offset for legacy cursor */
>+		radeon_bo_unpin(robj);
>+		DRM_INFO("Fixing large cursor offset 0x%08x >= 0x%08x\n",
>+			 gpu_addr - radeon_crtc->legacy_display_base_addr,
>+			 1 << 27);
>+		ret = radeon_bo_pin_restricted(robj, RADEON_GEM_DOMAIN_VRAM,
>+					       1 << 27, &gpu_addr);
>+	}
>+	radeon_bo_unreserve(robj);
> 	if (ret)
> 		goto fail;
> 
>@@ -181,14 +202,18 @@ int radeon_crtc_cursor_set(struct drm_crtc *crtc,
> 	radeon_crtc->cursor_height = height;
> 
> 	radeon_lock_cursor(crtc, true);
>-	/* XXX only 27 bit offset for legacy cursor */
> 	radeon_set_cursor(crtc, obj, gpu_addr);
> 	radeon_show_cursor(crtc);
> 	radeon_lock_cursor(crtc, false);
> 
> unpin:
> 	if (radeon_crtc->cursor_bo) {
>-		radeon_gem_object_unpin(radeon_crtc->cursor_bo);
>+		robj = gem_to_radeon_bo(radeon_crtc->cursor_bo);
>+		ret = radeon_bo_reserve(robj, false);
>+		if (likely(ret == 0)) {
>+			radeon_bo_unpin(robj);
>+			radeon_bo_unreserve(robj);
>+		}
> 		drm_gem_object_unreference_unlocked(radeon_crtc->cursor_bo);
> 	}
> 
>diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
>index 003eeec..090da31 100644
>--- a/drivers/gpu/drm/radeon/radeon_gem.c
>+++ b/drivers/gpu/drm/radeon/radeon_gem.c
>@@ -75,32 +75,6 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
> 	return 0;
> }
> 
>-int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
>-			  uint64_t *gpu_addr)
>-{
>-	struct radeon_bo *robj = gem_to_radeon_bo(obj);
>-	int r;
>-
>-	r = radeon_bo_reserve(robj, false);
>-	if (unlikely(r != 0))
>-		return r;
>-	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
>-	radeon_bo_unreserve(robj);
>-	return r;
>-}
>-
>-void radeon_gem_object_unpin(struct drm_gem_object *obj)
>-{
>-	struct radeon_bo *robj = gem_to_radeon_bo(obj);
>-	int r;
>-
>-	r = radeon_bo_reserve(robj, false);
>-	if (likely(r == 0)) {
>-		radeon_bo_unpin(robj);
>-		radeon_bo_unreserve(robj);
>-	}
>-}
>-
> int radeon_gem_set_domain(struct drm_gem_object *gobj,
> 			  uint32_t rdomain, uint32_t wdomain)
> {
>diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
>index d45df17..388be34 100644
>--- a/drivers/gpu/drm/radeon/radeon_object.c
>+++ b/drivers/gpu/drm/radeon/radeon_object.c
>@@ -224,7 +224,8 @@ void radeon_bo_unref(struct radeon_bo **bo)
> 		*bo = NULL;
> }
> 
>-int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
>+int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
>+			     u64 *gpu_addr)
> {
> 	int r, i;
> 
>@@ -232,6 +233,7 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
> 		bo->pin_count++;
> 		if (gpu_addr)
> 			*gpu_addr = radeon_bo_gpu_offset(bo);
>+		WARN_ON_ONCE(max_offset != 0);
> 		return 0;
> 	}
> 	radeon_ttm_placement_from_domain(bo, domain);
>@@ -239,6 +241,15 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
> 		/* force to pin into visible video ram */
> 		bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
> 	}
>+	if (max_offset) {
>+		u64 lpfn = max_offset >> PAGE_SHIFT;
>+
>+		if (bo->placement.lpfn) {
>+			if (lpfn < bo->placement.lpfn)
>+				bo->placement.lpfn = lpfn;
>+		} else
>+			bo->placement.lpfn = lpfn;
>+	}
> 	for (i = 0; i < bo->placement.num_placement; i++)
> 		bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
> 	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false, false);
>@@ -252,6 +263,11 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
> 	return r;
> }
> 
>+int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
>+{
>+	return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr);
>+}
>+
> int radeon_bo_unpin(struct radeon_bo *bo)
> {
> 	int r, i;
>diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
>index cde4303..f9104be 100644
>--- a/drivers/gpu/drm/radeon/radeon_object.h
>+++ b/drivers/gpu/drm/radeon/radeon_object.h
>@@ -118,6 +118,8 @@ extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
> extern void radeon_bo_kunmap(struct radeon_bo *bo);
> extern void radeon_bo_unref(struct radeon_bo **bo);
> extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
>+extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
>+				    u64 max_offset, u64 *gpu_addr);
> extern int radeon_bo_unpin(struct radeon_bo *bo);
> extern int radeon_bo_evict_vram(struct radeon_device *rdev);
> extern void radeon_bo_force_delete(struct radeon_device *rdev);

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Attachments on bug 46796: 57834 | 57835 | 57836 | 57837 | 57853 | 58066 | 58312 | 58436

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