Attachment 5939 Details for Bug 7252 – Add Option "DepthBits", take two

[patch] Add Option "DepthBits", take two

radeon-depthbits.diff (text/plain), 8.04 KB, created by Michel Dänzer on 2006-06-16 10:38:45 UTC

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Creator: Michel Dänzer

Created: 2006-06-16 10:38:45 UTC

Size: 8.04 KB

patch

obsolete

>diff --git a/src/radeon.h b/src/radeon.h
>index 02098b6..1c303f5 100644
>--- a/src/radeon.h
>+++ b/src/radeon.h
>@@ -582,6 +582,7 @@ #ifdef XF86DRI
>     int               backPitch;
>     int               depthOffset;
>     int               depthPitch;
>+    int               depthBits;
>     int               textureOffset;
>     int               textureSize;
>     int               log2TexGran;
>diff --git a/src/radeon_dri.c b/src/radeon_dri.c
>index 7e5840c..b9552e5 100644
>--- a/src/radeon_dri.c
>+++ b/src/radeon_dri.c
>@@ -160,14 +160,14 @@ #define RADEON_USE_STENCIL 1
> 		    pConfigs[i].doubleBuffer   = FALSE;
> 		pConfigs[i].stereo             = FALSE;
> 		pConfigs[i].bufferSize         = 16;
>-		pConfigs[i].depthSize          = 16;
>-		if (stencil)
>+		pConfigs[i].depthSize          = info->depthBits;
>+		if (info->depthBits == 24 ? (RADEON_USE_STENCIL - stencil) : stencil)
> 		    pConfigs[i].stencilSize    = 8;
> 		else
> 		    pConfigs[i].stencilSize    = 0;
> 		pConfigs[i].auxBuffers         = 0;
> 		pConfigs[i].level              = 0;
>-		if (accum || stencil) {
>+		if (accum || (pConfigs[i].stencilSize && info->depthBits == 16)) {
> 		   pConfigs[i].visualRating    = GLX_SLOW_CONFIG;
> 		} else {
> 		   pConfigs[i].visualRating    = GLX_NONE;
>@@ -243,16 +243,14 @@ #define RADEON_USE_STENCIL 1
> 		    pConfigs[i].doubleBuffer   = FALSE;
> 		pConfigs[i].stereo             = FALSE;
> 		pConfigs[i].bufferSize         = 32;
>-		if (stencil) {
>-		    pConfigs[i].depthSize      = 24;
>+		pConfigs[i].depthSize          = info->depthBits;
>+		if (info->depthBits == 24 ? (RADEON_USE_STENCIL - stencil) : stencil)
> 		    pConfigs[i].stencilSize    = 8;
>-		} else {
>-		    pConfigs[i].depthSize      = 24;
>+		else
> 		    pConfigs[i].stencilSize    = 0;
>-		}
> 		pConfigs[i].auxBuffers         = 0;
> 		pConfigs[i].level              = 0;
>-		if (accum) {
>+		if (accum || (pConfigs[i].stencilSize && info->depthBits == 16)) {
> 		   pConfigs[i].visualRating    = GLX_SLOW_CONFIG;
> 		} else {
> 		   pConfigs[i].visualRating    = GLX_NONE;
>diff --git a/src/radeon_driver.c b/src/radeon_driver.c
>index 7180a87..a011d40 100644
>--- a/src/radeon_driver.c
>+++ b/src/radeon_driver.c
>@@ -157,6 +157,7 @@ #ifdef XF86DRI
>     OPTION_NO_BACKBUFFER,
>     OPTION_XV_DMA,
>     OPTION_FBTEX_PERCENT,
>+    OPTION_DEPTH_BITS,
> #endif
>     OPTION_PANEL_OFF,
>     OPTION_DDC_MODE,
>@@ -220,6 +221,7 @@ #ifdef XF86DRI
>     { OPTION_NO_BACKBUFFER,  "NoBackBuffer",     OPTV_BOOLEAN, {0}, FALSE },
>     { OPTION_XV_DMA,         "DMAForXv",         OPTV_BOOLEAN, {0}, FALSE },
>     { OPTION_FBTEX_PERCENT,  "FBTexPercent",     OPTV_INTEGER, {0}, FALSE },
>+    { OPTION_DEPTH_BITS,     "DepthBits",        OPTV_INTEGER, {0}, FALSE },
> #endif
>     { OPTION_PANEL_OFF,      "PanelOff",         OPTV_BOOLEAN, {0}, FALSE },
>     { OPTION_DDC_MODE,       "DDCMode",          OPTV_BOOLEAN, {0}, FALSE },
>@@ -5337,6 +5339,7 @@ Bool RADEONSetupMemXAA_DRI(int scrnIndex
>     ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];
>     RADEONInfoPtr  info  = RADEONPTR(pScrn);
>     int            cpp = info->CurrentLayout.pixel_bytes;
>+    int            depthCpp = (info->depthBits - 8) / 4;
>     int            width_bytes = pScrn->displayWidth * cpp;
>     int            bufferSize;
>     int            depthSize;
>@@ -5367,7 +5370,7 @@ Bool RADEONSetupMemXAA_DRI(int scrnIndex
>      */
>     info->depthPitch = (pScrn->displayWidth + 31) & ~31;
>     depthSize = ((((pScrn->virtualY + 15) & ~15) * info->depthPitch
>-		  * cpp + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
>+		  * depthCpp + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
> 
>     switch (info->CPMode) {
>     case RADEON_DEFAULT_CP_PIO_MODE:
>@@ -5593,7 +5596,7 @@ Bool RADEONSetupMemXAA_DRI(int scrnIndex
>     info->backPitchOffset = (((info->backPitch * cpp / 64) << 22) |
> 			     ((info->backOffset + info->fbLocation) >> 10));
> 
>-    info->depthPitchOffset = (((info->depthPitch * cpp / 64) << 22) |
>+    info->depthPitchOffset = (((info->depthPitch * depthCpp / 64) << 22) |
> 			      ((info->depthOffset + info->fbLocation) >> 10));
>     return TRUE;
> }
>@@ -5728,6 +5731,26 @@ #endif
>     miSetPixmapDepths ();
> 
> #ifdef XF86DRI
>+    if (info->directRenderingEnabled) {
>+	MessageType from;
>+
>+	info->depthBits = pScrn->depth;
>+
>+	from = xf86GetOptValInteger(info->Options, OPTION_DEPTH_BITS,
>+				    &info->depthBits)
>+	     ? X_CONFIG : X_DEFAULT;
>+
>+	if (info->depthBits != 16 && info->depthBits != 24) {
>+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
>+		       "Value for Option \"DepthBits\" must be 16 or 24\n");
>+	    info->depthBits = pScrn->depth;
>+	    from = X_DEFAULT;
>+	}
>+
>+	xf86DrvMsg(pScrn->scrnIndex, from,
>+		   "Using %d bit depth buffer\n", info->depthBits);
>+    }
>+
>     /* Setup DRI after visuals have been established, but before fbScreenInit is
>      * called.  fbScreenInit will eventually call the driver's InitGLXVisuals
>      * call back. */
>@@ -6814,10 +6837,14 @@ void RADEONChangeSurfaces(ScrnInfoPtr pS
>   
>     RADEONInfoPtr  info  = RADEONPTR(pScrn);
>     int cpp = info->CurrentLayout.pixel_bytes;
>+    int depthCpp = (info->depthBits - 8) / 4;
>     /* depth/front/back pitch must be identical (and the same as displayWidth) */
>     int width_bytes = pScrn->displayWidth * cpp;
>     int bufferSize = ((((pScrn->virtualY + 15) & ~15) * width_bytes
>         + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
>+    int depth_width_bytes = pScrn->displayWidth * depthCpp;
>+    int depthBufferSize = ((((pScrn->virtualY + 15) & ~15) * depth_width_bytes
>+        + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
>     unsigned int depth_pattern, color_pattern, swap_pattern;
> 
>     if (!info->allowColorTiling)
>@@ -6837,19 +6864,19 @@ void RADEONChangeSurfaces(ScrnInfoPtr pS
> #endif
>     if (info->ChipFamily < CHIP_FAMILY_R200) {
> 	color_pattern = RADEON_SURF_TILE_COLOR_MACRO;
>-	if (cpp == 2)
>+	if (depthCpp == 2)
> 	    depth_pattern = RADEON_SURF_TILE_DEPTH_16BPP;
> 	else
> 	    depth_pattern = RADEON_SURF_TILE_DEPTH_32BPP;
>     } else if (IS_R300_VARIANT) {
>        color_pattern = R300_SURF_TILE_COLOR_MACRO;
>-       if (cpp == 2)
>+       if (depthCpp == 2)
>            depth_pattern = R300_SURF_TILE_COLOR_MACRO;
>        else
>            depth_pattern = R300_SURF_TILE_COLOR_MACRO | R300_SURF_TILE_DEPTH_32BPP;
>     } else {
> 	color_pattern = R200_SURF_TILE_COLOR_MACRO;
>-	if (cpp == 2)
>+	if (depthCpp == 2)
> 	    depth_pattern = R200_SURF_TILE_DEPTH_16BPP;
> 	else
> 	    depth_pattern = R200_SURF_TILE_DEPTH_32BPP;
>@@ -6908,12 +6935,12 @@ void RADEONChangeSurfaces(ScrnInfoPtr pS
> 	    (info->ChipFamily != CHIP_FAMILY_RS100) ||
> 	    (info->ChipFamily != CHIP_FAMILY_RS200))) {
> 	    drmRadeonSurfaceAlloc drmsurfalloc;
>-	    drmsurfalloc.size = bufferSize;
>+	    drmsurfalloc.size = depthBufferSize;
> 	    drmsurfalloc.address = info->depthOffset;
>             if (IS_R300_VARIANT)
>-                drmsurfalloc.flags = swap_pattern | (width_bytes / 8) | depth_pattern;
>+                drmsurfalloc.flags = swap_pattern | (depth_width_bytes / 8) | depth_pattern;
>             else
>-                drmsurfalloc.flags = swap_pattern | (width_bytes / 16) | depth_pattern;
>+                drmsurfalloc.flags = swap_pattern | (depth_width_bytes / 16) | depth_pattern;
> 	    retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_ALLOC,
> 		&drmsurfalloc, sizeof(drmsurfalloc));
> 	    if (retvalue < 0)
>diff --git a/src/radeon_exa.c b/src/radeon_exa.c
>index 56927c1..21aa305 100644
>--- a/src/radeon_exa.c
>+++ b/src/radeon_exa.c
>@@ -367,6 +367,7 @@ Bool RADEONSetupMemEXA (ScreenPtr pScree
>     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
>     RADEONInfoPtr info = RADEONPTR(pScrn);
>     int cpp = info->CurrentLayout.pixel_bytes;
>+    int depthCpp = (info->depthBits - 8) / 4;
>     int l;
>     int next, screen_size;
>     int byteStride = pScrn->displayWidth * cpp;
>@@ -427,7 +428,7 @@ #if defined(XF86DRI)
> 	 * handle tiling.
> 	 */
> 	info->depthPitch = RADEON_ALIGN(pScrn->displayWidth, 32);
>-	depth_size = RADEON_ALIGN(pScrn->virtualY, 16) * info->depthPitch * cpp;
>+ 	depth_size = RADEON_ALIGN(pScrn->virtualY, 16) * info->depthPitch * depthCpp;
> 	next = RADEON_ALIGN(info->exa.card.offScreenBase, RADEON_BUFFER_ALIGN);
> 	if (next + depth_size <= info->exa.card.memorySize)
> 	{

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Attachments on bug 7252: 5934 | 5935 | 5936 | 5937 | 5938 | 5939 | 5941 | 5942 | 5945 | 5953

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