Attachment 60890 Details for Bug 49025 – Don't read the non-existent DPLL register on ILK+

[patch] Don't read the non-existent DPLL register on ILK+

0001-drm-i915-Do-not-read-non-existent-DPLL-registers-on-.patch (text/plain), 1.92 KB, created by Chris Wilson on 2012-05-02 04:07:40 UTC

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Creator: Chris Wilson

Created: 2012-05-02 04:07:40 UTC

Size: 1.92 KB

patch

obsolete

>From 973e4d41da02e3c6656e542818f8ad451f204155 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Wed, 2 May 2012 11:55:46 +0100
>Subject: [PATCH] drm/i915: Do not read non-existent DPLL registers on PCH
> hardware
>
>We only execute intel_decrease_pllclock for pre-PCH hardware, typically
>gen4 mobiles. However, in the variable declaration we did read from the
>non-PCH DPLL register, quite naughty and detected by SandyBridge.
>
>Reported-by: Andrey Rahmatullin <wrar@wrar.name>
>References: https://bugs.freedesktop.org/show_bug.cgi?id=49025
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/intel_display.c |    9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index e1716be..10fefdd 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -5486,9 +5486,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
> 	struct drm_device *dev = crtc->dev;
> 	drm_i915_private_t *dev_priv = dev->dev_private;
> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>-	int pipe = intel_crtc->pipe;
>-	int dpll_reg = DPLL(pipe);
>-	int dpll = I915_READ(dpll_reg);
> 
> 	if (HAS_PCH_SPLIT(dev))
> 		return;
>@@ -5501,10 +5498,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
> 	 * the manual case.
> 	 */
> 	if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
>+		int pipe = intel_crtc->pipe;
>+		int dpll_reg = DPLL(pipe);
>+		u32 dpll;
>+
> 		DRM_DEBUG_DRIVER("downclocking LVDS\n");
> 
> 		assert_panel_unlocked(dev_priv, pipe);
> 
>+		dpll = I915_READ(dpll_reg);
> 		dpll |= DISPLAY_RATE_SELECT_FPA1;
> 		I915_WRITE(dpll_reg, dpll);
> 		intel_wait_for_vblank(dev, pipe);
>@@ -5512,7 +5514,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
> 		if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
> 			DRM_DEBUG_DRIVER("failed to downclock LVDS!\n");
> 	}
>-
> }
> 
> /**
>-- 
>1.7.10
>

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