Attachment 61724 Details for Bug 50010 – dmesg with errors (drm.debug=0x06)

dmesg with errors (drm.debug=0x06)

dmesg.txt (text/plain), 123.45 KB, created by max on 2012-05-16 09:04:34 UTC

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Description:

Filename:

MIME Type:

Creator: max

Created: 2012-05-16 09:04:34 UTC

Size: 123.45 KB

patch

obsolete

>00:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  372.784499] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  372.784511] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  372.784522] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  372.784533] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  372.784545] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  372.784556] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  372.784567] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  372.784578] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  372.784589] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  372.784601] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  372.784612] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  372.784623] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  372.784634] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  372.784646] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  372.784658] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  372.784669] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  372.784680] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  372.784691] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  372.784702] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  372.784713] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  372.784724] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  372.784735] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  372.784746] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  372.784757] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  372.784768] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  372.784779] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  372.784790] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  372.784801] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  372.784812] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  372.784822] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  372.784833] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  372.784844] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  372.784855] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  372.784865] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  372.784876] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  372.784887] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  372.784898] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  372.784909] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  372.784919] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  372.784930] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  372.785162] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  372.812220] [drm:intel_update_fbc], 
>[  372.812228] [drm:intel_update_fbc], fbc set to per-chip default
>[  372.812235] [drm:intel_update_fbc], fbc disabled per module param
>[  372.812242] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  372.812249] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  372.812257] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  372.820443] [drm:drm_mode_addfb], [FB:23]
>[  372.820490] [drm:drm_crtc_helper_set_config], 
>[  372.820496] [drm:drm_crtc_helper_set_config], [CRTC:3] [NOFB]
>[  372.820505] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  372.821764] [drm:drm_mode_setcrtc], [CRTC:4]
>[  372.821778] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[  372.821784] [drm:drm_crtc_helper_set_config], 
>[  372.821790] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:23] #connectors=1 (x y) (0 0)
>[  372.821803] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  372.821810] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  372.821816] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  372.821823] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  372.821830] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  372.821837] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 68940 1280 1301 1333 1408 800 803 808 816 0x0 0xa
>[  372.821851] [drm:drm_crtc_helper_set_mode], [CRTC:4]
>[  372.822459] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  372.822466] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 68940 1280 1301 1333 1408 800 803 808 816 0x0 0xa
>[  372.853612] [drm:i9xx_update_plane], Writing base 00C28000 00000000 0 0 5120
>[  372.853626] [drm:intel_update_fbc], 
>[  372.853632] [drm:intel_update_fbc], fbc set to per-chip default
>[  372.853638] [drm:intel_update_fbc], fbc disabled per module param
>[  372.853646] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  372.853653] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  372.853660] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  372.853670] [drm:drm_crtc_helper_set_mode], [ENCODER:6:LVDS-6] set [MODE:24:]
>[  372.853678] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  372.853685] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  372.853692] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  372.860223] [drm:intel_update_fbc], 
>[  372.860229] [drm:intel_update_fbc], fbc set to per-chip default
>[  372.860235] [drm:intel_update_fbc], fbc disabled per module param
>[  372.868193] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  372.868205] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  372.868212] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:5:LVDS-1] set DPMS on
>[  372.868222] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  373.001828] [drm:drm_mode_addfb], [FB:24]
>[  373.023414] [drm:intel_update_fbc], 
>[  373.023421] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.023425] [drm:intel_update_fbc], fbc disabled per module param
>[  373.034273] [drm:drm_mode_addfb], [FB:23]
>[  373.054643] [drm:intel_update_fbc], 
>[  373.054650] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.054654] [drm:intel_update_fbc], fbc disabled per module param
>[  373.063559] [drm:intel_crtc_cursor_set], 
>[  373.131663] [drm:drm_mode_addfb], [FB:24]
>[  373.137577] [drm:intel_update_fbc], 
>[  373.137586] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.137589] [drm:intel_update_fbc], fbc disabled per module param
>[  373.137665] [drm:drm_mode_addfb], [FB:23]
>[  373.155635] [drm:intel_update_fbc], 
>[  373.155642] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.155646] [drm:intel_update_fbc], fbc disabled per module param
>[  373.214323] [drm:drm_mode_addfb], [FB:24]
>[  373.237239] [drm:drm_mode_addfb], [FB:23]
>[  373.237320] [drm:intel_update_fbc], 
>[  373.237326] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.237332] [drm:intel_update_fbc], fbc disabled per module param
>[  373.253777] [drm:intel_update_fbc], 
>[  373.253787] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.253793] [drm:intel_update_fbc], fbc disabled per module param
>[  373.253843] [drm:drm_mode_addfb], [FB:24]
>[  373.270359] [drm:intel_update_fbc], 
>[  373.270369] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.270375] [drm:intel_update_fbc], fbc disabled per module param
>[  373.270424] [drm:drm_mode_addfb], [FB:23]
>[  373.286938] [drm:intel_update_fbc], 
>[  373.286947] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.286953] [drm:intel_update_fbc], fbc disabled per module param
>[  373.287001] [drm:drm_mode_addfb], [FB:24]
>[  373.303429] [drm:drm_mode_addfb], [FB:23]
>[  373.303508] [drm:intel_update_fbc], 
>[  373.303515] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.303521] [drm:intel_update_fbc], fbc disabled per module param
>[  373.320106] [drm:intel_update_fbc], 
>[  373.320116] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.320121] [drm:intel_update_fbc], fbc disabled per module param
>[  373.320172] [drm:drm_mode_addfb], [FB:24]
>[  373.336535] [drm:intel_update_fbc], 
>[  373.336545] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.336551] [drm:intel_update_fbc], fbc disabled per module param
>[  373.337019] [drm:drm_mode_addfb], [FB:23]
>[  373.353111] [drm:intel_update_fbc], 
>[  373.353120] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.353127] [drm:intel_update_fbc], fbc disabled per module param
>[  373.353670] [drm:drm_mode_addfb], [FB:24]
>[  373.369938] [drm:intel_update_fbc], 
>[  373.369947] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.369953] [drm:intel_update_fbc], fbc disabled per module param
>[  373.384829] [drm:drm_mode_addfb], [FB:23]
>[  373.402864] [drm:intel_update_fbc], 
>[  373.402875] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.402881] [drm:intel_update_fbc], fbc disabled per module param
>[  373.402914] [drm:drm_mode_addfb], [FB:24]
>[  373.425356] [drm:intel_update_fbc], 
>[  373.425366] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.425372] [drm:intel_update_fbc], fbc disabled per module param
>[  373.428075] [drm:drm_mode_addfb], [FB:23]
>[  373.452811] [drm:drm_mode_addfb], [FB:24]
>[  373.452923] [drm:intel_update_fbc], 
>[  373.452930] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.452937] [drm:intel_update_fbc], fbc disabled per module param
>[  373.469184] [drm:intel_update_fbc], 
>[  373.469193] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.469200] [drm:intel_update_fbc], fbc disabled per module param
>[  373.469239] [drm:drm_mode_addfb], [FB:23]
>[  373.502455] [drm:drm_mode_addfb], [FB:24]
>[  373.502569] [drm:intel_update_fbc], 
>[  373.502576] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.502582] [drm:intel_update_fbc], fbc disabled per module param
>[  373.519131] [drm:drm_mode_addfb], [FB:23]
>[  373.519244] [drm:intel_update_fbc], 
>[  373.519251] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.519257] [drm:intel_update_fbc], fbc disabled per module param
>[  373.535509] [drm:intel_update_fbc], 
>[  373.535521] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.535527] [drm:intel_update_fbc], fbc disabled per module param
>[  373.535569] [drm:drm_mode_addfb], [FB:24]
>[  373.552076] [drm:intel_update_fbc], 
>[  373.552084] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.552091] [drm:intel_update_fbc], fbc disabled per module param
>[  373.555925] [drm:drm_mode_addfb], [FB:23]
>[  373.585323] [drm:drm_mode_addfb], [FB:24]
>[  373.585437] [drm:intel_update_fbc], 
>[  373.585444] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.585450] [drm:intel_update_fbc], fbc disabled per module param
>[  373.601896] [drm:drm_mode_addfb], [FB:23]
>[  373.602009] [drm:intel_update_fbc], 
>[  373.602016] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.602022] [drm:intel_update_fbc], fbc disabled per module param
>[  373.618404] [drm:intel_update_fbc], 
>[  373.618412] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.618418] [drm:intel_update_fbc], fbc disabled per module param
>[  373.621929] [drm:drm_mode_addfb], [FB:24]
>[  373.651781] [drm:drm_mode_addfb], [FB:23]
>[  373.651894] [drm:intel_update_fbc], 
>[  373.651901] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.651908] [drm:intel_update_fbc], fbc disabled per module param
>[  373.668248] [drm:drm_mode_addfb], [FB:24]
>[  373.668360] [drm:intel_update_fbc], 
>[  373.668367] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.668374] [drm:intel_update_fbc], fbc disabled per module param
>[  373.684725] [drm:intel_update_fbc], 
>[  373.684732] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.684739] [drm:intel_update_fbc], fbc disabled per module param
>[  373.687858] [drm:drm_mode_addfb], [FB:23]
>[  373.718107] [drm:drm_mode_addfb], [FB:24]
>[  373.718220] [drm:intel_update_fbc], 
>[  373.718227] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.718233] [drm:intel_update_fbc], fbc disabled per module param
>[  373.734680] [drm:drm_mode_addfb], [FB:23]
>[  373.734794] [drm:intel_update_fbc], 
>[  373.734801] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.734807] [drm:intel_update_fbc], fbc disabled per module param
>[  373.751053] [drm:intel_update_fbc], 
>[  373.751061] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.751067] [drm:intel_update_fbc], fbc disabled per module param
>[  373.753875] [drm:drm_mode_addfb], [FB:24]
>[  373.784333] [drm:intel_update_fbc], 
>[  373.784341] [drm:intel_update_fbc], fbc set to per-chip default
>[  373.784347] [drm:intel_update_fbc], fbc disabled per module param
>[  374.450641] [drm:intel_crtc_cursor_set], 
>[  374.450650] [drm:intel_crtc_cursor_set], cursor off
>[  374.452436] [drm:drm_mode_addfb], [FB:23]
>[  374.477133] [drm:intel_crtc_cursor_set], 
>[  374.477459] [drm:intel_crtc_cursor_set], 
>[  374.477466] [drm:intel_crtc_cursor_set], cursor off
>[  374.480773] [drm:intel_update_fbc], 
>[  374.480780] [drm:intel_update_fbc], fbc set to per-chip default
>[  374.480786] [drm:intel_update_fbc], fbc disabled per module param
>[  374.480844] [drm:drm_mode_addfb], [FB:24]
>[  374.497356] [drm:intel_update_fbc], 
>[  374.497365] [drm:intel_update_fbc], fbc set to per-chip default
>[  374.497370] [drm:intel_update_fbc], fbc disabled per module param
>[  374.497422] [drm:drm_mode_addfb], [FB:23]
>[  374.513793] [drm:intel_update_fbc], 
>[  374.513800] [drm:intel_update_fbc], fbc set to per-chip default
>[  374.513806] [drm:intel_update_fbc], fbc disabled per module param
>[  375.431395] [drm:drm_crtc_helper_set_config], 
>[  375.431400] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  375.431408] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  375.431411] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  375.431414] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  375.431421] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  375.431427] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  375.431430] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.431434] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  375.431437] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  375.431441] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  375.431443] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  375.431453] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  375.431940] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  375.431943] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  375.444215] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  375.444226] [drm:intel_update_fbc], 
>[  375.444231] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  375.444238] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  375.444244] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:21:1280x800]
>[  375.444252] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  375.468261] [drm:intel_update_fbc], 
>[  375.468266] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  375.468276] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  375.468282] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  375.468290] [drm:drm_crtc_helper_set_config], 
>[  375.468293] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  375.468305] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.468311] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  375.468318] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  375.524193] [drm:intel_wait_for_vblank], vblank wait timed out
>[  375.524199] [drm:intel_update_fbc], 
>[  375.524202] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  375.524213] [drm:drm_crtc_helper_set_config], 
>[  375.524217] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  375.524228] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.524234] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  375.524240] [drm:drm_crtc_helper_set_config], 
>[  375.524244] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  375.524253] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.524258] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  375.524278] [drm:drm_crtc_helper_set_config], 
>[  375.524282] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  375.524291] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.524297] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  375.524302] [drm:drm_crtc_helper_set_config], 
>[  375.524306] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  375.524315] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  375.524320] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  376.034784] [drm:drm_mode_setcrtc], [CRTC:4]
>[  376.034802] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[  376.034810] [drm:drm_crtc_helper_set_config], 
>[  376.034816] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:23] #connectors=1 (x y) (0 0)
>[  376.034832] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  376.034840] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  376.034852] [drm:i9xx_update_plane], Writing base 0F707000 00000000 0 0 5120
>[  376.088081] [drm:intel_wait_for_vblank], vblank wait timed out
>[  376.088091] [drm:intel_update_fbc], 
>[  376.088097] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  376.104069] [drm:intel_update_fbc], 
>[  376.104076] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  376.104085] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  376.104145] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  376.104154] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  376.104177] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  376.104185] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  376.104200] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  376.104573] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  376.104583] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  376.112076] [drm:intel_crt_detect], CRT detected via hotplug
>[  376.264320] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  376.264430] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  376.264437] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  376.264450] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  376.264461] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  376.264473] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  376.264484] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  376.264496] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  376.264507] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  376.264518] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  376.264529] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  376.264541] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  376.264552] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  376.264564] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  376.264575] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  376.264586] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  376.264598] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  376.264609] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  376.264620] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  376.264631] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  376.264643] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  376.264654] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  376.264665] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  376.264676] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  376.264687] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  376.264698] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  376.264709] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  376.264720] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  376.264731] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  376.264742] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  376.264753] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  376.264764] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  376.264776] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  376.264787] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  376.264798] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  376.264808] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  376.264819] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  376.264830] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  376.264841] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  376.264852] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  376.264862] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  376.264873] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  376.264884] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  376.264895] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  376.264906] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  376.264917] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  376.264927] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  376.264953] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  376.293062] [drm:drm_mode_addfb], [FB:24]
>[  376.321179] [drm:drm_mode_addfb], [FB:23]
>[  376.321254] [drm:intel_update_fbc], 
>[  376.321258] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  376.337691] [drm:intel_update_fbc], 
>[  376.337697] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  376.338747] [drm:intel_crtc_cursor_set], 
>[  376.549216] [drm:intel_crtc_cursor_set], 
>[  376.549222] [drm:intel_crtc_cursor_set], cursor off
>[  378.450968] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  378.450982] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  378.451007] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  378.451015] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  378.451031] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  378.451524] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  378.451534] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  378.464202] [drm:intel_crt_detect], CRT detected via hotplug
>[  378.616312] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  378.616420] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  378.616428] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  378.616440] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  378.616452] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  378.616463] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  378.616475] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  378.616486] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  378.616497] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  378.616509] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  378.616520] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  378.616531] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  378.616543] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  378.616554] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  378.616565] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  378.616576] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  378.616588] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  378.616599] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  378.616610] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  378.616622] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  378.616633] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  378.616644] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  378.616655] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  378.616666] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  378.616678] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  378.616689] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  378.616700] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  378.616711] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  378.616722] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  378.616733] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  378.616744] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  378.616755] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  378.616766] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  378.616777] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  378.616788] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  378.616799] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  378.616809] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  378.616820] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  378.616831] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  378.616842] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  378.616853] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  378.616864] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  378.616875] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  378.616886] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  378.616896] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  378.616907] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  378.616918] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  378.617149] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  378.622931] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  378.908217] [drm:intel_update_fbc], 
>[  378.908225] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  378.908234] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  378.910448] [drm:drm_mode_addfb], [FB:24]
>[  378.910489] [drm:drm_crtc_helper_set_config], 
>[  378.910496] [drm:drm_crtc_helper_set_config], [CRTC:4] [NOFB]
>[  378.910505] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  378.911436] [drm:drm_mode_setcrtc], [CRTC:3]
>[  378.911451] [drm:drm_mode_setcrtc], [CONNECTOR:11:VGA-1]
>[  378.911458] [drm:drm_crtc_helper_set_config], 
>[  378.911463] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:24] #connectors=1 (x y) (0 0)
>[  378.911477] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  378.911484] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  378.911496] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  378.911508] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  378.911516] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  378.911522] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  378.911536] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  378.911543] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  378.912196] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  378.912205] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  378.955585] [drm:i9xx_update_plane], Writing base 06709000 00000000 0 0 6656
>[  378.968182] [drm:intel_update_fbc], 
>[  378.968189] [drm:intel_update_fbc], fbc set to per-chip default
>[  378.968195] [drm:intel_update_fbc], fbc disabled per module param
>[  378.968203] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  378.968209] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  378.968217] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  378.968226] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:23:]
>[  378.968235] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  378.968241] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  378.968248] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  378.984230] [drm:intel_update_fbc], 
>[  378.984236] [drm:intel_update_fbc], fbc set to per-chip default
>[  378.984242] [drm:intel_update_fbc], fbc disabled per module param
>[  378.984254] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  378.984261] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  378.984271] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  379.128473] [drm:intel_crtc_cursor_set], 
>[  379.255027] [drm:drm_mode_addfb], [FB:23]
>[  379.281114] [drm:intel_update_fbc], 
>[  379.281120] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.281124] [drm:intel_update_fbc], fbc disabled per module param
>[  379.297047] [drm:drm_mode_addfb], [FB:24]
>[  379.348105] [drm:intel_update_fbc], 
>[  379.348112] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.348116] [drm:intel_update_fbc], fbc disabled per module param
>[  379.451748] [drm:drm_mode_addfb], [FB:23]
>[  379.499188] [drm:drm_mode_addfb], [FB:24]
>[  379.499302] [drm:intel_update_fbc], 
>[  379.499309] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.499315] [drm:intel_update_fbc], fbc disabled per module param
>[  379.515943] [drm:drm_mode_addfb], [FB:23]
>[  379.516083] [drm:intel_update_fbc], 
>[  379.516090] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.516096] [drm:intel_update_fbc], fbc disabled per module param
>[  379.549338] [drm:drm_mode_addfb], [FB:24]
>[  379.549451] [drm:intel_update_fbc], 
>[  379.549458] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.549464] [drm:intel_update_fbc], fbc disabled per module param
>[  379.566019] [drm:intel_update_fbc], 
>[  379.566026] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.566030] [drm:intel_update_fbc], fbc disabled per module param
>[  379.566739] [drm:drm_mode_addfb], [FB:23]
>[  379.599760] [drm:drm_mode_addfb], [FB:24]
>[  379.599874] [drm:intel_update_fbc], 
>[  379.599881] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.599887] [drm:intel_update_fbc], fbc disabled per module param
>[  379.633066] [drm:intel_update_fbc], 
>[  379.633072] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.633076] [drm:intel_update_fbc], fbc disabled per module param
>[  379.633096] [drm:drm_mode_addfb], [FB:23]
>[  379.666602] [drm:intel_update_fbc], 
>[  379.666612] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.666618] [drm:intel_update_fbc], fbc disabled per module param
>[  379.666647] [drm:drm_mode_addfb], [FB:24]
>[  379.700129] [drm:intel_update_fbc], 
>[  379.700139] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.700145] [drm:intel_update_fbc], fbc disabled per module param
>[  379.700766] [drm:drm_mode_addfb], [FB:23]
>[  379.733654] [drm:intel_update_fbc], 
>[  379.733664] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.733671] [drm:intel_update_fbc], fbc disabled per module param
>[  379.734909] [drm:drm_mode_addfb], [FB:24]
>[  379.767179] [drm:intel_update_fbc], 
>[  379.767189] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.767195] [drm:intel_update_fbc], fbc disabled per module param
>[  379.769232] [drm:drm_mode_addfb], [FB:23]
>[  379.800703] [drm:intel_update_fbc], 
>[  379.800713] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.800719] [drm:intel_update_fbc], fbc disabled per module param
>[  379.803429] [drm:drm_mode_addfb], [FB:24]
>[  379.851159] [drm:drm_mode_addfb], [FB:23]
>[  379.851272] [drm:intel_update_fbc], 
>[  379.851279] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.851285] [drm:intel_update_fbc], fbc disabled per module param
>[  379.884739] [drm:drm_mode_addfb], [FB:24]
>[  379.884853] [drm:intel_update_fbc], 
>[  379.884860] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.884866] [drm:intel_update_fbc], fbc disabled per module param
>[  379.918127] [drm:drm_mode_addfb], [FB:23]
>[  379.918241] [drm:intel_update_fbc], 
>[  379.918248] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.918254] [drm:intel_update_fbc], fbc disabled per module param
>[  379.951787] [drm:drm_mode_addfb], [FB:24]
>[  379.951900] [drm:intel_update_fbc], 
>[  379.951907] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.951914] [drm:intel_update_fbc], fbc disabled per module param
>[  379.985199] [drm:drm_mode_addfb], [FB:23]
>[  379.985279] [drm:intel_update_fbc], 
>[  379.985285] [drm:intel_update_fbc], fbc set to per-chip default
>[  379.985292] [drm:intel_update_fbc], fbc disabled per module param
>[  380.018774] [drm:intel_update_fbc], 
>[  380.018781] [drm:intel_update_fbc], fbc set to per-chip default
>[  380.018786] [drm:intel_update_fbc], fbc disabled per module param
>[  381.289074] [drm:intel_crtc_cursor_set], 
>[  381.289083] [drm:intel_crtc_cursor_set], cursor off
>[  382.640196] [drm:intel_crt_detect], CRT detected via hotplug
>[  382.640207] [drm:output_poll_execute], [CONNECTOR:11:VGA-1] status updated from 1 to 1
>[  383.339337] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  383.339351] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  383.339380] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  383.339388] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  383.339404] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  383.339894] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  383.339904] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  383.360206] [drm:intel_crt_detect], CRT detected via hotplug
>[  383.512296] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  383.512405] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  383.512413] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  383.512426] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  383.512437] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  383.512449] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  383.512461] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  383.512472] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  383.512484] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  383.512495] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  383.512506] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  383.512518] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  383.512529] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  383.512541] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  383.512552] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  383.512564] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  383.512575] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  383.512586] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  383.512598] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  383.512609] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  383.512620] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  383.512632] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  383.512643] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  383.512655] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  383.512666] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  383.512677] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  383.512688] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  383.512700] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  383.512711] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  383.512722] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  383.512733] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  383.512745] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  383.512756] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  383.512767] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  383.512778] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  383.512789] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  383.512800] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  383.512811] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  383.512822] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  383.512833] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  383.512843] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  383.512854] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  383.512865] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  383.512876] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  383.512887] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  383.512898] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  383.512909] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  383.513152] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  383.560214] [drm:intel_update_fbc], 
>[  383.560223] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.560229] [drm:intel_update_fbc], fbc disabled per module param
>[  383.560237] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  383.560244] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  383.560252] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  383.565796] [drm:drm_mode_addfb], [FB:24]
>[  383.565833] [drm:drm_crtc_helper_set_config], 
>[  383.565838] [drm:drm_crtc_helper_set_config], [CRTC:3] [NOFB]
>[  383.565845] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  383.567043] [drm:drm_mode_setcrtc], [CRTC:4]
>[  383.567054] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[  383.567059] [drm:drm_crtc_helper_set_config], 
>[  383.567063] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:24] #connectors=1 (x y) (0 0)
>[  383.567074] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  383.567079] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  383.567084] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  383.567089] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  383.567094] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  383.567099] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 68940 1280 1301 1333 1408 800 803 808 816 0x0 0xa
>[  383.567111] [drm:drm_crtc_helper_set_mode], [CRTC:4]
>[  383.567642] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  383.567647] [drm:drm_mode_debug_printmodeline], Modeline 23:"" 0 68940 1280 1301 1333 1408 800 803 808 816 0x0 0xa
>[  383.594361] [drm:i9xx_update_plane], Writing base 02E72000 00000000 0 0 5120
>[  383.594370] [drm:intel_update_fbc], 
>[  383.594374] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.594378] [drm:intel_update_fbc], fbc disabled per module param
>[  383.594383] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  383.594387] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  383.594391] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  383.594398] [drm:drm_crtc_helper_set_mode], [ENCODER:6:LVDS-6] set [MODE:23:]
>[  383.594403] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  383.594406] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  383.594411] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  383.608232] [drm:intel_update_fbc], 
>[  383.608239] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.608246] [drm:intel_update_fbc], fbc disabled per module param
>[  383.616207] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  383.616220] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  383.616228] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:5:LVDS-1] set DPMS on
>[  383.616238] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  383.742451] [drm:drm_mode_addfb], [FB:23]
>[  383.766663] [drm:intel_update_fbc], 
>[  383.766671] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.766675] [drm:intel_update_fbc], fbc disabled per module param
>[  383.775967] [drm:drm_mode_addfb], [FB:24]
>[  383.799820] [drm:intel_update_fbc], 
>[  383.799827] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.799831] [drm:intel_update_fbc], fbc disabled per module param
>[  383.809345] [drm:intel_crtc_cursor_set], 
>[  383.869456] [drm:drm_mode_addfb], [FB:23]
>[  383.882841] [drm:intel_update_fbc], 
>[  383.882854] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.882858] [drm:intel_update_fbc], fbc disabled per module param
>[  383.883028] [drm:drm_mode_addfb], [FB:24]
>[  383.899323] [drm:intel_update_fbc], 
>[  383.899330] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.899333] [drm:intel_update_fbc], fbc disabled per module param
>[  383.961819] [drm:drm_mode_addfb], [FB:23]
>[  383.982221] [drm:intel_update_fbc], 
>[  383.982230] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.982234] [drm:intel_update_fbc], fbc disabled per module param
>[  383.984364] [drm:drm_mode_addfb], [FB:24]
>[  383.998805] [drm:intel_update_fbc], 
>[  383.998815] [drm:intel_update_fbc], fbc set to per-chip default
>[  383.998821] [drm:intel_update_fbc], fbc disabled per module param
>[  384.001584] [drm:drm_mode_addfb], [FB:23]
>[  384.015387] [drm:intel_update_fbc], 
>[  384.015398] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.015404] [drm:intel_update_fbc], fbc disabled per module param
>[  384.018334] [drm:drm_mode_addfb], [FB:24]
>[  384.031969] [drm:intel_update_fbc], 
>[  384.031978] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.031984] [drm:intel_update_fbc], fbc disabled per module param
>[  384.035056] [drm:drm_mode_addfb], [FB:23]
>[  384.048544] [drm:intel_update_fbc], 
>[  384.048553] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.048559] [drm:intel_update_fbc], fbc disabled per module param
>[  384.051765] [drm:drm_mode_addfb], [FB:24]
>[  384.065126] [drm:intel_update_fbc], 
>[  384.065135] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.065142] [drm:intel_update_fbc], fbc disabled per module param
>[  384.068534] [drm:drm_mode_addfb], [FB:23]
>[  384.081711] [drm:intel_update_fbc], 
>[  384.081721] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.081727] [drm:intel_update_fbc], fbc disabled per module param
>[  384.085399] [drm:drm_mode_addfb], [FB:24]
>[  384.098531] [drm:intel_update_fbc], 
>[  384.098539] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.098545] [drm:intel_update_fbc], fbc disabled per module param
>[  384.109099] [drm:drm_mode_addfb], [FB:23]
>[  384.131654] [drm:drm_mode_addfb], [FB:24]
>[  384.131737] [drm:intel_update_fbc], 
>[  384.131744] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.131750] [drm:intel_update_fbc], fbc disabled per module param
>[  384.155489] [drm:intel_update_fbc], 
>[  384.155500] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.155506] [drm:intel_update_fbc], fbc disabled per module param
>[  384.155585] [drm:drm_mode_addfb], [FB:23]
>[  384.181407] [drm:drm_mode_addfb], [FB:24]
>[  384.181519] [drm:intel_update_fbc], 
>[  384.181526] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.181532] [drm:intel_update_fbc], fbc disabled per module param
>[  384.197782] [drm:intel_update_fbc], 
>[  384.197792] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.197798] [drm:intel_update_fbc], fbc disabled per module param
>[  384.197834] [drm:drm_mode_addfb], [FB:23]
>[  384.231010] [drm:drm_mode_addfb], [FB:24]
>[  384.231126] [drm:intel_update_fbc], 
>[  384.231133] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.231139] [drm:intel_update_fbc], fbc disabled per module param
>[  384.247728] [drm:drm_mode_addfb], [FB:23]
>[  384.247840] [drm:intel_update_fbc], 
>[  384.247847] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.247853] [drm:intel_update_fbc], fbc disabled per module param
>[  384.264119] [drm:intel_update_fbc], 
>[  384.264128] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.264134] [drm:intel_update_fbc], fbc disabled per module param
>[  384.264153] [drm:drm_mode_addfb], [FB:24]
>[  384.297469] [drm:drm_mode_addfb], [FB:23]
>[  384.297581] [drm:intel_update_fbc], 
>[  384.297588] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.297594] [drm:intel_update_fbc], fbc disabled per module param
>[  384.313926] [drm:drm_mode_addfb], [FB:24]
>[  384.314039] [drm:intel_update_fbc], 
>[  384.314047] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.314053] [drm:intel_update_fbc], fbc disabled per module param
>[  384.330421] [drm:intel_update_fbc], 
>[  384.330430] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.330436] [drm:intel_update_fbc], fbc disabled per module param
>[  384.330965] [drm:drm_mode_addfb], [FB:23]
>[  384.363802] [drm:drm_mode_addfb], [FB:24]
>[  384.363916] [drm:intel_update_fbc], 
>[  384.363924] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.363930] [drm:intel_update_fbc], fbc disabled per module param
>[  384.380377] [drm:drm_mode_addfb], [FB:23]
>[  384.380489] [drm:intel_update_fbc], 
>[  384.380496] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.380502] [drm:intel_update_fbc], fbc disabled per module param
>[  384.396741] [drm:intel_update_fbc], 
>[  384.396749] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.396755] [drm:intel_update_fbc], fbc disabled per module param
>[  384.399005] [drm:drm_mode_addfb], [FB:24]
>[  384.430023] [drm:drm_mode_addfb], [FB:23]
>[  384.430136] [drm:intel_update_fbc], 
>[  384.430143] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.430149] [drm:intel_update_fbc], fbc disabled per module param
>[  384.446696] [drm:drm_mode_addfb], [FB:24]
>[  384.446807] [drm:intel_update_fbc], 
>[  384.446815] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.446821] [drm:intel_update_fbc], fbc disabled per module param
>[  384.479841] [drm:drm_mode_addfb], [FB:23]
>[  384.479951] [drm:intel_update_fbc], 
>[  384.479958] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.479964] [drm:intel_update_fbc], fbc disabled per module param
>[  384.496429] [drm:drm_mode_addfb], [FB:24]
>[  384.496509] [drm:intel_update_fbc], 
>[  384.496515] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.496521] [drm:intel_update_fbc], fbc disabled per module param
>[  384.512823] [drm:intel_update_fbc], 
>[  384.512829] [drm:intel_update_fbc], fbc set to per-chip default
>[  384.512835] [drm:intel_update_fbc], fbc disabled per module param
>[  385.190409] [drm:intel_crtc_cursor_set], 
>[  385.190418] [drm:intel_crtc_cursor_set], cursor off
>[  387.477943] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  387.477957] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  387.477982] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  387.477991] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  387.478006] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  387.478369] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  387.478378] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  387.492197] [drm:intel_crt_detect], CRT detected via hotplug
>[  387.644321] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  387.644432] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  387.644440] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  387.644452] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  387.644464] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  387.644475] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  387.644487] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  387.644498] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  387.644509] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  387.644520] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  387.644532] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  387.644543] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  387.644554] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  387.644566] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  387.644577] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  387.644588] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  387.644599] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  387.644611] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  387.644622] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  387.644633] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  387.644644] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  387.644655] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  387.644666] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  387.644677] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  387.644688] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  387.644699] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  387.644711] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  387.644722] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  387.644733] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  387.644744] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  387.644755] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  387.644767] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  387.644777] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  387.644788] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  387.644799] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  387.644810] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  387.644821] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  387.644832] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  387.644843] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  387.644853] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  387.644864] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  387.644875] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  387.644886] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  387.644896] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  387.644907] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  387.644918] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  387.644929] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  387.645155] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  387.652050] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  387.932069] [drm:intel_update_fbc], 
>[  387.932077] [drm:intel_update_fbc], fbc set to per-chip default
>[  387.932083] [drm:intel_update_fbc], fbc disabled per module param
>[  387.932090] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  387.932097] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  387.932105] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  387.946758] [drm:drm_mode_addfb], [FB:23]
>[  387.946797] [drm:drm_crtc_helper_set_config], 
>[  387.946804] [drm:drm_crtc_helper_set_config], [CRTC:4] [NOFB]
>[  387.946813] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  387.948202] [drm:drm_mode_setcrtc], [CRTC:3]
>[  387.948218] [drm:drm_mode_setcrtc], [CONNECTOR:11:VGA-1]
>[  387.948225] [drm:drm_crtc_helper_set_config], 
>[  387.948230] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:23] #connectors=1 (x y) (0 0)
>[  387.948243] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  387.948250] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  387.948256] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  387.948264] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  387.948272] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  387.948279] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  387.948293] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  387.948300] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  387.948803] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  387.948807] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  387.991532] [drm:i9xx_update_plane], Writing base 010A8000 00000000 0 0 6656
>[  387.991545] [drm:intel_update_fbc], 
>[  387.991551] [drm:intel_update_fbc], fbc set to per-chip default
>[  387.991557] [drm:intel_update_fbc], fbc disabled per module param
>[  387.991565] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  387.991572] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  387.991579] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  387.991588] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:24:]
>[  387.991597] [drm:i965_update_wm], self-refresh entries: 100, wm: 412
>[  387.991604] [drm:i965_update_wm], self-refresh watermark: display plane 412 cursor 32
>[  387.991611] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 412
>[  388.000104] [drm:intel_update_fbc], 
>[  388.000112] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.000118] [drm:intel_update_fbc], fbc disabled per module param
>[  388.000130] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  388.000138] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  388.000148] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  388.163100] [drm:intel_crtc_cursor_set], 
>[  388.255929] [drm:drm_mode_addfb], [FB:24]
>[  388.284112] [drm:intel_update_fbc], 
>[  388.284119] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.284122] [drm:intel_update_fbc], fbc disabled per module param
>[  388.297474] [drm:drm_mode_addfb], [FB:23]
>[  388.334433] [drm:intel_update_fbc], 
>[  388.334444] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.334447] [drm:intel_update_fbc], fbc disabled per module param
>[  388.488332] [drm:drm_mode_addfb], [FB:24]
>[  388.535783] [drm:drm_mode_addfb], [FB:23]
>[  388.535891] [drm:intel_update_fbc], 
>[  388.535896] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.535901] [drm:intel_update_fbc], fbc disabled per module param
>[  388.561954] [drm:intel_update_fbc], 
>[  388.561964] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.561970] [drm:intel_update_fbc], fbc disabled per module param
>[  388.562809] [drm:drm_mode_addfb], [FB:24]
>[  388.602781] [drm:drm_mode_addfb], [FB:23]
>[  388.602895] [drm:intel_update_fbc], 
>[  388.602902] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.602908] [drm:intel_update_fbc], fbc disabled per module param
>[  388.636358] [drm:drm_mode_addfb], [FB:24]
>[  388.636473] [drm:intel_update_fbc], 
>[  388.636480] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.636486] [drm:intel_update_fbc], fbc disabled per module param
>[  388.669744] [drm:drm_mode_addfb], [FB:23]
>[  388.669858] [drm:intel_update_fbc], 
>[  388.669865] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.669871] [drm:intel_update_fbc], fbc disabled per module param
>[  388.686432] [drm:intel_update_fbc], 
>[  388.686440] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.686446] [drm:intel_update_fbc], fbc disabled per module param
>[  388.689357] [drm:drm_mode_addfb], [FB:24]
>[  388.719961] [drm:intel_update_fbc], 
>[  388.719971] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.719977] [drm:intel_update_fbc], fbc disabled per module param
>[  388.722310] [drm:drm_mode_addfb], [FB:23]
>[  388.753487] [drm:intel_update_fbc], 
>[  388.753497] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.753503] [drm:intel_update_fbc], fbc disabled per module param
>[  388.754911] [drm:drm_mode_addfb], [FB:24]
>[  388.787013] [drm:intel_update_fbc], 
>[  388.787024] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.787030] [drm:intel_update_fbc], fbc disabled per module param
>[  388.787734] [drm:drm_mode_addfb], [FB:23]
>[  388.820558] [drm:intel_update_fbc], 
>[  388.820569] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.820575] [drm:intel_update_fbc], fbc disabled per module param
>[  388.820594] [drm:drm_mode_addfb], [FB:24]
>[  388.854074] [drm:intel_update_fbc], 
>[  388.854084] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.854090] [drm:intel_update_fbc], fbc disabled per module param
>[  388.854122] [drm:drm_mode_addfb], [FB:23]
>[  388.887604] [drm:intel_update_fbc], 
>[  388.887615] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.887621] [drm:intel_update_fbc], fbc disabled per module param
>[  388.887664] [drm:drm_mode_addfb], [FB:24]
>[  388.921330] [drm:drm_mode_addfb], [FB:23]
>[  388.921444] [drm:intel_update_fbc], 
>[  388.921451] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.921457] [drm:intel_update_fbc], fbc disabled per module param
>[  388.954753] [drm:drm_mode_addfb], [FB:24]
>[  388.954866] [drm:intel_update_fbc], 
>[  388.954873] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.954879] [drm:intel_update_fbc], fbc disabled per module param
>[  388.988384] [drm:drm_mode_addfb], [FB:23]
>[  388.988498] [drm:intel_update_fbc], 
>[  388.988505] [drm:intel_update_fbc], fbc set to per-chip default
>[  388.988511] [drm:intel_update_fbc], fbc disabled per module param
>[  389.021897] [drm:drm_mode_addfb], [FB:24]
>[  389.021975] [drm:intel_update_fbc], 
>[  389.021982] [drm:intel_update_fbc], fbc set to per-chip default
>[  389.021988] [drm:intel_update_fbc], fbc disabled per module param
>[  389.055368] [drm:intel_update_fbc], 
>[  389.055374] [drm:intel_update_fbc], fbc set to per-chip default
>[  389.055379] [drm:intel_update_fbc], fbc disabled per module param
>[  390.351883] [drm:intel_crtc_cursor_set], 
>[  390.351892] [drm:intel_crtc_cursor_set], cursor off
>[  390.361285] [drm:drm_mode_addfb], [FB:23]
>[  390.396500] [drm:intel_update_fbc], 
>[  390.396508] [drm:intel_update_fbc], fbc set to per-chip default
>[  390.396514] [drm:intel_update_fbc], fbc disabled per module param
>[  390.468578] [drm:intel_crtc_cursor_set], 
>[  390.469163] [drm:intel_crtc_cursor_set], 
>[  390.469171] [drm:intel_crtc_cursor_set], cursor off
>[  390.470652] [drm:drm_mode_addfb], [FB:24]
>[  390.513809] [drm:drm_mode_addfb], [FB:23]
>[  390.513888] [drm:intel_update_fbc], 
>[  390.513894] [drm:intel_update_fbc], fbc set to per-chip default
>[  390.513901] [drm:intel_update_fbc], fbc disabled per module param
>[  390.530538] [drm:intel_update_fbc], 
>[  390.530544] [drm:intel_update_fbc], fbc set to per-chip default
>[  390.530550] [drm:intel_update_fbc], fbc disabled per module param
>[  391.227501] [drm:drm_crtc_helper_set_config], 
>[  391.227505] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  391.227515] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  391.227518] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  391.227524] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  391.227531] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  391.227535] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  391.227538] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  391.227548] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  391.227553] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  391.256212] [drm:intel_update_fbc], 
>[  391.256217] [drm:intel_update_fbc], fbc set to per-chip default
>[  391.256221] [drm:intel_update_fbc], fbc disabled per module param
>[  391.256227] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  391.256232] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  391.256237] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  391.256846] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  391.256851] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  391.272216] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  391.288209] [drm:intel_update_fbc], 
>[  391.288214] [drm:intel_update_fbc], fbc set to per-chip default
>[  391.288218] [drm:intel_update_fbc], fbc disabled per module param
>[  391.288222] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  391.288227] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  391.288233] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  391.288239] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:21:1280x800]
>[  391.288246] [drm:i965_update_wm], self-refresh entries: 80, wm: 432
>[  391.288251] [drm:i965_update_wm], self-refresh watermark: display plane 432 cursor 32
>[  391.288256] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 432
>[  391.296245] [drm:intel_update_fbc], 
>[  391.296250] [drm:intel_update_fbc], fbc set to per-chip default
>[  391.296255] [drm:intel_update_fbc], fbc disabled per module param
>[  391.296263] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  391.296269] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  391.296275] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  391.296285] [drm:drm_crtc_helper_set_config], 
>[  391.296288] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  391.296298] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  391.296303] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  391.296307] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  391.296312] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  391.296319] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  391.296324] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  391.296329] [drm:drm_mode_debug_printmodeline], Modeline 8:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  391.296342] [drm:drm_crtc_helper_set_mode], [CRTC:4]
>[  391.296941] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  391.296946] [drm:drm_mode_debug_printmodeline], Modeline 8:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  391.320202] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  391.320211] [drm:intel_update_fbc], 
>[  391.320215] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  391.320220] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  391.320227] [drm:drm_crtc_helper_set_mode], [ENCODER:6:LVDS-6] set [MODE:8:1280x800]
>[  391.320233] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  391.336227] [drm:intel_update_fbc], 
>[  391.336232] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  391.344198] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  391.344206] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  391.344212] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:5:LVDS-1] set DPMS on
>[  391.344219] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  391.344226] [drm:drm_crtc_helper_set_config], 
>[  391.344230] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  391.344241] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  391.344247] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  391.344253] [drm:drm_crtc_helper_set_config], 
>[  391.344257] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  391.344265] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  391.344271] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  391.344291] [drm:drm_crtc_helper_set_config], 
>[  391.344295] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  391.344304] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  391.344310] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  391.344315] [drm:drm_crtc_helper_set_config], 
>[  391.344319] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  391.344327] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  391.344333] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  392.019931] [drm:drm_mode_setcrtc], [CRTC:3]
>[  392.019947] [drm:drm_mode_setcrtc], [CONNECTOR:11:VGA-1]
>[  392.019954] [drm:drm_crtc_helper_set_config], 
>[  392.019960] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:23] #connectors=1 (x y) (0 0)
>[  392.019974] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  392.019980] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  392.019992] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  392.020038] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  392.020047] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  392.020054] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  392.020060] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  392.020074] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  392.036059] [drm:intel_update_fbc], 
>[  392.036068] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.036078] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  392.036653] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  392.036657] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  392.060071] [drm:i9xx_update_plane], Writing base 08C5D000 00000000 0 0 6656
>[  392.076079] [drm:intel_update_fbc], 
>[  392.076086] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.076095] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  392.076104] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:24:]
>[  392.076113] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  392.092094] [drm:intel_update_fbc], 
>[  392.092100] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.092113] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  392.092121] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  392.097284] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  392.376049] [drm:intel_update_fbc], 
>[  392.376058] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.376066] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  392.376142] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  392.376152] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  392.376177] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  392.376185] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  392.376201] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  392.376562] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  392.376568] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  392.392035] [drm:intel_crt_detect], CRT detected via hotplug
>[  392.544163] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  392.544278] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  392.544287] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  392.544299] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  392.544311] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  392.544323] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  392.544335] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  392.544346] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  392.544358] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  392.544369] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  392.544380] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  392.544391] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  392.544403] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  392.544414] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  392.544425] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  392.544437] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  392.544448] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  392.544459] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  392.544470] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  392.544482] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  392.544493] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  392.544505] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  392.544516] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  392.544527] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  392.544538] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  392.544549] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  392.544560] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  392.544571] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  392.544583] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  392.544594] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  392.544605] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  392.544616] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  392.544627] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  392.544638] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  392.544649] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  392.544660] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  392.544671] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  392.544682] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  392.544692] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  392.544703] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  392.544714] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  392.544725] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  392.544736] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  392.544746] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  392.544757] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  392.544768] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  392.544779] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  392.544831] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  392.569238] [drm:drm_mode_addfb], [FB:24]
>[  392.623416] [drm:intel_update_fbc], 
>[  392.623423] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.623451] [drm:drm_mode_addfb], [FB:23]
>[  392.656945] [drm:intel_update_fbc], 
>[  392.656951] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  392.674321] [drm:intel_crtc_cursor_set], 
>[  392.674608] [drm:intel_crtc_cursor_set], 
>[  392.674613] [drm:intel_crtc_cursor_set], cursor off
>[  393.352190] [drm:intel_crt_detect], CRT detected via hotplug
>[  393.352201] [drm:output_poll_execute], [CONNECTOR:11:VGA-1] status updated from 1 to 1
>[  396.347674] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  396.347683] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  396.347702] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  396.347707] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  396.347717] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  396.347948] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  396.347953] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  396.368236] [drm:intel_crt_detect], CRT detected via hotplug
>[  396.520306] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  396.520416] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] probed modes :
>[  396.520424] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  396.520436] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  396.520448] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  396.520460] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  396.520472] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  396.520483] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  396.520495] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  396.520506] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  396.520517] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  396.520529] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  396.520540] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  396.520551] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  396.520563] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  396.520574] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  396.520585] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  396.520597] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  396.520608] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  396.520619] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  396.520631] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  396.520642] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  396.520653] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  396.520664] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  396.520675] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  396.520687] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  396.520698] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  396.520709] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  396.520720] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  396.520731] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  396.520742] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  396.520753] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  396.520764] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  396.520775] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  396.520786] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  396.520797] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  396.520808] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  396.520819] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  396.520830] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  396.520841] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  396.520852] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  396.520862] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  396.520873] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  396.520884] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  396.520895] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  396.520906] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  396.520917] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  396.521149] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  396.584218] [drm:intel_update_fbc], 
>[  396.584227] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  396.584236] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  396.585709] [drm:drm_mode_addfb], [FB:24]
>[  396.585756] [drm:drm_crtc_helper_set_config], 
>[  396.585763] [drm:drm_crtc_helper_set_config], [CRTC:3] [NOFB]
>[  396.586849] [drm:drm_mode_setcrtc], [CRTC:4]
>[  396.586865] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[  396.586872] [drm:drm_crtc_helper_set_config], 
>[  396.586877] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:24] #connectors=1 (x y) (0 0)
>[  396.586892] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  396.597011] [drm:i9xx_update_plane], Writing base 020A8000 00000000 0 0 5120
>[  396.652195] [drm:intel_wait_for_vblank], vblank wait timed out
>[  396.652202] [drm:intel_update_fbc], 
>[  396.652209] [drm:intel_update_fbc], fbc set to per-chip default
>[  396.652214] [drm:intel_update_fbc], fbc disabled per module param
>[  403.536186] [drm:i915_hangcheck_hung] *ERROR* Hangcheck timer elapsed... GPU hung
>[  403.536196] [drm] capturing error event; look for more information in /debug/dri/0/i915_error_state
>[  403.537152] [drm:kick_ring] *ERROR* Kicking stuck wait on render ring
>[  403.537215] [drm:i915_error_work_func], resetting chip
>[  404.040038] [drm:i915_reset] *ERROR* Failed to reset chip.
>[  404.205059] [drm:drm_crtc_helper_set_config], 
>[  404.205064] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  404.205073] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  404.205076] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  404.205079] [drm:drm_mode_debug_printmodeline], Modeline 24:"" 0 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x0 0x5
>[  404.205085] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  404.205092] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  404.205095] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.205099] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  404.205102] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.205106] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  404.205108] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  404.205118] [drm:drm_crtc_helper_set_mode], [CRTC:3]
>[  404.205605] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  404.205608] [drm:drm_mode_debug_printmodeline], Modeline 21:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  404.205615] ------------[ cut here ]------------
>[  404.205642] WARNING: at /home/apw/COD/linux/drivers/gpu/drm/i915/intel_display.c:906 intel_enable_pipe+0x144/0x190 [i915]()
>[  404.205645] Hardware name: F80L                
>[  404.205647] PLL state assertion failure (expected on, current off)
>[  404.205649] Modules linked in: rfcomm bnep parport_pc ppdev arc4 snd_hda_codec_realtek ath9k mac80211 ath9k_common ath9k_hw ath snd_hda_intel snd_hda_codec i915 coretemp snd_hwdep joydev btusb snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq cfg80211 bluetooth drm_kms_helper asus_laptop sparse_keymap microcode snd_timer drm snd_seq_device psmouse mac_hid serio_raw input_polldev snd i2c_algo_bit video soundcore snd_page_alloc lp parport hid_a4tech usbhid hid r8169
>[  404.205684] Pid: 1479, comm: Xorg Not tainted 3.4.0-994-generic #201205140405
>[  404.205687] Call Trace:
>[  404.205695]  [<c1035832>] warn_slowpath_common+0x72/0xa0
>[  404.205713]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.205731]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.205736]  [<c1035903>] warn_slowpath_fmt+0x33/0x40
>[  404.205753]  [<f83c6464>] intel_enable_pipe+0x144/0x190 [i915]
>[  404.205771]  [<f83c8357>] i9xx_crtc_mode_set+0x4b7/0x7a0 [i915]
>[  404.205787]  [<f83a80ec>] ? i915_pipe_enabled+0x1c/0x30 [i915]
>[  404.205804]  [<f84dfa39>] ? drm_vblank_get+0x69/0x150 [drm]
>[  404.205824]  [<f83c69e8>] intel_crtc_mode_set+0x58/0x90 [i915]
>[  404.205832]  [<f8432bed>] drm_crtc_helper_set_mode+0x2ed/0x4d0 [drm_kms_helper]
>[  404.205837]  [<c12acc6f>] ? number+0x37f/0x3a0
>[  404.205845]  [<f8433c7e>] drm_crtc_helper_set_config+0x92e/0x9d0 [drm_kms_helper]
>[  404.205853]  [<f8431c94>] drm_fb_helper_set_par+0x64/0xd0 [drm_kms_helper]
>[  404.205858]  [<c12ea3b9>] fb_set_var+0x189/0x3d0
>[  404.205865]  [<c11c3859>] ? ext4_da_write_end+0xb9/0x310
>[  404.205871]  [<c1069d3d>] ? update_curr+0x24d/0x2a0
>[  404.205875]  [<c106a93f>] ? enqueue_sleeper+0x21f/0x2f0
>[  404.205879]  [<c12f48ae>] fbcon_blank+0x1fe/0x300
>[  404.205886]  [<c135622c>] do_unblank_screen+0xac/0x1c0
>[  404.205890]  [<c157e64f>] ? _raw_spin_lock_irqsave+0x2f/0x50
>[  404.205894]  [<c134bacc>] complete_change_console+0x5c/0x100
>[  404.205898]  [<c134ccec>] vt_ioctl+0x106c/0x1160
>[  404.205912]  [<f84e23a0>] ? drm_master_put+0x30/0x30 [drm]
>[  404.205918]  [<c10b9c80>] ? call_rcu_bh+0x20/0x20
>[  404.205922]  [<c134bc80>] ? vt_event_wait_ioctl+0x80/0x80
>[  404.205926]  [<c134198c>] tty_ioctl+0x22c/0x860
>[  404.205931]  [<c1171dc7>] ? fsnotify+0x197/0x2b0
>[  404.205934]  [<c157e61d>] ? _raw_spin_lock+0xd/0x10
>[  404.205938]  [<c1341760>] ? tiocspgrp+0x130/0x130
>[  404.205942]  [<c114b5c6>] do_vfs_ioctl+0x86/0x2d0
>[  404.205946]  [<c113af70>] ? do_sync_readv_writev+0xe0/0xe0
>[  404.205950]  [<c114b887>] sys_ioctl+0x77/0x80
>[  404.205954]  [<c158569f>] sysenter_do_call+0x12/0x28
>[  404.205957] ---[ end trace 94217516ae9061a5 ]---
>[  404.260098] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.316103] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.316116] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  404.316122] [drm:intel_update_fbc], 
>[  404.316125] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  404.316130] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  404.316138] [drm:drm_crtc_helper_set_mode], [ENCODER:12:DAC-12] set [MODE:21:1280x800]
>[  404.316144] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  404.316597] ------------[ cut here ]------------
>[  404.316629] WARNING: at /home/apw/COD/linux/drivers/gpu/drm/i915/intel_display.c:906 intel_enable_pipe+0x144/0x190 [i915]()
>[  404.316632] Hardware name: F80L                
>[  404.316634] PLL state assertion failure (expected on, current off)
>[  404.316636] Modules linked in: rfcomm bnep parport_pc ppdev arc4 snd_hda_codec_realtek ath9k mac80211 ath9k_common ath9k_hw ath snd_hda_intel snd_hda_codec i915 coretemp snd_hwdep joydev btusb snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq cfg80211 bluetooth drm_kms_helper asus_laptop sparse_keymap microcode snd_timer drm snd_seq_device psmouse mac_hid serio_raw input_polldev snd i2c_algo_bit video soundcore snd_page_alloc lp parport hid_a4tech usbhid hid r8169
>[  404.316675] Pid: 1479, comm: Xorg Tainted: G        W    3.4.0-994-generic #201205140405
>[  404.316677] Call Trace:
>[  404.316690]  [<c1035832>] warn_slowpath_common+0x72/0xa0
>[  404.316708]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.316726]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.316730]  [<c1035903>] warn_slowpath_fmt+0x33/0x40
>[  404.316748]  [<f83c6464>] intel_enable_pipe+0x144/0x190 [i915]
>[  404.316767]  [<f83c658d>] i9xx_crtc_enable+0x5d/0xa0 [i915]
>[  404.316785]  [<f83c65dd>] i9xx_crtc_commit+0xd/0x10 [i915]
>[  404.316796]  [<f8432c40>] drm_crtc_helper_set_mode+0x340/0x4d0 [drm_kms_helper]
>[  404.316808]  [<f8433c7e>] drm_crtc_helper_set_config+0x92e/0x9d0 [drm_kms_helper]
>[  404.316815]  [<f8431c94>] drm_fb_helper_set_par+0x64/0xd0 [drm_kms_helper]
>[  404.316824]  [<c12ea3b9>] fb_set_var+0x189/0x3d0
>[  404.316834]  [<c11c3859>] ? ext4_da_write_end+0xb9/0x310
>[  404.316843]  [<c1069d3d>] ? update_curr+0x24d/0x2a0
>[  404.316847]  [<c106a93f>] ? enqueue_sleeper+0x21f/0x2f0
>[  404.316852]  [<c12f48ae>] fbcon_blank+0x1fe/0x300
>[  404.316860]  [<c135622c>] do_unblank_screen+0xac/0x1c0
>[  404.316865]  [<c157e64f>] ? _raw_spin_lock_irqsave+0x2f/0x50
>[  404.316870]  [<c134bacc>] complete_change_console+0x5c/0x100
>[  404.316873]  [<c134ccec>] vt_ioctl+0x106c/0x1160
>[  404.316900]  [<f84e23a0>] ? drm_master_put+0x30/0x30 [drm]
>[  404.316907]  [<c10b9c80>] ? call_rcu_bh+0x20/0x20
>[  404.316911]  [<c134bc80>] ? vt_event_wait_ioctl+0x80/0x80
>[  404.316915]  [<c134198c>] tty_ioctl+0x22c/0x860
>[  404.316920]  [<c1171dc7>] ? fsnotify+0x197/0x2b0
>[  404.316924]  [<c157e61d>] ? _raw_spin_lock+0xd/0x10
>[  404.316928]  [<c1341760>] ? tiocspgrp+0x130/0x130
>[  404.316932]  [<c114b5c6>] do_vfs_ioctl+0x86/0x2d0
>[  404.316937]  [<c113af70>] ? do_sync_readv_writev+0xe0/0xe0
>[  404.316941]  [<c114b887>] sys_ioctl+0x77/0x80
>[  404.316945]  [<c158569f>] sysenter_do_call+0x12/0x28
>[  404.316949] ---[ end trace 94217516ae9061a6 ]---
>[  404.372065] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.372072] ------------[ cut here ]------------
>[  404.372111] WARNING: at /home/apw/COD/linux/drivers/gpu/drm/i915/intel_display.c:1074 assert_pipe+0x8a/0x90 [i915]()
>[  404.372116] Hardware name: F80L                
>[  404.372120] pipe A assertion failure (expected on, current off)
>[  404.372123] Modules linked in: rfcomm bnep parport_pc ppdev arc4 snd_hda_codec_realtek ath9k mac80211 ath9k_common ath9k_hw ath snd_hda_intel snd_hda_codec i915 coretemp snd_hwdep joydev btusb snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq cfg80211 bluetooth drm_kms_helper asus_laptop sparse_keymap microcode snd_timer drm snd_seq_device psmouse mac_hid serio_raw input_polldev snd i2c_algo_bit video soundcore snd_page_alloc lp parport hid_a4tech usbhid hid r8169
>[  404.372180] Pid: 1479, comm: Xorg Tainted: G        W    3.4.0-994-generic #201205140405
>[  404.372184] Call Trace:
>[  404.372196]  [<c1035832>] warn_slowpath_common+0x72/0xa0
>[  404.372225]  [<f83c255a>] ? assert_pipe+0x8a/0x90 [i915]
>[  404.372254]  [<f83c255a>] ? assert_pipe+0x8a/0x90 [i915]
>[  404.372265]  [<c1035903>] warn_slowpath_fmt+0x33/0x40
>[  404.372283]  [<f83c255a>] assert_pipe+0x8a/0x90 [i915]
>[  404.372301]  [<f83c64d6>] intel_enable_plane+0x26/0x80 [i915]
>[  404.372318]  [<f83c659a>] i9xx_crtc_enable+0x6a/0xa0 [i915]
>[  404.372336]  [<f83c65dd>] i9xx_crtc_commit+0xd/0x10 [i915]
>[  404.372344]  [<f8432c40>] drm_crtc_helper_set_mode+0x340/0x4d0 [drm_kms_helper]
>[  404.372354]  [<f8433c7e>] drm_crtc_helper_set_config+0x92e/0x9d0 [drm_kms_helper]
>[  404.372362]  [<f8431c94>] drm_fb_helper_set_par+0x64/0xd0 [drm_kms_helper]
>[  404.372368]  [<c12ea3b9>] fb_set_var+0x189/0x3d0
>[  404.372375]  [<c11c3859>] ? ext4_da_write_end+0xb9/0x310
>[  404.372381]  [<c1069d3d>] ? update_curr+0x24d/0x2a0
>[  404.372385]  [<c106a93f>] ? enqueue_sleeper+0x21f/0x2f0
>[  404.372389]  [<c12f48ae>] fbcon_blank+0x1fe/0x300
>[  404.372396]  [<c135622c>] do_unblank_screen+0xac/0x1c0
>[  404.372400]  [<c157e64f>] ? _raw_spin_lock_irqsave+0x2f/0x50
>[  404.372404]  [<c134bacc>] complete_change_console+0x5c/0x100
>[  404.372407]  [<c134ccec>] vt_ioctl+0x106c/0x1160
>[  404.372425]  [<f84e23a0>] ? drm_master_put+0x30/0x30 [drm]
>[  404.372431]  [<c10b9c80>] ? call_rcu_bh+0x20/0x20
>[  404.372434]  [<c134bc80>] ? vt_event_wait_ioctl+0x80/0x80
>[  404.372438]  [<c134198c>] tty_ioctl+0x22c/0x860
>[  404.372443]  [<c1171dc7>] ? fsnotify+0x197/0x2b0
>[  404.372446]  [<c157e61d>] ? _raw_spin_lock+0xd/0x10
>[  404.372450]  [<c1341760>] ? tiocspgrp+0x130/0x130
>[  404.372454]  [<c114b5c6>] do_vfs_ioctl+0x86/0x2d0
>[  404.372458]  [<c113af70>] ? do_sync_readv_writev+0xe0/0xe0
>[  404.372462]  [<c114b887>] sys_ioctl+0x77/0x80
>[  404.372466]  [<c158569f>] sysenter_do_call+0x12/0x28
>[  404.372469] ---[ end trace 94217516ae9061a7 ]---
>[  404.428076] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.428105] [drm:intel_update_fbc], 
>[  404.428109] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  404.428122] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  404.428128] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:11:VGA-1] set DPMS on
>[  404.428144] [drm:drm_crtc_helper_set_config], 
>[  404.428148] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  404.428159] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.428164] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.428172] [drm:i9xx_update_plane], Writing base 00040000 00000000 0 0 5120
>[  404.484196] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.484202] [drm:intel_update_fbc], 
>[  404.484206] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  404.484214] [drm:drm_crtc_helper_set_config], 
>[  404.484218] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  404.484230] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.484237] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.484243] [drm:drm_crtc_helper_set_config], 
>[  404.484247] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  404.484256] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.484262] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.484286] [drm:drm_crtc_helper_set_config], 
>[  404.484290] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:14] #connectors=1 (x y) (0 0)
>[  404.484303] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.484307] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.484311] [drm:drm_crtc_helper_set_config], 
>[  404.484314] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0)
>[  404.484320] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.484324] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.786530] [drm:drm_mode_setcrtc], [CRTC:4]
>[  404.786542] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[  404.786546] [drm:drm_crtc_helper_set_config], 
>[  404.786550] [drm:drm_crtc_helper_set_config], [CRTC:4] [FB:24] #connectors=1 (x y) (0 0)
>[  404.786562] [drm:drm_crtc_helper_set_config], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[  404.786567] [drm:drm_crtc_helper_set_config], [CONNECTOR:11:VGA-1] to [CRTC:3]
>[  404.786579] [drm:i9xx_update_plane], Writing base 020A8000 00000000 0 0 5120
>[  404.840214] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.840225] [drm:intel_update_fbc], 
>[  404.840232] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  404.840293] [drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe A
>[  404.840303] [drm:i915_get_crtc_scanoutpos], trying to get scanoutpos for disabled pipe A
>[  404.840312] [drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe A
>[  404.840322] [drm:intel_update_fbc], 
>[  404.840327] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  404.840335] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  404.840361] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  404.840371] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[  404.840393] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[  404.840401] [drm:drm_mode_debug_printmodeline], Modeline 13:"1280x800" 60 68940 1280 1301 1333 1408 800 803 808 816 0x48 0xa
>[  404.840415] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  404.840669] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  404.840674] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  404.840684] [drm:intel_crt_detect], CRT not detected via hotplug
>[  404.840688] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[  404.840693] [drm:drm_mode_debug_printmodeline], Modeline 22:"1600x1200" 60 130000 1600 1648 1680 1760 1200 1203 1207 1235 0x48 0x5
>[  404.840700] [drm:drm_mode_prune_invalid], Not using 1600x1200 mode -3
>[  404.840705] [drm:drm_mode_debug_printmodeline], Modeline 101:"1920x1080" 60 172780 1920 2040 2248 2576 1080 1081 1084 1118 0x0 0x6
>[  404.840712] [drm:drm_mode_prune_invalid], Not using 1920x1080 mode -3
>[  404.840716] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  404.840723] [drm:drm_mode_prune_invalid], Not using 1600x1200 mode -3
>[  404.840727] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  404.840734] [drm:drm_mode_prune_invalid], Not using 1680x1050 mode -3
>[  404.840738] [drm:drm_mode_debug_printmodeline], Modeline 100:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
>[  404.840745] [drm:drm_mode_prune_invalid], Not using 1680x945 mode -3
>[  404.840749] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  404.840756] [drm:drm_mode_prune_invalid], Not using 1400x1050 mode -3
>[  404.840760] [drm:drm_mode_debug_printmodeline], Modeline 90:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  404.840767] [drm:drm_mode_prune_invalid], Not using 1400x1050 mode -3
>[  404.840771] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  404.840777] [drm:drm_mode_prune_invalid], Not using 1600x900 mode -3
>[  404.840781] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  404.840788] [drm:drm_mode_prune_invalid], Not using 1280x1024 mode -3
>[  404.840792] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  404.840799] [drm:drm_mode_prune_invalid], Not using 1280x1024 mode -3
>[  404.840803] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 85 157000 1440 1544 1696 1952 900 903 909 948 0x40 0x6
>[  404.840810] [drm:drm_mode_prune_invalid], Not using 1440x900 mode -3
>[  404.840814] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  404.840820] [drm:drm_mode_prune_invalid], Not using 1440x900 mode -3
>[  404.840824] [drm:drm_mode_debug_printmodeline], Modeline 92:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  404.840831] [drm:drm_mode_prune_invalid], Not using 1440x900 mode -3
>[  404.840835] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  404.840842] [drm:drm_mode_prune_invalid], Not using 1280x960 mode -3
>[  404.840846] [drm:drm_mode_debug_printmodeline], Modeline 98:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
>[  404.840852] [drm:drm_mode_prune_invalid], Not using 1366x768 mode -3
>[  404.840857] [drm:drm_mode_debug_printmodeline], Modeline 89:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  404.840863] [drm:drm_mode_prune_invalid], Not using 1360x768 mode -3
>[  404.840867] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x800" 85 122500 1280 1360 1496 1712 800 803 809 843 0x40 0x6
>[  404.840874] [drm:drm_mode_prune_invalid], Not using 1280x800 mode -3
>[  404.840878] [drm:drm_mode_debug_printmodeline], Modeline 60:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  404.840884] [drm:drm_mode_prune_invalid], Not using 1280x800 mode -3
>[  404.840889] [drm:drm_mode_debug_printmodeline], Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  404.840895] [drm:drm_mode_prune_invalid], Not using 1280x800 mode -3
>[  404.840899] [drm:drm_mode_debug_printmodeline], Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  404.840906] [drm:drm_mode_prune_invalid], Not using 1152x864 mode -3
>[  404.840910] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x768" 85 117500 1280 1360 1496 1712 768 771 778 809 0x40 0x6
>[  404.840916] [drm:drm_mode_prune_invalid], Not using 1280x768 mode -3
>[  404.840920] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  404.840927] [drm:drm_mode_prune_invalid], Not using 1280x768 mode -3
>[  404.840931] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  404.840938] [drm:drm_mode_prune_invalid], Not using 1280x768 mode -3
>[  404.840942] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 85 94500 1024 1072 1168 1376 768 769 772 808 0x40 0x5
>[  404.840948] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  404.840953] [drm:drm_mode_debug_printmodeline], Modeline 33:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  404.840959] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  404.840963] [drm:drm_mode_debug_printmodeline], Modeline 53:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  404.840970] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  404.840974] [drm:drm_mode_debug_printmodeline], Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  404.840980] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  404.840984] [drm:drm_mode_debug_printmodeline], Modeline 20:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  404.840991] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  404.840995] [drm:drm_mode_debug_printmodeline], Modeline 73:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
>[  404.841002] [drm:drm_mode_prune_invalid], Not using 1024x576 mode -3
>[  404.841006] [drm:drm_mode_debug_printmodeline], Modeline 35:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  404.841012] [drm:drm_mode_prune_invalid], Not using 832x624 mode -3
>[  404.841017] [drm:drm_mode_debug_printmodeline], Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[  404.841023] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  404.841027] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  404.841034] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  404.841038] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  404.841044] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  404.841048] [drm:drm_mode_debug_printmodeline], Modeline 18:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  404.841055] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  404.841059] [drm:drm_mode_debug_printmodeline], Modeline 17:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  404.841065] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  404.841070] [drm:drm_mode_debug_printmodeline], Modeline 19:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  404.841076] [drm:drm_mode_prune_invalid], Not using 848x480 mode -3
>[  404.841080] [drm:drm_mode_debug_printmodeline], Modeline 44:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[  404.841086] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  404.841091] [drm:drm_mode_debug_printmodeline], Modeline 43:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  404.841097] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  404.841101] [drm:drm_mode_debug_printmodeline], Modeline 42:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  404.841108] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  404.841112] [drm:drm_mode_debug_printmodeline], Modeline 30:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  404.841118] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  404.841122] [drm:drm_mode_debug_printmodeline], Modeline 15:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  404.841129] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  404.841133] [drm:drm_mode_debug_printmodeline], Modeline 40:"720x400" 85 35500 720 756 828 936 400 401 404 446 0x40 0x6
>[  404.841139] [drm:drm_mode_prune_invalid], Not using 720x400 mode -3
>[  404.841143] [drm:drm_mode_debug_printmodeline], Modeline 31:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  404.841150] [drm:drm_mode_prune_invalid], Not using 720x400 mode -3
>[  404.841154] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x400" 85 31500 640 672 736 832 400 401 404 445 0x40 0x6
>[  404.841160] [drm:drm_mode_prune_invalid], Not using 640x400 mode -3
>[  404.841164] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x350" 85 31500 640 672 736 832 350 382 385 445 0x40 0x9
>[  404.841171] [drm:drm_mode_prune_invalid], Not using 640x350 mode -3
>[  404.841177] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[  404.841181] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[  404.841185] [drm:intel_crt_detect], CRT not detected via hotplug
>[  404.841189] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[  404.925467] [drm:intel_crtc_cursor_set], 
>[  404.925491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  404.925945] ------------[ cut here ]------------
>[  404.925971] WARNING: at /home/apw/COD/linux/drivers/gpu/drm/i915/intel_display.c:906 intel_enable_pipe+0x144/0x190 [i915]()
>[  404.925975] Hardware name: F80L                
>[  404.925978] PLL state assertion failure (expected on, current off)
>[  404.925981] Modules linked in: rfcomm bnep parport_pc ppdev arc4 snd_hda_codec_realtek ath9k mac80211 ath9k_common ath9k_hw ath snd_hda_intel snd_hda_codec i915 coretemp snd_hwdep joydev btusb snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq cfg80211 bluetooth drm_kms_helper asus_laptop sparse_keymap microcode snd_timer drm snd_seq_device psmouse mac_hid serio_raw input_polldev snd i2c_algo_bit video soundcore snd_page_alloc lp parport hid_a4tech usbhid hid r8169
>[  404.926036] Pid: 1479, comm: Xorg Tainted: G        W    3.4.0-994-generic #201205140405
>[  404.926040] Call Trace:
>[  404.926049]  [<c1035832>] warn_slowpath_common+0x72/0xa0
>[  404.926068]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.926087]  [<f83c6464>] ? intel_enable_pipe+0x144/0x190 [i915]
>[  404.926092]  [<c1035903>] warn_slowpath_fmt+0x33/0x40
>[  404.926110]  [<f83c6464>] intel_enable_pipe+0x144/0x190 [i915]
>[  404.926130]  [<f83c658d>] i9xx_crtc_enable+0x5d/0xa0 [i915]
>[  404.926148]  [<f83c6776>] i9xx_crtc_dpms+0x16/0x40 [i915]
>[  404.926166]  [<f83c41d5>] intel_crtc_dpms+0x45/0x130 [i915]
>[  404.926184]  [<f83c1927>] ? intel_crtc_update_cursor+0x1b7/0x2d0 [i915]
>[  404.926192]  [<f8432408>] drm_helper_connector_dpms+0xb8/0x230 [drm_kms_helper]
>[  404.926210]  [<f83c4190>] ? assert_fdi_rx+0xa0/0xa0 [i915]
>[  404.926229]  [<f84e9a42>] drm_mode_connector_property_set_ioctl+0x1f2/0x200 [drm]
>[  404.926244]  [<f84e9c51>] ? drm_mode_getproperty_ioctl+0x161/0x2c0 [drm]
>[  404.926258]  [<f84dce46>] drm_ioctl+0x2d6/0x460 [drm]
>[  404.926274]  [<f84e9850>] ? drm_mode_gamma_set_ioctl+0x110/0x110 [drm]
>[  404.926282]  [<c1581c9f>] ? do_page_fault+0x1bf/0x410
>[  404.926295]  [<f84dcb70>] ? drm_version+0xa0/0xa0 [drm]
>[  404.926300]  [<c114b5c6>] do_vfs_ioctl+0x86/0x2d0
>[  404.926305]  [<c114b887>] sys_ioctl+0x77/0x80
>[  404.926310]  [<c1053432>] ? sys_clock_gettime+0xa2/0xc0
>[  404.926315]  [<c158569f>] sysenter_do_call+0x12/0x28
>[  404.926319] ---[ end trace 94217516ae9061a8 ]---
>[  404.980211] [drm:intel_wait_for_vblank], vblank wait timed out
>[  404.980219] ------------[ cut here ]------------
>[  404.980250] WARNING: at /home/apw/COD/linux/drivers/gpu/drm/i915/intel_display.c:1074 assert_pipe+0x8a/0x90 [i915]()
>[  404.980256] Hardware name: F80L                
>[  404.980261] pipe B assertion failure (expected on, current off)
>[  404.980265] Modules linked in: rfcomm bnep parport_pc ppdev arc4 snd_hda_codec_realtek ath9k mac80211 ath9k_common ath9k_hw ath snd_hda_intel snd_hda_codec i915 coretemp snd_hwdep joydev btusb snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq cfg80211 bluetooth drm_kms_helper asus_laptop sparse_keymap microcode snd_timer drm snd_seq_device psmouse mac_hid serio_raw input_polldev snd i2c_algo_bit video soundcore snd_page_alloc lp parport hid_a4tech usbhid hid r8169
>[  404.980339] Pid: 1479, comm: Xorg Tainted: G        W    3.4.0-994-generic #201205140405
>[  404.980343] Call Trace:
>[  404.980350]  [<c1035832>] warn_slowpath_common+0x72/0xa0
>[  404.980373]  [<f83c255a>] ? assert_pipe+0x8a/0x90 [i915]
>[  404.980395]  [<f83c255a>] ? assert_pipe+0x8a/0x90 [i915]
>[  404.980401]  [<c1035903>] warn_slowpath_fmt+0x33/0x40
>[  404.980424]  [<f83c255a>] assert_pipe+0x8a/0x90 [i915]
>[  404.980447]  [<f83c64d6>] intel_enable_plane+0x26/0x80 [i915]
>[  404.980470]  [<f83c659a>] i9xx_crtc_enable+0x6a/0xa0 [i915]
>[  404.980492]  [<f83c6776>] i9xx_crtc_dpms+0x16/0x40 [i915]
>[  404.980515]  [<f83c41d5>] intel_crtc_dpms+0x45/0x130 [i915]
>[  404.980537]  [<f83c1927>] ? intel_crtc_update_cursor+0x1b7/0x2d0 [i915]
>[  404.980547]  [<f8432408>] drm_helper_connector_dpms+0xb8/0x230 [drm_kms_helper]
>[  404.980569]  [<f83c4190>] ? assert_fdi_rx+0xa0/0xa0 [i915]
>[  404.980589]  [<f84e9a42>] drm_mode_connector_property_set_ioctl+0x1f2/0x200 [drm]
>[  404.980608]  [<f84e9c51>] ? drm_mode_getproperty_ioctl+0x161/0x2c0 [drm]
>[  404.980625]  [<f84dce46>] drm_ioctl+0x2d6/0x460 [drm]
>[  404.980645]  [<f84e9850>] ? drm_mode_gamma_set_ioctl+0x110/0x110 [drm]
>[  404.980652]  [<c1581c9f>] ? do_page_fault+0x1bf/0x410
>[  404.980669]  [<f84dcb70>] ? drm_version+0xa0/0xa0 [drm]
>[  404.980674]  [<c114b5c6>] do_vfs_ioctl+0x86/0x2d0
>[  404.980680]  [<c114b887>] sys_ioctl+0x77/0x80
>[  404.980685]  [<c1053432>] ? sys_clock_gettime+0xa2/0xc0
>[  404.980691]  [<c158569f>] sysenter_do_call+0x12/0x28
>[  404.980695] ---[ end trace 94217516ae9061a9 ]---
>[  405.036233] [drm:intel_wait_for_vblank], vblank wait timed out
>[  405.036265] [drm:intel_update_fbc], 
>[  405.036271] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  406.044054] [drm:intel_lvds_enable] *ERROR* timed out waiting for panel to power on
>[  406.044062] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1
>[  406.075970] [drm:intel_crtc_cursor_set], 
>[  406.075976] [drm:intel_crtc_cursor_set], cursor off
>[  406.078402] [drm:intel_crtc_cursor_set], 
>[  406.221796] [drm:intel_crtc_cursor_set], 
>[  406.221803] [drm:intel_crtc_cursor_set], cursor off
>[  406.368023] [drm:intel_crt_detect], CRT not detected via hotplug
>[  406.368030] [drm:output_poll_execute], [CONNECTOR:11:VGA-1] status updated from 2 to 2

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Attachments on bug 50010: 61721 | 61722 | 61723 | 61724 | 61725 | 61881 | 61882 | 61990

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