Attachment 61997 Details for Bug 50230 – [PATCH] Revert "r600g: set round_mode to truncate and get rid of tgsi_f2i on evergreen"

[patch] [PATCH] Revert "r600g: set round_mode to truncate and get rid of tgsi_f2i on evergreen"

0001-Revert-r600g-set-round_mode-to-truncate-and-get-rid-.patch (text/plain), 5.32 KB, created by Vadim Girlin on 2012-05-22 22:58:23 UTC

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Creator: Vadim Girlin

Created: 2012-05-22 22:58:23 UTC

Size: 5.32 KB

patch

obsolete

>From 5f5c10065ae41b7649c81d4e14082d9340931f0f Mon Sep 17 00:00:00 2001
>From: Vadim Girlin <vadimgirlin@gmail.com>
>Date: Wed, 23 May 2012 09:03:16 +0400
>Subject: [PATCH] Revert "r600g: set round_mode to truncate and get rid of
> tgsi_f2i on evergreen"
>
>This reverts commit 60bf0f05b472e66bf1175fcec7a274dab6f7e2a3.
>
>---
> src/gallium/drivers/r600/evergreen_state.c |    8 ++---
> src/gallium/drivers/r600/r600_shader.c     |   54 ++++++++++++++++++++++++++--
> 2 files changed, 56 insertions(+), 6 deletions(-)
>
>diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
>index c28eeab..ec0afe5 100644
>--- a/src/gallium/drivers/r600/evergreen_state.c
>+++ b/src/gallium/drivers/r600/evergreen_state.c
>@@ -2027,8 +2027,8 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
> 	r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */
> 	r600_store_value(cb, S_028034_BR_X(16384) | S_028034_BR_Y(16384)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */
> 
>-	r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
>-	r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
>+	r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
>+	r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
> 	r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
> 
> 	r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
>@@ -2512,8 +2512,8 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
> 	r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */
> 	r600_store_value(cb, S_028034_BR_X(16384) | S_028034_BR_Y(16384)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */
> 
>-	r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
>-	r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
>+	r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
>+	r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
> 	r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
> 
> 	r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
>diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
>index cd78104..dc208b9 100644
>--- a/src/gallium/drivers/r600/r600_shader.c
>+++ b/src/gallium/drivers/r600/r600_shader.c
>@@ -3306,6 +3306,56 @@ static int tgsi_imod(struct r600_shader_ctx *ctx)
> 	return tgsi_divmod(ctx, 1, 1);
> }
> 
>+
>+static int tgsi_f2i(struct r600_shader_ctx *ctx)
>+{
>+	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
>+	struct r600_bytecode_alu alu;
>+	int i, r;
>+	unsigned write_mask = inst->Dst[0].Register.WriteMask;
>+	int last_inst = tgsi_last_instruction(write_mask);
>+
>+	for (i = 0; i < 4; i++) {
>+		if (!(write_mask & (1<<i)))
>+			continue;
>+
>+		memset(&alu, 0, sizeof(struct r600_bytecode_alu));
>+		alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
>+
>+		alu.dst.sel = ctx->temp_reg;
>+		alu.dst.chan = i;
>+		alu.dst.write = 1;
>+
>+		r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
>+		if (i == last_inst)
>+			alu.last = 1;
>+		r = r600_bytecode_add_alu(ctx->bc, &alu);
>+		if (r)
>+			return r;
>+	}
>+
>+	for (i = 0; i < 4; i++) {
>+		if (!(write_mask & (1<<i)))
>+			continue;
>+
>+		memset(&alu, 0, sizeof(struct r600_bytecode_alu));
>+		alu.inst = ctx->inst_info->r600_opcode;
>+
>+		tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
>+
>+		alu.src[0].sel = ctx->temp_reg;
>+		alu.src[0].chan = i;
>+
>+		if (i == last_inst)
>+			alu.last = 1;
>+		r = r600_bytecode_add_alu(ctx->bc, &alu);
>+		if (r)
>+			return r;
>+	}
>+
>+	return 0;
>+}
>+
> static int tgsi_iabs(struct r600_shader_ctx *ctx)
> {
> 	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
>@@ -5368,7 +5418,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
> 	{TGSI_OPCODE_END,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end},  /* aka HALT */
> 	/* gap */
> 	{118,			0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
>-	{TGSI_OPCODE_F2I,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2},
>+	{TGSI_OPCODE_F2I,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_f2i},
> 	{TGSI_OPCODE_IDIV,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv},
> 	{TGSI_OPCODE_IMAX,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2},
> 	{TGSI_OPCODE_IMIN,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2},
>@@ -5376,7 +5426,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
> 	{TGSI_OPCODE_ISGE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
> 	{TGSI_OPCODE_ISHR,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2},
> 	{TGSI_OPCODE_ISLT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
>-	{TGSI_OPCODE_F2U,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2_trans},
>+	{TGSI_OPCODE_F2U,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_f2i},
> 	{TGSI_OPCODE_U2F,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans},
> 	{TGSI_OPCODE_UADD,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
> 	{TGSI_OPCODE_UDIV,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
>-- 
>1.7.10.2
>

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