Attachment 62246 Details for Bug 43448 – possible fix

[patch] possible fix

0001-drm-radeon-fix-bank-information-in-tiling-config.patch (text/plain), 3.17 KB, created by Alex Deucher on 2012-05-29 15:43:11 UTC

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Creator: Alex Deucher

Created: 2012-05-29 15:43:11 UTC

Size: 3.17 KB

patch

obsolete

>From 4551e476eb973a604bf8862c849b0019216116b5 Mon Sep 17 00:00:00 2001
>From: Alex Deucher <alexander.deucher@amd.com>
>Date: Tue, 29 May 2012 18:40:44 -0400
>Subject: [PATCH] drm/radeon: fix bank information in tiling config
>
>While there are cards with more than 8 mem banks, the max
>number of banks from a tiling perspective is 8, so cap
>the tiling config at 8 banks.
>
>Fixes:
>https://bugs.freedesktop.org/show_bug.cgi?id=43448
>
>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>Cc: stable@vger.kernel.org
>---
> drivers/gpu/drm/radeon/evergreen.c |    9 ++++++---
> drivers/gpu/drm/radeon/ni.c        |    9 ++++++---
> drivers/gpu/drm/radeon/rv770.c     |    8 ++++++--
> 3 files changed, 18 insertions(+), 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
>index 58991af..5d9c2c6 100644
>--- a/drivers/gpu/drm/radeon/evergreen.c
>+++ b/drivers/gpu/drm/radeon/evergreen.c
>@@ -2136,9 +2136,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
> 	/* num banks is 8 on all fusion asics. 0 = 4, 1 = 8, 2 = 16 */
> 	if (rdev->flags & RADEON_IS_IGP)
> 		rdev->config.evergreen.tile_config |= 1 << 4;
>-	else
>-		rdev->config.evergreen.tile_config |=
>-			((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
>+	else {
>+		if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT)
>+			rdev->config.evergreen.tile_config |= 1 << 4;
>+		else
>+			rdev->config.evergreen.tile_config |= 0 << 4;
>+	}
> 	rdev->config.evergreen.tile_config |=
> 		((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8;
> 	rdev->config.evergreen.tile_config |=
>diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
>index ce4e7cc..15f950c 100644
>--- a/drivers/gpu/drm/radeon/ni.c
>+++ b/drivers/gpu/drm/radeon/ni.c
>@@ -866,9 +866,12 @@ static void cayman_gpu_init(struct radeon_device *rdev)
> 	/* num banks is 8 on all fusion asics. 0 = 4, 1 = 8, 2 = 16 */
> 	if (rdev->flags & RADEON_IS_IGP)
> 		rdev->config.cayman.tile_config |= 1 << 4;
>-	else
>-		rdev->config.cayman.tile_config |=
>-			((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
>+	else {
>+		if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT)
>+			rdev->config.cayman.tile_config |= 1 << 4;
>+		else
>+			rdev->config.cayman.tile_config |= 0 << 4;
>+	}
> 	rdev->config.cayman.tile_config |=
> 		((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
> 	rdev->config.cayman.tile_config |=
>diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
>index c2f473b..c824d49 100644
>--- a/drivers/gpu/drm/radeon/rv770.c
>+++ b/drivers/gpu/drm/radeon/rv770.c
>@@ -689,8 +689,12 @@ static void rv770_gpu_init(struct radeon_device *rdev)
> 
> 	if (rdev->family == CHIP_RV770)
> 		gb_tiling_config |= BANK_TILING(1);
>-	else
>-		gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
>+	else {
>+		if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT)
>+			gb_tiling_config |= BANK_TILING(1);
>+		else
>+			gb_tiling_config |= BANK_TILING(0);
>+	}
> 	rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
> 	gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
> 	if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
>-- 
>1.7.7.5
>

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Attachments on bug 43448: 54048 | 54049 | 54077 | 54078 | 62157 | 62158 | 62159 | 62246 | 62672 | 62674 | 63053

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