Attachment 64255 Details for Bug 41976 – dmesg info with 3pipe still happens

dmesg info with 3pipe still happens

dmesg201207163pipe.log (text/plain), 123.68 KB, created by Guang Yang on 2012-07-16 06:34:46 UTC

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Description:

Filename:

MIME Type:

Creator: Guang Yang

Created: 2012-07-16 06:34:46 UTC

Size: 123.68 KB

patch

obsolete

>[  264.831313] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.832157] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.833001] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.833847] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.834688] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  264.836044] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  264.836891] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  264.837735] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.838582] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.839427] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.840273] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.841119] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.841961] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.842806] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  264.844163] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  264.845007] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  264.845853] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.846697] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.847542] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.848386] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.849231] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.850074] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.850920] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  264.852276] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  264.853122] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  264.853967] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.854812] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.855658] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.856502] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.857349] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.858190] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.859036] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  264.860394] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  264.861240] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  264.862082] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.862928] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.863772] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.864619] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.865458] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.866305] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  264.867149] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  264.867150] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  264.867401] [drm:intel_dp_link_down], 
>[  264.887270] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  264.887272] [drm:intel_crt_detect], CRT detected via hotplug
>[  264.887273] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  264.887686] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  264.887687] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  264.888007] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  264.889480] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.930866] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.930868] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  264.932093] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  264.932097] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  264.932101] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  264.932424] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  264.933896] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.975272] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.975274] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  265.305697] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  265.306654] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  265.306870] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.308862] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.309706] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.310549] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.311394] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.312238] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.313084] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.313925] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.314770] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.316126] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.316970] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.317815] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.318659] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.319503] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.320350] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.321193] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.322040] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.322883] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.324239] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.325084] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.325925] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.326770] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.327613] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.328455] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.329299] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.330145] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.330989] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.332347] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.333192] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.334038] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.334882] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.335728] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.336569] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.337416] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.338261] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.339107] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.340464] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.341308] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.342152] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.342999] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.343841] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.344687] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.345530] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.346377] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.347221] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.348578] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.349420] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.350371] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.351215] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.352061] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.352907] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.353753] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.354599] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.355441] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.356796] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.357640] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.358485] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.359329] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.360173] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.361019] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.361860] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.362704] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.363547] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.363549] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  265.363796] [drm:intel_dp_link_down], 
>[  265.383254] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  265.383256] [drm:intel_crt_detect], CRT detected via hotplug
>[  265.383257] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  265.383667] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  265.383669] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  265.383988] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  265.385465] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.426855] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.426857] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  265.428077] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  265.428080] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  265.428082] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  265.428402] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  265.429876] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.471263] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.471264] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  265.789654] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  265.790614] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  265.790830] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.792824] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.793667] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.794511] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.795358] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.796202] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.797045] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.797891] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.798738] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.800096] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.800940] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.801784] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.802630] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.803473] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.804318] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.805160] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.806006] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.806851] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.808211] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.809055] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.809901] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.810746] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.811591] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.812436] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.813279] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.814124] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.814969] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.816327] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.817171] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.818014] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.818861] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.819704] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.820551] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.821398] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.822240] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.823083] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.824442] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.825282] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.826127] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.826972] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.827819] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.828658] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.829505] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.830349] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.831194] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.832550] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.833395] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.834240] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.835087] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.835929] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.836776] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.837620] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.838467] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.839309] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.840668] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  265.841511] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  265.842358] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.843202] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.844051] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.844897] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.845741] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.846587] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  265.847428] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  265.847429] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  265.847674] [drm:intel_dp_link_down], 
>[  265.867245] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  265.867247] [drm:intel_crt_detect], CRT detected via hotplug
>[  265.867248] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  265.867662] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  265.867663] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  265.867983] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  265.869455] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.910845] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.910847] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  265.912083] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  265.912087] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  265.912090] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  265.912413] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  265.913889] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.955279] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  265.955281] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  266.280602] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  266.281562] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  266.281778] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.283767] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.284613] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.285456] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.286303] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.287143] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.287990] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.288832] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.289679] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.291034] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.291880] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.292725] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.293572] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.294414] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.295261] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.296106] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.296952] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.297794] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.299154] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.299997] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.300842] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.301684] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.302530] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.303374] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.304220] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.305062] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.305909] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.307266] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.308113] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.308957] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.309802] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.310642] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.311487] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.312330] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.313281] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.314125] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.315481] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.316328] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.317174] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.318017] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.318863] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.319706] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.320553] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.321395] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.322239] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.323595] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.324438] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.325283] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.326128] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.326973] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.327821] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.328664] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.329511] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.330358] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.331712] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.332557] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.333401] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.334244] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.335088] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.335932] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.336777] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.337623] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.338469] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.338470] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  266.338717] [drm:intel_dp_link_down], 
>[  266.358223] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  266.358225] [drm:intel_crt_detect], CRT detected via hotplug
>[  266.358226] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  266.358637] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  266.358638] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  266.358959] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  266.360434] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.401826] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.401828] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  266.403071] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  266.403075] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  266.403078] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  266.403402] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  266.404871] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.446246] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.446248] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  266.766221] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  266.767178] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  266.767391] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.769379] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.770226] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.771072] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.771917] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.772761] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.773605] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.774452] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.775296] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.776656] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.777500] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.778347] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.779192] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.780037] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.780877] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.781724] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.782567] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.783413] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.784769] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.785615] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.786459] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.787305] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.788147] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.788992] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.789835] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.790682] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.791523] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.792881] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.793728] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.794574] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.795417] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.796260] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.797104] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.797951] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.798795] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.799642] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.800998] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.801845] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.802689] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.803535] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.804377] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.805222] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.806066] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.806913] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.807756] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.809115] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.809959] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.810810] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.811656] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.812499] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.813346] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.814190] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.815036] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.815876] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.817232] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  266.818078] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  266.818920] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.819766] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.820609] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.821454] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.822301] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.823145] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  266.823991] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  266.823993] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  266.824243] [drm:intel_dp_link_down], 
>[  266.844219] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  266.844221] [drm:intel_crt_detect], CRT detected via hotplug
>[  266.844222] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  266.844637] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  266.844638] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  266.844957] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  266.846430] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.887813] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.887815] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  266.889058] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  266.889062] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  266.889066] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  266.889389] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  266.890861] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.932232] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  266.932234] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  267.256495] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  267.257455] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  267.257670] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.259660] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.260505] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.261352] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.262194] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.263040] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.263882] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.264729] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.265573] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.266930] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.267777] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.268624] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.269468] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.270308] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.271145] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.271983] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.272830] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.273672] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.275031] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.275878] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.276724] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.277569] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.278415] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.279257] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.280103] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.280948] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.281794] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.283151] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.283994] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.284838] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.285684] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.286526] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.287369] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.288214] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.289060] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.289903] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.291262] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.292107] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.292951] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.293796] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.294640] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.295483] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.296329] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.297171] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.298020] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.299373] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.300218] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.301064] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.301907] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.302753] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.303599] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.304442] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.305284] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.306128] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.307484] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.308332] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.309175] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.310022] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.310864] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.311711] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.312557] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.313399] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.314242] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.314243] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  267.314492] [drm:intel_dp_link_down], 
>[  267.334198] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  267.334200] [drm:intel_crt_detect], CRT detected via hotplug
>[  267.334201] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  267.334608] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  267.334610] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  267.334930] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  267.336402] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.377785] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.377786] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  267.379047] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  267.379051] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  267.379054] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  267.379377] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  267.380853] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.422239] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.422240] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  267.757119] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  267.758075] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  267.758291] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.760281] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.761127] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.761970] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.762816] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.763660] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.764507] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.765349] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.766193] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.767550] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.768396] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.769241] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.770087] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.770930] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.771777] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.772618] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.773464] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.774307] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.775664] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.776510] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.777356] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.778198] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.779043] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.779887] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.780734] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.781577] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.782424] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.783782] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.784628] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.785470] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.786318] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.787164] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.788010] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.788856] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.789700] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.790545] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.791902] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.792746] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.793591] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.794435] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.795281] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.796123] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.796966] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.797813] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.798655] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.800014] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.800860] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.801707] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.802551] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.803398] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.804239] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.805083] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.805927] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.806773] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.808128] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  267.808968] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  267.809815] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.810658] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.811503] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.812344] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.813188] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.814031] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  267.814878] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  267.814879] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  267.815123] [drm:intel_dp_link_down], 
>[  267.835194] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  267.835196] [drm:intel_crt_detect], CRT detected via hotplug
>[  267.835197] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  267.835605] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  267.835607] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  267.835927] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  267.837401] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.878790] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.878792] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  267.880035] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  267.880039] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  267.880042] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  267.880361] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  267.881838] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.923211] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  267.923213] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  268.243429] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  268.244386] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  268.244599] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.246595] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.247440] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.248282] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.249127] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.249972] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.250818] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.251661] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.252507] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.253864] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.254703] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.255549] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.256393] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.257238] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.258080] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.258925] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.259769] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.260614] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.261969] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.262815] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.263660] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.264506] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.265350] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.266197] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.267041] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.267887] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.268731] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.270090] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.270934] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.271781] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.272625] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.273470] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.274315] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.275160] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.276006] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.276847] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.278205] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.279052] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.279895] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.280742] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.281586] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.282432] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.283275] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.284119] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.284965] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.286323] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.287166] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.288014] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.288860] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.289702] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.290548] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.291392] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.292236] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.293078] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.294435] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.295282] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.296126] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.296970] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.297817] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.298661] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.299508] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.300348] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.301194] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.301195] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  268.301443] [drm:intel_dp_link_down], 
>[  268.321183] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  268.321184] [drm:intel_crt_detect], CRT detected via hotplug
>[  268.321186] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  268.321591] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  268.321592] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  268.321912] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  268.323385] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.364772] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.364774] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  268.366022] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  268.366026] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  268.366029] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  268.366351] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  268.367826] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.409216] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.409218] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  268.724035] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  268.724992] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  268.725206] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.727204] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.728050] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.728897] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.729742] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.730583] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.731430] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.732378] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.733225] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.734579] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.735422] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.736268] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.737112] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.737956] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.738803] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.739646] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.740492] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.741333] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.742688] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.743532] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.744375] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.745220] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.746063] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.746910] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.747755] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.748599] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.749440] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.750796] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.751639] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.752482] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.753329] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.754176] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.755021] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.755868] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.756712] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.757558] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.758917] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.759762] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.760606] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.761449] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.762294] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.763141] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.763988] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.764831] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.765678] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.767036] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.767879] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.768726] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.769566] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.770413] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.771260] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.772105] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.772951] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.773794] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.775151] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  268.775998] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  268.776843] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.777687] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.778531] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.779375] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.780221] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.781061] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  268.781907] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  268.781908] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  268.782157] [drm:intel_dp_link_down], 
>[  268.802171] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  268.802173] [drm:intel_crt_detect], CRT detected via hotplug
>[  268.802174] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  268.802587] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  268.802588] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  268.802908] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  268.804380] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.845766] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.845768] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  268.846990] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  268.846993] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  268.846995] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  268.847317] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  268.848791] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.890174] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  268.890175] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  269.215339] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  269.216295] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  269.216510] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.218505] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.219351] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.220193] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.221038] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.221881] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.222727] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.223570] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.224417] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.225776] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.226623] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.227465] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.228307] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.229150] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.229997] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.230840] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.231687] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.232531] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.233888] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.234733] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.235579] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.236421] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.237267] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.238110] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.238954] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.239796] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.240642] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.242000] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.242845] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.243690] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.244536] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.245379] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.246226] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.247069] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.247916] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.248759] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.250117] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.250961] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.251807] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.252649] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.253496] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.254338] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.255185] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.256031] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.256877] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.258235] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.259082] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.259922] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.260768] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.261612] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.262459] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.263302] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.264147] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.264991] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.266349] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.267190] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.268036] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.268880] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.269727] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.270567] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.271412] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.272256] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.273102] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.273103] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  269.273351] [drm:intel_dp_link_down], 
>[  269.293146] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  269.293147] [drm:intel_crt_detect], CRT detected via hotplug
>[  269.293149] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  269.293564] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  269.293565] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  269.293885] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  269.295357] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.336756] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.336758] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  269.337977] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  269.337980] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  269.337983] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  269.338306] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  269.339775] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.381160] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.381161] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  269.717280] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  269.718240] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  269.718456] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.720449] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.721295] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.722140] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.722985] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.723830] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.724675] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.725521] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.726365] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.727722] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.728569] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.729412] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.730259] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.731105] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.731947] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.732795] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.733638] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.734482] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.735839] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.736682] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.737528] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.738372] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.739216] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.740061] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.740905] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.741752] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.742595] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.743955] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.744799] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.745644] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.746489] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.747335] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.748176] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.749022] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.749865] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.750712] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.752069] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.752914] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.753758] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.754604] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.755444] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.756287] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.757132] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.757979] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.758824] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.760181] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.761027] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.761873] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.762716] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.763562] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.764404] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.765250] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.766094] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.766941] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.768295] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  269.769141] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  269.769988] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.770833] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.771674] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.772521] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.773364] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.774211] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  269.775053] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  269.775054] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  269.775304] [drm:intel_dp_link_down], 
>[  269.795144] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  269.795146] [drm:intel_crt_detect], CRT detected via hotplug
>[  269.795147] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  269.795558] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  269.795559] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  269.795879] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  269.797352] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.838739] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.838741] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  269.839985] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  269.839989] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  269.839993] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  269.840316] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  269.841795] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.883179] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  269.883181] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  270.205902] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  270.206859] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  270.207073] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.209063] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.209909] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.210755] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.211598] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.212441] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.213284] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.214130] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.214973] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.216331] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.217178] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.218018] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.218863] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.219706] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.220554] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.221396] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.222243] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.223088] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.224443] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.225285] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.226132] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.226975] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.227822] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.228664] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.229511] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.230357] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.231202] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.232556] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.233401] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.234245] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.235091] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.235934] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.236782] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.237627] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.238473] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.239319] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.240676] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.241520] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.242365] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.243212] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.244055] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.244902] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.245746] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.246591] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.247435] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.248793] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.249637] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.250483] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.251326] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.252173] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.253014] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.253861] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.254704] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.255550] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.256906] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.257753] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.258596] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.259444] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.260284] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.261131] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.261975] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.262821] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.263663] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  270.263664] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting
>[  270.263910] [drm:intel_dp_link_down], 
>[  270.283131] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  270.283133] [drm:intel_crt_detect], CRT detected via hotplug
>[  270.283134] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  270.283547] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  270.283549] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  270.283866] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  270.285338] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  270.326735] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  270.326737] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  270.327978] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  270.327982] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  270.327986] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  270.328309] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  270.329780] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  270.371171] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  270.371172] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  270.371222] [drm:drm_mode_setcrtc], [CRTC:3]
>[  270.371225] [drm:drm_mode_setcrtc], [CONNECTOR:9:VGA-1]
>[  270.371226] [drm:drm_crtc_helper_set_config], 
>[  270.371228] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:37] #connectors=1 (x y) (0 0)
>[  270.371231] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  270.371232] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  270.371233] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  270.371236] [drm:ironlake_update_plane], Writing base 0093D000 00000000 0 0 4096
>[  270.387075] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  270.389007] [drm:drm_mode_setcrtc], [CRTC:5]
>[  270.389010] [drm:drm_mode_setcrtc], [CONNECTOR:15:DP-1]
>[  270.389011] [drm:drm_crtc_helper_set_config], 
>[  270.389012] [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:37] #connectors=1 (x y) (0 0)
>[  270.389014] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  270.389016] [drm:drm_mode_debug_printmodeline], Modeline 31:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  270.389018] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.389020] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  270.389021] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  270.389022] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  270.389023] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  270.389025] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.389027] [drm:intel_dp_mode_fixup], DP link computation with max lane count 4 max bw 06 pixel clock 65000KHz
>[  270.389028] [drm:intel_dp_mode_fixup], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  270.389029] [drm:intel_dp_mode_fixup], DP link bw required 156000 available 259200
>[  270.389030] [drm:drm_crtc_helper_set_mode], [CRTC:5]
>[  270.389247] [drm:intel_dp_link_down], 
>[  270.419041] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  270.453972] [drm:intel_disable_pch_pll], disable PCH PLL c6018 (active 2, on? 1) for crtc 5
>[  270.454185] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.454187] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.454188] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  270.454190] [drm:intel_choose_pipe_bpp_dither], clamping display bpc (was -1) to EDID reported max of 8
>[  270.454191] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
>[  270.454193] [drm:ironlake_crtc_mode_set], Mode for pipe 1:
>[  270.454195] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.454196] [drm:intel_get_pch_pll], CRTC:5 reusing existing PCH PLL c6018
>[  270.454197] [drm:intel_get_pch_pll], switching PLL c6018 off
>[  270.505963] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.505970] [drm:ironlake_update_plane], Writing base 0093D000 00000000 0 0 4096
>[  270.557963] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.557969] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.557972] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.557974] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  270.557978] [drm:drm_crtc_helper_set_mode], [ENCODER:16:TMDS-16] set [MODE:38:800x600]
>[  270.557984] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.557986] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.557989] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  270.609961] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.661958] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.662779] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x500
>[  270.662782] [drm:ivb_manual_fdi_link_train], FDI train 1 done.
>[  270.663440] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x600
>[  270.663442] [drm:ivb_manual_fdi_link_train], FDI train 2 done.
>[  270.663443] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  270.663444] [drm:intel_enable_pch_pll], enable PCH PLL c6018 (active 1, on? 0)for crtc 5
>[  270.663447] [drm:intel_enable_pch_pll], enabling PCH PLL c6018
>[  270.665099] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.665943] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.666786] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.667626] [drm:intel_dp_start_link_train], clock recovery OK
>[  270.674055] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  270.674057] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:15:DP-1] set DPMS on
>[  270.674099] [drm:drm_mode_setcrtc], [CRTC:7]
>[  270.674102] [drm:drm_mode_setcrtc], [CONNECTOR:19:DP-2]
>[  270.674102] [drm:drm_crtc_helper_set_config], 
>[  270.674104] [drm:drm_crtc_helper_set_config], [CRTC:7] [FB:37] #connectors=1 (x y) (0 0)
>[  270.674106] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  270.674108] [drm:drm_mode_debug_printmodeline], Modeline 32:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  270.674110] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.674111] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  270.674112] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  270.674114] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  270.674115] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  270.674116] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.674118] [drm:intel_dp_mode_fixup], DP link computation with max lane count 4 max bw 06 pixel clock 65000KHz
>[  270.674120] [drm:intel_dp_mode_fixup], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  270.674121] [drm:intel_dp_mode_fixup], DP link bw required 156000 available 259200
>[  270.674122] [drm:drm_crtc_helper_set_mode], [CRTC:7]
>[  270.674338] [drm:intel_dp_link_down], 
>[  270.690122] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  270.708039] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  270.742963] [drm:intel_disable_pch_pll], disable PCH PLL c6018 (active 2, on? 1) for crtc 7
>[  270.743175] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.743177] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.743178] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  270.743180] [drm:intel_choose_pipe_bpp_dither], clamping display bpc (was -1) to EDID reported max of 10
>[  270.743181] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
>[  270.743183] [drm:ironlake_crtc_mode_set], Mode for pipe 2:
>[  270.743185] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  270.743186] [drm:intel_get_pch_pll], CRTC:7 reusing existing PCH PLL c6018
>[  270.743187] [drm:intel_get_pch_pll], switching PLL c6018 off
>[  270.794956] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.794963] [drm:ironlake_update_plane], Writing base 0093D000 00000000 0 0 4096
>[  270.846955] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.846961] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.846963] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.846966] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  270.846970] [drm:drm_crtc_helper_set_mode], [ENCODER:20:TMDS-20] set [MODE:38:800x600]
>[  270.846977] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  270.846979] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 5, cursor: 6
>[  270.846981] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  270.898953] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.950952] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  270.951775] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  270.951777] [drm:ivb_manual_fdi_link_train], FDI train 1 done.
>[  270.952436] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  270.952438] [drm:ivb_manual_fdi_link_train], FDI train 2 done.
>[  270.952439] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  270.952440] [drm:intel_enable_pch_pll], enable PCH PLL c6018 (active 1, on? 0)for crtc 7
>[  270.952443] [drm:intel_enable_pch_pll], enabling PCH PLL c6018
>[  270.954094] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  270.954943] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  270.955786] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  270.956631] [drm:intel_dp_start_link_train], clock recovery OK
>[  270.963063] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  270.963065] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:19:DP-2] set DPMS on
>[  270.963162] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  270.963163] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[  270.963169] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  270.963170] [drm:intel_crt_detect], CRT detected via hotplug
>[  270.970942] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  270.970948] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] probed modes :
>[  270.970950] [drm:drm_mode_debug_printmodeline], Modeline 25:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  270.970952] [drm:drm_mode_debug_printmodeline], Modeline 23:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  270.970954] [drm:drm_mode_debug_printmodeline], Modeline 22:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  270.970956] [drm:drm_mode_debug_printmodeline], Modeline 24:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  270.970957] [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  270.970960] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  270.970971] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  270.970972] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1]
>[  270.971384] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  270.971385] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1] disconnected
>[  270.971387] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  270.971388] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1]
>[  270.971799] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  270.971800] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:HDMI-A-1] disconnected
>[  270.971805] [drm:drm_mode_getconnector], [CONNECTOR:15:?]
>[  270.971806] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:DP-1]
>[  270.972127] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  270.973598] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  270.979064] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  271.014965] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.016440] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.057825] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.057839] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  271.057856] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:DP-1] probed modes :
>[  271.057858] [drm:drm_mode_debug_printmodeline], Modeline 27:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  271.057859] [drm:drm_mode_debug_printmodeline], Modeline 63:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  271.057861] [drm:drm_mode_debug_printmodeline], Modeline 64:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  271.057863] [drm:drm_mode_debug_printmodeline], Modeline 60:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  271.057865] [drm:drm_mode_debug_printmodeline], Modeline 59:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  271.057866] [drm:drm_mode_debug_printmodeline], Modeline 57:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  271.057868] [drm:drm_mode_debug_printmodeline], Modeline 56:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  271.057870] [drm:drm_mode_debug_printmodeline], Modeline 62:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  271.057872] [drm:drm_mode_debug_printmodeline], Modeline 61:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  271.057874] [drm:drm_mode_debug_printmodeline], Modeline 55:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  271.057875] [drm:drm_mode_debug_printmodeline], Modeline 58:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  271.057877] [drm:drm_mode_debug_printmodeline], Modeline 54:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  271.057879] [drm:drm_mode_debug_printmodeline], Modeline 53:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  271.057881] [drm:drm_mode_debug_printmodeline], Modeline 50:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  271.057882] [drm:drm_mode_debug_printmodeline], Modeline 52:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  271.057884] [drm:drm_mode_debug_printmodeline], Modeline 51:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  271.057886] [drm:drm_mode_debug_printmodeline], Modeline 36:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  271.057888] [drm:drm_mode_debug_printmodeline], Modeline 49:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  271.057889] [drm:drm_mode_debug_printmodeline], Modeline 48:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  271.057891] [drm:drm_mode_debug_printmodeline], Modeline 47:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  271.057893] [drm:drm_mode_debug_printmodeline], Modeline 44:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  271.057895] [drm:drm_mode_debug_printmodeline], Modeline 45:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  271.057896] [drm:drm_mode_debug_printmodeline], Modeline 43:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  271.057898] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  271.057900] [drm:drm_mode_debug_printmodeline], Modeline 46:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  271.057901] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  271.057903] [drm:drm_mode_debug_printmodeline], Modeline 40:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  271.057905] [drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  271.057906] [drm:drm_mode_debug_printmodeline], Modeline 39:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  271.057908] [drm:drm_mode_debug_printmodeline], Modeline 34:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  271.057913] [drm:drm_mode_getconnector], [CONNECTOR:15:?]
>[  271.057939] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  271.057941] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  271.059848] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-2]
>[  271.060939] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  271.060943] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  271.060948] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-2] disconnected
>[  271.060956] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  271.060959] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-2]
>[  271.062955] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  271.062958] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  271.062962] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-2] disconnected
>[  271.062981] [drm:drm_mode_getconnector], [CONNECTOR:19:?]
>[  271.062992] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:19:DP-2]
>[  271.063315] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.064785] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.106173] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.107646] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.149017] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.149030] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  271.149047] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:19:DP-2] probed modes :
>[  271.149049] [drm:drm_mode_debug_printmodeline], Modeline 29:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  271.149051] [drm:drm_mode_debug_printmodeline], Modeline 95:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  271.149053] [drm:drm_mode_debug_printmodeline], Modeline 96:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  271.149055] [drm:drm_mode_debug_printmodeline], Modeline 92:"1400x1050" 75 156000 1400 1504 1648 1896 1050 1053 1057 1099 0x40 0x6
>[  271.149056] [drm:drm_mode_debug_printmodeline], Modeline 91:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  271.149058] [drm:drm_mode_debug_printmodeline], Modeline 89:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  271.149060] [drm:drm_mode_debug_printmodeline], Modeline 88:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  271.149062] [drm:drm_mode_debug_printmodeline], Modeline 94:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  271.149063] [drm:drm_mode_debug_printmodeline], Modeline 93:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[  271.149065] [drm:drm_mode_debug_printmodeline], Modeline 87:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  271.149067] [drm:drm_mode_debug_printmodeline], Modeline 90:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  271.149069] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
>[  271.149070] [drm:drm_mode_debug_printmodeline], Modeline 85:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  271.149072] [drm:drm_mode_debug_printmodeline], Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  271.149074] [drm:drm_mode_debug_printmodeline], Modeline 84:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
>[  271.149075] [drm:drm_mode_debug_printmodeline], Modeline 83:"1280x768" 60 79500 1280 1344 1472 1664 768 771 778 798 0x40 0x6
>[  271.149077] [drm:drm_mode_debug_printmodeline], Modeline 68:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  271.149079] [drm:drm_mode_debug_printmodeline], Modeline 81:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  271.149081] [drm:drm_mode_debug_printmodeline], Modeline 80:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  271.149082] [drm:drm_mode_debug_printmodeline], Modeline 79:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  271.149084] [drm:drm_mode_debug_printmodeline], Modeline 76:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  271.149086] [drm:drm_mode_debug_printmodeline], Modeline 77:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  271.149088] [drm:drm_mode_debug_printmodeline], Modeline 75:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  271.149089] [drm:drm_mode_debug_printmodeline], Modeline 74:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  271.149091] [drm:drm_mode_debug_printmodeline], Modeline 78:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  271.149093] [drm:drm_mode_debug_printmodeline], Modeline 73:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  271.149094] [drm:drm_mode_debug_printmodeline], Modeline 72:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  271.149096] [drm:drm_mode_debug_printmodeline], Modeline 65:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  271.149098] [drm:drm_mode_debug_printmodeline], Modeline 71:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  271.149100] [drm:drm_mode_debug_printmodeline], Modeline 66:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  271.149104] [drm:drm_mode_getconnector], [CONNECTOR:19:?]
>[  271.149128] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  271.149129] [drm:intel_crt_detect], CRT detected via hotplug
>[  271.149131] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  271.149535] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  271.149536] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  271.149856] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.151326] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.192716] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.192717] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  271.193951] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  271.193954] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  271.193958] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  271.194281] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.195756] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.237143] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.237145] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  271.237169] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  271.238136] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  271.238352] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  271.239195] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  271.240042] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.240884] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.241728] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.242575] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.243419] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.244263] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.245106] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  271.246462] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  271.247308] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  271.248152] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.248998] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.249841] [drm:intel_dp_start_link_train], clock recovery OK
>[  271.256721] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  271.256722] [drm:intel_crt_detect], CRT detected via hotplug
>[  271.256723] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  271.257127] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  271.257128] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  271.257448] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.258919] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.300306] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.300307] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  271.301949] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  271.301953] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  271.301957] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  271.302280] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.303754] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.345130] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.345132] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  271.673416] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  271.674374] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  271.674589] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  271.676164] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  271.677008] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  271.677851] [drm:intel_dp_start_link_train], clock recovery OK
>[  271.684737] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  271.684738] [drm:intel_crt_detect], CRT detected via hotplug
>[  271.684739] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  271.685152] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  271.685154] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  271.685472] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.686946] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.728330] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.728332] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  271.729937] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  271.729940] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  271.729944] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  271.730267] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  271.731747] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.773137] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  271.773139] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  276.301887] [drm:drm_crtc_helper_set_config], 
>[  276.301888] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:35] #connectors=1 (x y) (0 0)
>[  276.301891] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.301892] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.301893] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.301895] [drm:ironlake_update_plane], Writing base 00073000 00000000 0 0 7680
>[  276.304749] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  276.305817] [drm:drm_crtc_helper_set_config], 
>[  276.305820] [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:35] #connectors=1 (x y) (0 0)
>[  276.305824] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  276.305827] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  276.305831] [drm:drm_mode_debug_printmodeline], Modeline 31:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.305833] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.305835] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.305836] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.305838] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  276.305840] [drm:drm_mode_debug_printmodeline], Modeline 31:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.305844] [drm:intel_dp_mode_fixup], DP link computation with max lane count 4 max bw 06 pixel clock 154000KHz
>[  276.305846] [drm:intel_dp_mode_fixup], DP link bw 06 lane count 4 clock 162000 bpp 24
>[  276.305848] [drm:intel_dp_mode_fixup], DP link bw required 369600 available 518400
>[  276.305849] [drm:drm_crtc_helper_set_mode], [CRTC:5]
>[  276.306080] [drm:intel_dp_link_down], 
>[  276.332183] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  276.366820] [drm:intel_disable_pch_pll], disable PCH PLL c6018 (active 2, on? 1) for crtc 5
>[  276.367029] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.367030] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.367030] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  276.367033] [drm:intel_choose_pipe_bpp_dither], clamping display bpc (was -1) to EDID reported max of 8
>[  276.367033] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
>[  276.367034] [drm:ironlake_crtc_mode_set], Mode for pipe 1:
>[  276.367036] [drm:drm_mode_debug_printmodeline], Modeline 31:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.367037] [drm:intel_get_pch_pll], CRTC:5 reusing existing PCH PLL c6018
>[  276.367037] [drm:intel_get_pch_pll], switching PLL c6018 off
>[  276.418811] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.418816] [drm:ironlake_update_plane], Writing base 00073000 00000000 0 0 7680
>[  276.470810] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.470813] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.470815] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.470817] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  276.470820] [drm:drm_crtc_helper_set_mode], [ENCODER:16:TMDS-16] set [MODE:31:1920x1200]
>[  276.470826] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.470827] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.470829] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 5, cursor: 6
>[  276.522793] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.574808] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.575630] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  276.575632] [drm:ivb_manual_fdi_link_train], FDI train 1 done.
>[  276.576288] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x600
>[  276.576289] [drm:ivb_manual_fdi_link_train], FDI train 2 done.
>[  276.576290] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  276.576290] [drm:intel_enable_pch_pll], enable PCH PLL c6018 (active 1, on? 0)for crtc 5
>[  276.576293] [drm:intel_enable_pch_pll], enabling PCH PLL c6018
>[  276.577941] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  276.578786] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  276.579632] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  276.580473] [drm:intel_dp_start_link_train], clock recovery OK
>[  276.586894] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  276.586895] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:15:DP-1] set DPMS on
>[  276.586907] [drm:drm_crtc_helper_set_config], 
>[  276.586908] [drm:drm_crtc_helper_set_config], [CRTC:7] [FB:35] #connectors=1 (x y) (0 0)
>[  276.586909] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  276.586911] [drm:drm_mode_debug_printmodeline], Modeline 38:"800x600" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[  276.586912] [drm:drm_mode_debug_printmodeline], Modeline 32:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.586914] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.586914] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.586915] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.586916] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  276.586917] [drm:drm_mode_debug_printmodeline], Modeline 32:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.586919] [drm:intel_dp_mode_fixup], DP link computation with max lane count 4 max bw 06 pixel clock 154000KHz
>[  276.586920] [drm:intel_dp_mode_fixup], DP link bw 06 lane count 4 clock 162000 bpp 24
>[  276.586920] [drm:intel_dp_mode_fixup], DP link bw required 369600 available 518400
>[  276.586921] [drm:drm_crtc_helper_set_mode], [CRTC:7]
>[  276.587137] [drm:intel_dp_link_down], 
>[  276.602978] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  276.621191] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  276.655812] [drm:intel_disable_pch_pll], disable PCH PLL c6018 (active 2, on? 1) for crtc 7
>[  276.656021] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.656022] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.656023] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  276.656025] [drm:intel_choose_pipe_bpp_dither], clamping display bpc (was -1) to EDID reported max of 10
>[  276.656026] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
>[  276.656026] [drm:ironlake_crtc_mode_set], Mode for pipe 2:
>[  276.656028] [drm:drm_mode_debug_printmodeline], Modeline 32:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[  276.656029] [drm:intel_get_pch_pll], CRTC:7 reusing existing PCH PLL c6018
>[  276.656029] [drm:intel_get_pch_pll], switching PLL c6018 off
>[  276.707788] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.707793] [drm:ironlake_update_plane], Writing base 00073000 00000000 0 0 7680
>[  276.759804] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.759807] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.759809] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.759811] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  276.759814] [drm:drm_crtc_helper_set_mode], [ENCODER:20:TMDS-20] set [MODE:32:1920x1200]
>[  276.759819] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[  276.759821] [drm:sandybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[  276.759822] [drm:sandybridge_update_wm], FIFO watermarks For pipe C - plane 8, cursor: 6
>[  276.811786] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.863800] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  276.864621] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  276.864623] [drm:ivb_manual_fdi_link_train], FDI train 1 done.
>[  276.865280] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  276.865282] [drm:ivb_manual_fdi_link_train], FDI train 2 done.
>[  276.865282] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  276.865283] [drm:intel_enable_pch_pll], enable PCH PLL c6018 (active 1, on? 0)for crtc 7
>[  276.865285] [drm:intel_enable_pch_pll], enabling PCH PLL c6018
>[  276.866935] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  276.867777] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  276.868622] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  276.869465] [drm:intel_dp_start_link_train], clock recovery OK
>[  276.875885] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
>[  276.875886] [drm:drm_crtc_helper_set_config], 	[CONNECTOR:19:DP-2] set DPMS on
>[  276.875899] [drm:drm_crtc_helper_set_config], 
>[  276.875900] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875903] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875904] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875904] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875905] [drm:drm_crtc_helper_set_config], 
>[  276.875906] [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875907] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875908] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875909] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875909] [drm:drm_crtc_helper_set_config], 
>[  276.875910] [drm:drm_crtc_helper_set_config], [CRTC:7] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875911] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875912] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875913] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875918] [drm:drm_crtc_helper_set_config], 
>[  276.875918] [drm:drm_crtc_helper_set_config], [CRTC:3] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875920] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875921] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875921] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875922] [drm:drm_crtc_helper_set_config], 
>[  276.875922] [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875924] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875925] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875925] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875926] [drm:drm_crtc_helper_set_config], 
>[  276.875926] [drm:drm_crtc_helper_set_config], [CRTC:7] [FB:35] #connectors=1 (x y) (0 0)
>[  276.875928] [drm:drm_crtc_helper_set_config], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[  276.875929] [drm:drm_crtc_helper_set_config], [CONNECTOR:15:DP-1] to [CRTC:5]
>[  276.875929] [drm:drm_crtc_helper_set_config], [CONNECTOR:19:DP-2] to [CRTC:7]
>[  276.875958] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  276.877865] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  276.877866] [drm:intel_crt_detect], CRT detected via hotplug
>[  276.877867] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  276.878279] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  276.878281] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  276.878600] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  276.880067] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  276.891903] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
>[  276.921438] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  276.921440] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  276.922805] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  276.922809] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  276.922813] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  276.923134] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  276.924609] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  276.965968] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  276.965970] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1
>[  277.019597] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  277.020553] [drm:intel_dp_check_link_status], TMDS-16: channel EQ not ok, retraining
>[  277.020769] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  277.022766] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  277.023609] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.024455] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.025296] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.026142] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.026985] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.027830] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.028667] [drm:intel_dp_start_link_train], too many voltage retries, give up
>[  277.030014] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00000000
>[  277.030857] [drm:intel_dp_start_link_train], training pattern 1 signal levels 00800000
>[  277.031703] [drm:intel_dp_start_link_train], training pattern 1 signal levels 02800000
>[  277.032543] [drm:intel_dp_start_link_train], clock recovery OK
>[  277.039419] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[  277.039420] [drm:intel_crt_detect], CRT detected via hotplug
>[  277.039422] [drm:output_poll_execute], [CONNECTOR:9:VGA-1] status updated from 1 to 1
>[  277.039833] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  277.039835] [drm:output_poll_execute], [CONNECTOR:12:HDMI-A-1] status updated from 2 to 2
>[  277.040152] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  277.041626] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  277.083000] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  277.083002] [drm:output_poll_execute], [CONNECTOR:15:DP-1] status updated from 1 to 1
>[  277.084785] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  277.084789] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  277.084793] [drm:output_poll_execute], [CONNECTOR:18:HDMI-A-2] status updated from 2 to 2
>[  277.085115] [drm:intel_dp_detect], DPCD: 1106840000000000
>[  277.086586] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  277.127950] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  277.127952] [drm:output_poll_execute], [CONNECTOR:19:DP-2] status updated from 1 to 1

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Attachments on bug 41976: 58018 | 64255 | 66001 | 66002 | 66014 | 66041 | 66901 | 70145

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