Attachment 67667 Details for Bug 55304 – Take the spinlock for external callers (debugfs)

[patch] Take the spinlock for external callers (debugfs)

0001-drm-i915-Wrap-external-callers-to-IPS-state-with-app.patch (text/plain), 3.09 KB, created by Chris Wilson on 2012-09-25 08:51:36 UTC

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Creator: Chris Wilson

Created: 2012-09-25 08:51:36 UTC

Size: 3.09 KB

patch

obsolete

>From fcb67d0878cbd1ffeef8013f0eb88a0c01898092 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Tue, 25 Sep 2012 09:44:59 +0100
>Subject: [PATCH] drm/i915: Wrap external callers to IPS state with
> appropriate locks
>
>Fixes regression from commit 02d719562ef40483648b2cc46899d4a2ff5953bb
>Author: Daniel Vetter <daniel.vetter@ffwll.ch>
>Date:   Thu Aug 9 16:44:54 2012 +0200
>
>    drm/i915: properly guard ilk ips state
>
>The core functions were annotated with their locking requirements, but
>we overlooked that they were exported, without any control over the
>locking, to debugfs. So in order to enable debugfs to read the registers
>without triggering sanity checks, we change the exported entry points to
>properly take the required locks before calling the core routines.
>
>Reported-by: yangguang <guang.a.yang@intel.com>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55304
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/intel_pm.c |   40 +++++++++++++++++++++++++++++++++++----
> 1 file changed, 36 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 4e16cc1..f459e30 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -2735,7 +2735,7 @@ static const struct cparams {
> 	{ 0, 800, 231, 23784 },
> };
> 
>-unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)
>+static unsigned long __i915_chipset_val(struct drm_i915_private *dev_priv)
> {
> 	u64 total_count, diff, ret;
> 	u32 count1, count2, count3, m = 0, c = 0;
>@@ -2789,6 +2789,22 @@ unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)
> 	return ret;
> }
> 
>+unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)
>+{
>+	unsigned long val;
>+
>+	if (dev_priv->info->gen != 5)
>+		return 0;
>+
>+	spin_lock_irq(&mchdev_lock);
>+
>+	val = __i915_chipset_val(dev_priv);
>+
>+	spin_unlock_irq(&mchdev_lock);
>+
>+	return val;
>+}
>+
> unsigned long i915_mch_val(struct drm_i915_private *dev_priv)
> {
> 	unsigned long m, x, b;
>@@ -2992,7 +3008,7 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv)
> 	spin_unlock_irq(&mchdev_lock);
> }
> 
>-unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)
>+static unsigned long __i915_gfx_val(struct drm_i915_private *dev_priv)
> {
> 	unsigned long t, corr, state1, corr2, state2;
> 	u32 pxvid, ext_v;
>@@ -3029,6 +3045,22 @@ unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)
> 	return dev_priv->ips.gfx_power + state2;
> }
> 
>+unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)
>+{
>+	unsigned long val;
>+
>+	if (dev_priv->info->gen != 5)
>+		return 0;
>+
>+	spin_lock_irq(&mchdev_lock);
>+
>+	val = __i915_gfx_val(dev_priv);
>+
>+	spin_unlock_irq(&mchdev_lock);
>+
>+	return val;
>+}
>+
> /**
>  * i915_read_mch_val - return value for IPS use
>  *
>@@ -3045,8 +3077,8 @@ unsigned long i915_read_mch_val(void)
> 		goto out_unlock;
> 	dev_priv = i915_mch_dev;
> 
>-	chipset_val = i915_chipset_val(dev_priv);
>-	graphics_val = i915_gfx_val(dev_priv);
>+	chipset_val = __i915_chipset_val(dev_priv);
>+	graphics_val = __i915_gfx_val(dev_priv);
> 
> 	ret = chipset_val + graphics_val;
> 
>-- 
>1.7.10.4
>

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