Attachment 68470 Details for Bug 30620 – diff -u regs-fail regs-working

diff -u regs-fail regs-working

diff (text/plain), 12.61 KB, created by auxsvr on 2012-10-12 06:20:23 UTC

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Creator: auxsvr

Created: 2012-10-12 06:20:23 UTC

Size: 12.61 KB

patch

obsolete

>--- regs-fail	2012-10-12 08:33:28.000000000 +0300
>+++ regs-working	2012-10-12 08:29:29.000000000 +0300
>@@ -1,13 +1,13 @@
> ADAPTER_ID (0f2c)	0x00b00e11 (11537937)
>-AGP_BASE (0170)	0xec000000 (-335544320)
>+AGP_BASE (0170)	0x00000000 (0)
> AGP_CNTL (0174)	0x001e0000 (1966080)
>-AGP_COMMAND (0f60)	0x0f000304 (251659012)
>+AGP_COMMAND (0f60)	0x00000200 (512)
> AGP_STATUS (0f5c)	0x2f000207 (788529671)
> AMCGPIO_A_REG (01a0)	0x00000000 (0)
> AMCGPIO_EN_REG (01a8)	0x00000000 (0)
> AMCGPIO_MASK (0194)	0x00002202 (8706)
> AMCGPIO_Y_REG (01a4)	0x000007ff (2047)
>-ATTRDR (03c1)	0x50000000 (1342177280)
>+ATTRDR (03c1)	0x00000000 (0)
> ATTRDW (03c0)	0x00000000 (0)
> ATTRX (03c0)	0x00000000 (0)
> AUX_SC_CNTL (1660)	0x00000000 (0)
>@@ -31,21 +31,21 @@
> BIOS_2_SCRATCH (0018)	0x10040400 (268698624)
> BIOS_3_SCRATCH (001c)	0x02020000 (33685504)
> BIOS_4_SCRATCH (0020)	0x03000006 (50331654)
>-BIOS_5_SCRATCH (0024)	0x03030203 (50528771)
>-BIOS_6_SCRATCH (0028)	0x40310f04 (1076956932)
>-BIOS_7_SCRATCH (002c)	0x00001000 (4096)
>+BIOS_5_SCRATCH (0024)	0x03000003 (50331651)
>+BIOS_6_SCRATCH (0028)	0x00010f00 (69376)
>+BIOS_7_SCRATCH (002c)	0x00000000 (0)
> BIOS_ROM (0f30)	0x00000000 (0)
> BIST (0f0f)	0x00000800 (2048)
> BUS_CNTL (0030)	0x5133a3a0 (1362338720)
> BUS_CNTL1 (0034)	0x080000f0 (134217968)
>-CACHE_CNTL (1724)	0x00000033 (51)
>+CACHE_CNTL (1724)	0x00000000 (0)
> CACHE_LINE (0f0c)	0x00004210 (16912)
> CAP0_TRIG_CNTL (0950)	0x00000000 (0)
> CAP1_TRIG_CNTL (09c0)	0x00000000 (0)
> CAPABILITIES_ID (0f50)	0x06020001 (100794369)
> CAPABILITIES_PTR (0f34)	0x00000058 (88)
>-CLOCK_CNTL_DATA (000c)	0x0000f8c3 (63683)
>-CLOCK_CNTL_INDEX (0008)	0x000003ad (941)
>+CLOCK_CNTL_DATA (000c)	0x000000c3 (195)
>+CLOCK_CNTL_INDEX (0008)	0x00000308 (776)
> CLR_CMP_CLR_3D (1a24)	0x00000000 (0)
> CLR_CMP_CLR_DST (15c8)	0x00000000 (0)
> CLR_CMP_CLR_SRC (15c4)	0x00000000 (0)
>@@ -59,42 +59,40 @@
> CONFIG_APER_SIZE (0108)	0x04000000 (67108864)
> CONFIG_BONDS (00e8)	0x00000000 (0)
> CONFIG_CNTL (00e0)	0x00000100 (256)
>-CONFIG_MEMSIZE (00f8)	0x04000000 (67108864)
>+CONFIG_MEMSIZE (00f8)	0x0f000000 (251658240)
> CONFIG_MEMSIZE_EMBEDDED (0114)	0x00000000 (0)
> CONFIG_REG_1_BASE (010c)	0xe8108000 (-401571840)
> CONFIG_REG_APER_SIZE (0110)	0x00008000 (32768)
> CONFIG_XSTRAP (00e4)	0x00100000 (1048576)
> CONSTANT_COLOR_C (1d34)	0x00dbbfdb (14401499)
>-CRC_CMDFIFO_ADDR (0740)	0x40007f7f (1073774463)
>+CRC_CMDFIFO_ADDR (0740)	0x00000000 (0)
> CRC_CMDFIFO_DOUT (0744)	0x00000000 (0)
>-CRTC_CRNT_FRAME (0214)	0x00007164 (29028)
>+CRTC_CRNT_FRAME (0214)	0x00003629 (13865)
> CRTC_DEBUG (021c)	0x00000000 (0)
> CRTC_EXT_CNTL (0054)	0x00088048 (557128)
> CRTC_EXT_CNTL_DPMS_BYTE (0055)	0x02000880 (33556608)
>-CRTC_GEN_CNTL (0050)	0x03000600 (50333184)
>-CRTC2_GEN_CNTL (03f8)	0x02000600 (33555968)
>+CRTC_GEN_CNTL (0050)	0x03000400 (50332672)
>+CRTC2_GEN_CNTL (03f8)	0x04800000 (75497472)
> CRTC_GUI_TRIG_VLINE (0218)	0x00000000 (0)
>-CRTC_H_SYNC_STRT_WID (0204)	0x00110408 (1115144)
>-CRTC2_H_SYNC_STRT_WID (0304)	0x000a0650 (656976)
>+CRTC_H_SYNC_STRT_WID (0204)	0x00110410 (1115152)
>+CRTC2_H_SYNC_STRT_WID (0304)	0x00000000 (0)
> CRTC_H_TOTAL_DISP (0200)	0x007f00a4 (8323236)
>-CRTC2_H_TOTAL_DISP (0300)	0x00c700e0 (13041888)
>-CRTC_OFFSET (0224)	0x00040000 (262144)
>-CRTC2_OFFSET (0324)	0x00040000 (262144)
>+CRTC2_H_TOTAL_DISP (0300)	0x00000000 (0)
>+CRTC_OFFSET (0224)	0x00000000 (0)
>+CRTC2_OFFSET (0324)	0x00000000 (0)
> CRTC_OFFSET_CNTL (0228)	0x10000000 (268435456)
> CRTC2_OFFSET_CNTL (0328)	0x10000000 (268435456)
>-CRTC_PITCH (022c)	0x00c800c8 (13107400)
>-CRTC2_PITCH (032c)	0x000000c8 (200)
>+CRTC_PITCH (022c)	0x00000080 (128)
>+CRTC2_PITCH (032c)	0x00000000 (0)
> CRTC_STATUS (005c)	0x0000000e (14)
> CRTC_V_SYNC_STRT_WID (020c)	0x00060302 (393986)
>-CRTC2_V_SYNC_STRT_WID (030c)	0x00030384 (197508)
>+CRTC2_V_SYNC_STRT_WID (030c)	0x00000000 (0)
> CRTC_V_TOTAL_DISP (0208)	0x02ff0322 (50266914)
>-CRTC2_V_TOTAL_DISP (0308)	0x038303e7 (58917863)
>-CRTC_VLINE_CRNT_VLINE (0210)	0x029903ff (43582463)
>-CRTC2_CRNT_FRAME (0314)	0x000000c6 (198)
>+CRTC2_V_TOTAL_DISP (0308)	0x00000000 (0)
>+CRTC_VLINE_CRNT_VLINE (0210)	0x015403ff (22283263)
> CRTC2_DEBUG (031c)	0x00000000 (0)
>-CRTC2_GUI_TRIG_VLINE (0318)	0x00000000 (0)
>-CRTC2_STATUS (03fc)	0x00000006 (6)
>-CRTC2_VLINE_CRNT_VLINE (0310)	0x00240000 (2359296)
>+CRTC2_GUI_TRIG_VLINE (0318)	0x80000000 (-2147483648)
>+CRTC2_STATUS (03fc)	0x00000000 (0)
> CRTC8_DATA (03d5)	0x00000000 (0)
> CRTC8_IDX (03d4)	0x00000000 (0)
> CUR_CLR0 (026c)	0x00000000 (0)
>@@ -107,19 +105,19 @@
> CUR2_HORZ_VERT_OFF (0368)	0x00000000 (0)
> CUR2_HORZ_VERT_POSN (0364)	0x00000000 (0)
> CUR2_OFFSET (0360)	0x00000000 (0)
>-DAC_CNTL (0058)	0xff002102 (-16768766)
>-DAC_CNTL2 (007c)	0x00000021 (33)
>+DAC_CNTL (0058)	0xff604102 (-10469118)
>+DAC_CNTL2 (007c)	0x00000000 (0)
> DAC_EXT_CNTL (0280)	0x00000000 (0)
>-DAC_MACRO_CNTL (0d04)	0x00000808 (2056)
>+DAC_MACRO_CNTL (0d04)	0x00000806 (2054)
> TV_DAC_CNTL (088c)	0x07880142 (126353730)
> DISP_OUTPUT_CNTL (0d64)	0x10000000 (268435456)
> DISPLAY_BASE_ADDR (023c)	0x2c000000 (738197504)
>-DISPLAY2_BASE_ADDR (033c)	0x2c000000 (738197504)
>+DISPLAY2_BASE_ADDR (033c)	0x00000000 (0)
> DAC_CRC_SIG (02cc)	0x07ffffff (134217727)
>-DAC_DATA (03c9)	0x00000303 (771)
>-DAC_MASK (03c6)	0x0384000a (58982410)
>-DAC_R_INDEX (03c7)	0x03038400 (50562048)
>-DAC_W_INDEX (03c8)	0x00030384 (197508)
>+DAC_DATA (03c9)	0x00000000 (0)
>+DAC_MASK (03c6)	0x00000000 (0)
>+DAC_R_INDEX (03c7)	0x00000000 (0)
>+DAC_W_INDEX (03c8)	0x00000000 (0)
> DDA_CONFIG (02e0)	0x00000000 (0)
> DDA_ON_OFF (02e4)	0x00000000 (0)
> DEFAULT_OFFSET (16e0)	0x00000000 (0)
>@@ -186,24 +184,24 @@
> FP_CRTC2_V_TOTAL_DISP (0354)	0x00000000 (0)
> FP_GEN_CNTL (0284)	0x01c24000 (29507584)
> FP2_GEN_CNTL (0288)	0x00000000 (0)
>-FP_H_SYNC_STRT_WID (02c4)	0x00110408 (1115144)
>-FP_H2_SYNC_STRT_WID (03c4)	0x000a0650 (656976)
>-FP_HORZ_STRETCH (028c)	0x007f0000 (8323072)
>+FP_H_SYNC_STRT_WID (02c4)	0x00110410 (1115152)
>+FP_H2_SYNC_STRT_WID (03c4)	0x00000000 (0)
>+FP_HORZ_STRETCH (028c)	0x00000000 (0)
> FP_HORZ2_STRETCH (038c)	0x00000000 (0)
> FP_V_SYNC_STRT_WID (02c8)	0x00060302 (393986)
>-FP_VERT_STRETCH (0290)	0x002ff000 (3141632)
>-FP_V2_SYNC_STRT_WID (03c8)	0x00030384 (197508)
>+FP_VERT_STRETCH (0290)	0x00000000 (0)
>+FP_V2_SYNC_STRT_WID (03c8)	0x00000000 (0)
> FP_VERT2_STRETCH (0390)	0x00000000 (0)
> FW_CNTL (0118)	0x00000000 (0)
> FW_STATUS (011c)	0x00000000 (0)
> GEN_INT_CNTL (0040)	0x00000000 (0)
>-GEN_INT_STATUS (0044)	0x02080265 (34079333)
>-GENENB (03c3)	0x0a065000 (168185856)
>-GENFC_RD (03ca)	0x00000003 (3)
>+GEN_INT_STATUS (0044)	0x00080007 (524295)
>+GENENB (03c3)	0x00000000 (0)
>+GENFC_RD (03ca)	0x00000000 (0)
> GENFC_WT (03da)	0x00000000 (0)
> GENMO_RD (03cc)	0x00000000 (0)
>-GENMO_WT (03c2)	0x06500000 (105906176)
>-GENS0 (03c2)	0x06500000 (105906176)
>+GENMO_WT (03c2)	0x00000000 (0)
>+GENS0 (03c2)	0x00000000 (0)
> GENS1 (03da)	0x00000000 (0)
> GPIO_MONID (0068)	0x00000300 (768)
> GPIO_MONIDB (006c)	0x00000300 (768)
>@@ -212,8 +210,8 @@
> GPIO_VGA_DDC (0060)	0x00000300 (768)
> GRPH8_DATA (03cf)	0x00000000 (0)
> GRPH8_IDX (03ce)	0x00000000 (0)
>-GRPH_BUFFER_CNTL (02f0)	0x200d5c5c (537746524)
>-GRPH2_BUFFER_CNTL (03f0)	0x20005c5c (536894556)
>+GRPH_BUFFER_CNTL (02f0)	0x20065c5c (537287772)
>+GRPH2_BUFFER_CNTL (03f0)	0x20205c5c (538991708)
> MC_DEBUG (0188)	0x00000000 (0)
> GUI_DEBUG0 (16a0)	0x00000000 (0)
> GUI_DEBUG1 (16a4)	0x00000000 (0)
>@@ -222,8 +220,8 @@
> GUI_DEBUG4 (16b0)	0x00000001 (1)
> GUI_DEBUG5 (16b4)	0x00000000 (0)
> GUI_DEBUG6 (16b8)	0x00000000 (0)
>-GUI_SCRATCH_REG0 (15e0)	0x00000001 (1)
>-GUI_SCRATCH_REG1 (15e4)	0xdeadbeef (-559038737)
>+GUI_SCRATCH_REG0 (15e0)	0x00000000 (0)
>+GUI_SCRATCH_REG1 (15e4)	0x00000000 (0)
> GUI_SCRATCH_REG2 (15e8)	0x00000000 (0)
> GUI_SCRATCH_REG3 (15ec)	0x00000000 (0)
> GUI_SCRATCH_REG4 (15f0)	0x00000000 (0)
>@@ -250,11 +248,11 @@
> LEAD_BRES_DEC (1608)	0x00000000 (0)
> LEAD_BRES_LNTH (161c)	0x00000000 (0)
> LEAD_BRES_LNTH_SUB (1624)	0x00000000 (0)
>-LVDS_GEN_CNTL (02d0)	0x003cffa1 (3997601)
>+LVDS_GEN_CNTL (02d0)	0x083dffa1 (138280865)
> MAX_LATENCY (0f3f)	0x00000000 (0)
>-MC_AGP_LOCATION (014c)	0xefffec00 (-268440576)
>+MC_AGP_LOCATION (014c)	0x003f0000 (4128768)
> MC_FB_LOCATION (0148)	0x2fff2c00 (805252096)
>-MC_STATUS (0150)	0x0009001f (589855)
>+MC_STATUS (0150)	0x00090007 (589831)
> MDGPIO_A_REG (01ac)	0x00000000 (0)
> MDGPIO_EN_REG (01b0)	0x00000000 (0)
> MDGPIO_MASK (0198)	0x00000003 (3)
>@@ -263,9 +261,9 @@
> MEM_BASE (0f10)	0xf0000008 (-268435448)
> MEM_CNTL (0140)	0x20002e00 (536882688)
> MEM_INIT_LAT_TIMER (0154)	0x00000000 (0)
>-MEM_INTF_CNTL (014c)	0xefffec00 (-268440576)
>+MEM_INTF_CNTL (014c)	0x003f0000 (4128768)
> MEM_SDRAM_MODE_REG (0158)	0x1060006a (274727018)
>-MEM_STR_CNTL (0150)	0x0009001f (589855)
>+MEM_STR_CNTL (0150)	0x00090007 (589831)
> MEM_TIMING_CNTL (0144)	0x0f05155a (251991386)
> MC_CNTL (0178)	0x000f7beb (1014763)
> MC_ARB_CNTL (018c)	0x00030000 (196608)
>@@ -278,7 +276,7 @@
> MPP_GP_CONFIG (01c8)	0x0000001f (31)
> N_VIF_COUNT (0248)	0x00000000 (0)
> NB_TOM (015c)	0x2fff2c00 (805252096)
>-OV0_SCALE_CNTL (0420)	0x00000000 (0)
>+OV0_SCALE_CNTL (0420)	0x807f0000 (-2139160576)
> OVR_CLR (0230)	0x00000000 (0)
> OVR_WID_LEFT_RIGHT (0234)	0x00000000 (0)
> OVR_WID_TOP_BOTTOM (0238)	0x00000000 (0)
>@@ -287,7 +285,7 @@
> OV0_EXCLUSIVE_HORZ (0408)	0x00000008 (8)
> OV0_EXCLUSIVE_VERT (040c)	0x00000000 (0)
> OV0_REG_LOAD_CNTL (0410)	0x00000010 (16)
>-OV0_SCALE_CNTL (0420)	0x00000000 (0)
>+OV0_SCALE_CNTL (0420)	0x807f0000 (-2139160576)
> OV0_V_INC (0424)	0x00000000 (0)
> OV0_P1_V_ACCUM_INIT (0428)	0x00000001 (1)
> OV0_P23_V_ACCUM_INIT (042c)	0x00000001 (1)
>@@ -327,7 +325,7 @@
> PALETTE_30_DATA (00b8)	0x00401004 (4198404)
> PALETTE_INDEX (00b0)	0x00020002 (131074)
> PCI_GART_PAGE (017c)	0x004f7beb (5209067)
>-PIXCLKS_CNTL (CL: 002d)	0x0000f8c3 (63683)
>+PIXCLKS_CNTL (CL: 002d)	0x0000f8c0 (63680)
> VCLK_ECP_CNTL (CL: 0008)	0x000000c3 (195)
> MPLL_CNTL (CL: 000e)	0x00000000 (0)
> MCLK_CNTL (CL: 0012)	0x00000000 (0)
>@@ -336,29 +334,29 @@
> PPLL_DIV_2 (CL: 0006)	0x00020013 (131091)
> PPLL_DIV_3 (CL: 0007)	0x00020013 (131091)
> PPLL_REF_DIV (CL: 0003)	0x0003000e (196622)
>-P2PLL_REF_DIV (CL: 002b)	0x00000198 (408)
>-P2PLL_DIV_0 (CL: 002c)	0x000402b1 (262833)
>+P2PLL_REF_DIV (CL: 002b)	0x00000000 (0)
>+P2PLL_DIV_0 (CL: 002c)	0x00000000 (0)
> PPLL_CNTL (CL: 0002)	0x0000bf00 (48896)
>-P2PLL_CNTL (CL: 002a)	0x00007c00 (31744)
>+P2PLL_CNTL (CL: 002a)	0x00006403 (25603)
> SPLL_CNTL (CL: 000c)	0x04003800 (67123200)
> AGP_PLL_CNTL (CL: 000b)	0x00000000 (0)
> HTOTAL_CNTL (CL: 0009)	0x00000000 (0)
> HTOTAL2_CNTL (CL: 002e)	0x00000000 (0)
>-CLK_PIN_CNTL (CL: 0001)	0x0a018010 (167870480)
>+CLK_PIN_CNTL (CL: 0001)	0x0a008010 (167804944)
> CLK_PWRMGT_CNTL (CL: 0014)	0x00103400 (1061888)
>-PLL_PWRMGT_CNTL (CL: 0015)	0x0007c01e (507934)
>-SCLK_CNTL (CL: 000d)	0x00810002 (8454146)
>+PLL_PWRMGT_CNTL (CL: 0015)	0x0007e01e (516126)
>+SCLK_CNTL (CL: 000d)	0x00000002 (2)
> CLK_TEST_ONE (CL: 001d)	0x00000000 (0)
> PWRMAN_MISC (CL: 0016)	0x00000009 (9)
> SS_INT_CNTL (CL: 0033)	0x00000000 (0)
> PLANE_3D_MASK_C (1d44)	0xff7ffffc (-8388612)
> PMI_CAP_ID (0f5c)	0x2f000207 (788529671)
>-PMI_DATA (0f63)	0x0000000f (15)
>-PMI_NXT_CAP_PTR (0f5d)	0x042f0002 (70189058)
>-PMI_PMC_REG (0f5e)	0x03042f00 (50605824)
>-PMI_PMCSR_REG (0f60)	0x0f000304 (251659012)
>+PMI_DATA (0f63)	0x00000000 (0)
>+PMI_NXT_CAP_PTR (0f5d)	0x002f0002 (3080194)
>+PMI_PMC_REG (0f5e)	0x02002f00 (33566464)
>+PMI_PMCSR_REG (0f60)	0x00000200 (512)
> PMI_REGISTER (0f5c)	0x2f000207 (788529671)
>-PWR_MNGMT_CNTL_STATUS (0f60)	0x0f000304 (251659012)
>+PWR_MNGMT_CNTL_STATUS (0f60)	0x00000200 (512)
> DSTCACHE_MODE (1710)	0x00000000 (0)
> RBBM_SOFT_RESET (00f0)	0x00000000 (0)
> RBBM_STATUS (0e40)	0x00000140 (320)
>@@ -376,8 +374,8 @@
> SC_TOP_LEFT (16ec)	0x00000000 (0)
> SC_TOP_LEFT_C (1c88)	0x00000000 (0)
> SDRAM_MODE_REG (0158)	0x1060006a (274727018)
>-SEQ8_DATA (03c5)	0x84000a06 (-2080372218)
>-SEQ8_IDX (03c4)	0x000a0650 (656976)
>+SEQ8_DATA (03c5)	0x00000000 (0)
>+SEQ8_IDX (03c4)	0x00000000 (0)
> SNAPSHOT_F_COUNT (0244)	0x00000000 (0)
> SNAPSHOT_VH_COUNTS (0240)	0x00000000 (0)
> SNAPSHOT_VIF_COUNT (024c)	0x00000000 (0)
>@@ -394,7 +392,7 @@
> STATUS (0f06)	0x000002b0 (688)
> SUBPIC_CNTL (0540)	0x00000000 (0)
> SUB_CLASS (0f0a)	0x00000300 (768)
>-SURFACE_CNTL (0b00)	0x00000000 (0)
>+SURFACE_CNTL (0b00)	0x00000100 (256)
> SURFACE0_INFO (0b0c)	0x00000000 (0)
> SURFACE0_LOWER_BOUND (0b04)	0x00000000 (0)
> SURFACE0_UPPER_BOUND (0b08)	0x000007ff (2047)
>@@ -429,7 +427,7 @@
> TRAIL_BRES_INC (1610)	0x00000000 (0)
> TRAIL_X (1618)	0x00000000 (0)
> TRAIL_X_SUB (1620)	0x00000000 (0)
>-PIXCLKS_CNTL (002d)	0xa0000010 (-1610612720)
>+PIXCLKS_CNTL (002d)	0xa0000000 (-1610612736)
> VENDOR_ID (0f00)	0x43361002 (1127616514)
> VGA_DDA_CONFIG (02e8)	0x00000000 (0)
> VGA_DDA_ON_OFF (02ec)	0x63a1a020 (1671536672)
>@@ -458,7 +456,7 @@
> LVDS_PLL_CNTL (02d4)	0x0001128c (70284)
> TMDS_PLL_CNTL (02a8)	0x000006a4 (1700)
> TMDS_TRANSMITTER_CNTL (02a4)	0x10000082 (268435586)
>-ISYNC_CNTL (1724)	0x00000033 (51)
>+ISYNC_CNTL (1724)	0x00000000 (0)
> TV_MASTER_CNTL (0800)	0x400a0653 (1074398803)
> TV_PRE_DAC_MUX_CNTL (0888)	0x00000008 (8)
> TV_RGB_CNTL (0804)	0x007b0010 (8060944)

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Attachments on bug 30620: 39185 | 39186 | 39189 | 39190 | 39192 | 39197 | 68470

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