Attachment 72277 Details for Bug 58735 – patch to fix the regression

[patch] patch to fix the regression

nouveau-pll-fix.patch (text/plain), 1.48 KB, created by Aleksi Torhamo on 2012-12-29 21:50:16 UTC

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Creator: Aleksi Torhamo

Created: 2012-12-29 21:50:16 UTC

Size: 1.48 KB

patch

obsolete

>commit a60d3f515d3d5ade18a50d396dc2575f709219a0
>Author: Aleksi Torhamo <aleksi@torhamo.net>
>Date:   Sat Dec 29 23:30:21 2012 +0200
>
>    drm/nouveau/clock: fix support for more than 2 crtcs
>    
>    Fixes regression introduced in commit 70790f4f
>    "drm/nouveau/clock: pull in the implementation from all over the place"
>    
>    When code was moved from nv50_crtc_set_clock to nvc0_clock_pll_set,
>    the plls it is used for got limited to only the first two PLL_VPLLs.
>
>diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/bios/pll.h b/drivers/gpu/drm/nouveau/core/include/subdev/bios/pll.h
>index c345097..b2f3d4d 100644
>--- a/drivers/gpu/drm/nouveau/core/include/subdev/bios/pll.h
>+++ b/drivers/gpu/drm/nouveau/core/include/subdev/bios/pll.h
>@@ -38,6 +38,8 @@ enum nvbios_pll_type {
> 	PLL_UNK42  = 0x42,
> 	PLL_VPLL0  = 0x80,
> 	PLL_VPLL1  = 0x81,
>+	PLL_VPLL2  = 0x82,
>+	PLL_VPLL3  = 0x83,
> 	PLL_MAX    = 0xff
> };
> 
>diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
>index f6962c9..7c96262 100644
>--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
>+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
>@@ -52,6 +52,8 @@ nvc0_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
> 	switch (info.type) {
> 	case PLL_VPLL0:
> 	case PLL_VPLL1:
>+	case PLL_VPLL2:
>+	case PLL_VPLL3:
> 		nv_mask(priv, info.reg + 0x0c, 0x00000000, 0x00000100);
> 		nv_wr32(priv, info.reg + 0x04, (P << 16) | (N << 8) | M);
> 		nv_wr32(priv, info.reg + 0x10, fN << 16);

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