Attachment 76963 Details for Bug 62696 – RADEON_DEBUG=fp,vp output before

RADEON_DEBUG=fp,vp output before

vs-temp-array-mat2-index-col-row-rd-before.txt (text/plain), 33.25 KB, created by Pavel Ondračka on 2013-03-24 13:37:04 UTC

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Creator: Pavel Ondračka

Created: 2013-03-24 13:37:04 UTC

Size: 33.25 KB

patch

obsolete

>r300: Initial vertex program
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>Vertex Program: before compilation
># Radeon Compiler Program
>  0: MOV temp[0], input[0];
>  1: MOV output[1], input[1];
>  2: MOV output[0], temp[0];
>  3: MOV output[2], temp[0];
>Vertex Program: after 'emulate negative addressing'
># Radeon Compiler Program
>  0: MOV temp[0], input[0];
>  1: MOV output[1], input[1];
>  2: MOV output[0], temp[0];
>  3: MOV output[2], temp[0];
>Vertex Program: after 'native rewrite'
># Radeon Compiler Program
>  0: MOV temp[0], input[0];
>  1: MOV output[1], input[1];
>  2: MOV output[0], temp[0];
>  3: MOV output[2], temp[0];
>Vertex Program: after 'deadcode'
># Radeon Compiler Program
>  0: MOV temp[0], input[0];
>  1: MOV output[1], input[1];
>  2: MOV output[0], temp[0];
>  3: MOV output[2], temp[0];
>Vertex Program: after 'dataflow optimize'
># Radeon Compiler Program
>  0: MOV output[1], input[1];
>  1: MOV output[0], input[0];
>  2: MOV output[2], input[0];
>Vertex Program: after 'source conflict resolve'
># Radeon Compiler Program
>  0: MOV output[1], input[1];
>  1: MOV output[0], input[0];
>  2: MOV output[2], input[0];
>Vertex Program: after 'register allocation'
># Radeon Compiler Program
>  0: MOV output[1], input[1];
>  1: MOV output[0], input[0];
>  2: MOV output[2], input[0];
>Vertex Program: after 'dead constants'
># Radeon Compiler Program
>  0: MOV output[1], input[1];
>  1: MOV output[0], input[0];
>  2: MOV output[2], input[0];
>Vertex Program: after 'lower control flow opcodes'
># Radeon Compiler Program
>  0: MOV output[1], input[1];
>  1: MOV output[0], input[0];
>  2: MOV output[2], input[0];
>Final vertex program code:
>0: op: 0x00f02203 dst: 1o op:                    VE_ADD
> src0: 0x00d10021 reg: 1i swiz:  X/ Y/ Z/ W
> src1: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
> src2: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
>1: op: 0x00f00203 dst: 0o op:                    VE_ADD
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
> src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
>2: op: 0x00f04203 dst: 2o op:                    VE_ADD
> src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
> src1: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
> src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
>Flow Control Ops: 0x00000000
>r300: DRM version: 2.29.0, Name: ATI RV530, ID: 0x71c5, GB: 1, Z: 2
>r300: GART size: 509 MB, VRAM size: 256 MB
>r300: AA compression RAM: YES, Z compression RAM: YES, HiZ RAM: YES
>r300: Initial vertex program
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..7]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     3.0000,     4.0000}
>IMM[1] FLT32 {    5.0000,     6.0000,     7.0000,     8.0000}
>IMM[2] FLT32 {    9.0000,    10.0000,    11.0000,    12.0000}
>IMM[3] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[4], IN[0].xxxx
>  1: MAD TEMP[0], CONST[5], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[6], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[7], IN[0].wwww, TEMP[0]
>  4: SEQ TEMP[1].xy, CONST[3].xxxx, IMM[0].xyyy
>  5: CMP TEMP[2].xy, -TEMP[1].xxxx, IMM[1].xyyy, IMM[0].xyyy
>  6: CMP TEMP[3].xy, -TEMP[1].xxxx, IMM[1].zwww, IMM[0].zwww
>  7: CMP TEMP[2].xy, -TEMP[1].yyyy, IMM[2].xyyy, TEMP[2].xyyy
>  8: CMP TEMP[3].xy, -TEMP[1].yyyy, IMM[2].zwww, TEMP[3].xyyy
>  9: SEQ TEMP[1].x, CONST[2].xxxx, IMM[0].xxxx
> 10: CMP TEMP[2].xy, -TEMP[1].xxxx, TEMP[3].xyxx, TEMP[2].xyyy
> 11: SEQ TEMP[3].y, CONST[1].xxxx, IMM[3].xyyy
> 12: CMP TEMP[2].x, -TEMP[3].yyyy, TEMP[2].yyyy, TEMP[2].xxxx
> 13: SEQ TEMP[2].x, TEMP[2].xxxx, CONST[0].xxxx
> 14: IF TEMP[2].xxxx :0
> 15:   MOV TEMP[2], IMM[3].xyxy
> 16: ELSE :0
> 17:   MOV TEMP[2], IMM[3].yxxy
> 18: ENDIF
> 19: MOV OUT[1], TEMP[2]
> 20: MOV OUT[0], TEMP[0]
> 21: END
>Vertex Program: before compilation
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: SEQ temp[1].xy, const[3].xxxx, const[8].xyyy;
>  5: CMP temp[2].xy, -temp[1].xxxx, const[9].xyyy, const[8].xyyy;
>  6: CMP temp[3].xy, -temp[1].xxxx, const[9].zwww, const[8].zwww;
>  7: CMP temp[2].xy, -temp[1].yyyy, const[10].xyyy, temp[2].xyyy;
>  8: CMP temp[3].xy, -temp[1].yyyy, const[10].zwww, temp[3].xyyy;
>  9: SEQ temp[1].x, const[2].xxxx, const[8].xxxx;
> 10: CMP temp[2].xy, -temp[1].xxxx, temp[3].xyxx, temp[2].xyyy;
> 11: SEQ temp[3].y, const[1].xxxx, temp[0].0111;
> 12: CMP temp[2].x, -temp[3].yyyy, temp[2].yyyy, temp[2].xxxx;
> 13: SEQ temp[2].x, temp[2].xxxx, const[0].xxxx;
> 14: IF temp[2].xxxx;
> 15:   MOV temp[2], temp[0].0101;
> 16: ELSE;
> 17:   MOV temp[2], temp[0].1001;
> 18: ENDIF;
> 19: MOV output[1], temp[2];
> 20: MOV temp[4], temp[0];
> 21: MOV output[0], temp[4];
> 22: MOV output[2], temp[4];
>Vertex Program: after 'emulate negative addressing'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: SEQ temp[1].xy, const[3].xxxx, const[8].xyyy;
>  5: CMP temp[2].xy, -temp[1].xxxx, const[9].xyyy, const[8].xyyy;
>  6: CMP temp[3].xy, -temp[1].xxxx, const[9].zwww, const[8].zwww;
>  7: CMP temp[2].xy, -temp[1].yyyy, const[10].xyyy, temp[2].xyyy;
>  8: CMP temp[3].xy, -temp[1].yyyy, const[10].zwww, temp[3].xyyy;
>  9: SEQ temp[1].x, const[2].xxxx, const[8].xxxx;
> 10: CMP temp[2].xy, -temp[1].xxxx, temp[3].xyxx, temp[2].xyyy;
> 11: SEQ temp[3].y, const[1].xxxx, temp[0].0111;
> 12: CMP temp[2].x, -temp[3].yyyy, temp[2].yyyy, temp[2].xxxx;
> 13: SEQ temp[2].x, temp[2].xxxx, const[0].xxxx;
> 14: IF temp[2].xxxx;
> 15:   MOV temp[2], temp[0].0101;
> 16: ELSE;
> 17:   MOV temp[2], temp[0].1001;
> 18: ENDIF;
> 19: MOV output[1], temp[2];
> 20: MOV temp[4], temp[0];
> 21: MOV output[0], temp[4];
> 22: MOV output[2], temp[4];
>Vertex Program: after 'native rewrite'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: SEQ temp[1].xy, const[3].xxxx, const[8].xyyy;
>  5: SLT temp[2].xy, -temp[1].xxxx, none.0000;
>  6: ADD temp[5].xy, const[9].xyyy, -const[8].xyyy;
>  7: MAD temp[2].xy, temp[2], temp[5], const[8].xyyy;
>  8: SLT temp[3].xy, -temp[1].xxxx, none.0000;
>  9: ADD temp[6].xy, const[9].zwww, -const[8].zwww;
> 10: MAD temp[3].xy, temp[3], temp[6], const[8].zwww;
> 11: SLT temp[7].xy, -temp[1].yyyy, none.0000;
> 12: ADD temp[8].xy, const[10].xyyy, -temp[2].xyyy;
> 13: MAD temp[2].xy, temp[7], temp[8], temp[2].xyyy;
> 14: SLT temp[9].xy, -temp[1].yyyy, none.0000;
> 15: ADD temp[10].xy, const[10].zwww, -temp[3].xyyy;
> 16: MAD temp[3].xy, temp[9], temp[10], temp[3].xyyy;
> 17: SEQ temp[1].x, const[2].xxxx, const[8].xxxx;
> 18: SLT temp[11].xy, -temp[1].xxxx, none.0000;
> 19: ADD temp[12].xy, temp[3].xyxx, -temp[2].xyyy;
> 20: MAD temp[2].xy, temp[11], temp[12], temp[2].xyyy;
> 21: SEQ temp[3].y, const[1].xxxx, temp[0].0111;
> 22: SLT temp[13].x, -temp[3].yyyy, none.0000;
> 23: ADD temp[14].x, temp[2].yyyy, -temp[2].xxxx;
> 24: MAD temp[2].x, temp[13], temp[14], temp[2].xxxx;
> 25: SEQ temp[2].x, temp[2].xxxx, const[0].xxxx;
> 26: IF temp[2].xxxx;
> 27:   MOV temp[2], temp[0].0101;
> 28: ELSE;
> 29:   MOV temp[2], temp[0].1001;
> 30: ENDIF;
> 31: MOV output[1], temp[2];
> 32: MOV temp[4], temp[0];
> 33: MOV output[0], temp[4];
> 34: MOV output[2], temp[4];
>Vertex Program: after 'deadcode'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: SEQ temp[1].xy, const[3].xx__, const[8].xy__;
>  5: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  6: ADD temp[5].xy, const[9].xy__, -const[8].xy__;
>  7: MAD temp[2].xy, temp[2].xy__, temp[5].xy__, const[8].xy__;
>  8: SLT temp[3].xy, -temp[1].xx__, none.00__;
>  9: ADD temp[6].xy, const[9].zw__, -const[8].zw__;
> 10: MAD temp[3].xy, temp[3].xy__, temp[6].xy__, const[8].zw__;
> 11: SLT temp[7].xy, -temp[1].yy__, none.00__;
> 12: ADD temp[8].xy, const[10].xy__, -temp[2].xy__;
> 13: MAD temp[2].xy, temp[7].xy__, temp[8].xy__, temp[2].xy__;
> 14: SLT temp[9].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[10].xy, const[10].zw__, -temp[3].xy__;
> 16: MAD temp[3].xy, temp[9].xy__, temp[10].xy__, temp[3].xy__;
> 17: SEQ temp[1].x, const[2].x___, const[8].x___;
> 18: SLT temp[11].xy, -temp[1].xx__, none.00__;
> 19: ADD temp[12].xy, temp[3].xy__, -temp[2].xy__;
> 20: MAD temp[2].xy, temp[11].xy__, temp[12].xy__, temp[2].xy__;
> 21: SEQ temp[3].y, const[1]._x__, temp[0]._1__;
> 22: SLT temp[13].x, -temp[3].y___, none.0___;
> 23: ADD temp[14].x, temp[2].y___, -temp[2].x___;
> 24: MAD temp[2].x, temp[13].x___, temp[14].x___, temp[2].x___;
> 25: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 26: IF temp[2].x___;
> 27:   MOV temp[2], temp[0].0101;
> 28: ELSE;
> 29:   MOV temp[2], temp[0].1001;
> 30: ENDIF;
> 31: MOV output[1], temp[2];
> 32: MOV temp[4], temp[0];
> 33: MOV output[0], temp[4];
> 34: MOV output[2], temp[4];
>Vertex Program: after 'dataflow optimize'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: SEQ temp[1].xy, const[3].xx__, const[8].1y__;
>  5: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  6: ADD temp[5].xy, const[9].xy__, -const[8].1y__;
>  7: MAD temp[2].xy, temp[2].xy__, temp[5].xy__, const[8].1y__;
>  8: SLT temp[3].xy, -temp[1].xx__, none.00__;
>  9: ADD temp[6].xy, const[9].zw__, -const[8].zw__;
> 10: MAD temp[3].xy, temp[3].xy__, temp[6].xy__, const[8].zw__;
> 11: SLT temp[7].xy, -temp[1].yy__, none.00__;
> 12: ADD temp[8].xy, const[10].xy__, -temp[2].xy__;
> 13: MAD temp[2].xy, temp[7].xy__, temp[8].xy__, temp[2].xy__;
> 14: SLT temp[9].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[10].xy, const[10].zw__, -temp[3].xy__;
> 16: MAD temp[3].xy, temp[9].xy__, temp[10].xy__, temp[3].xy__;
> 17: SEQ temp[1].x, const[2].x___, none.1___;
> 18: SLT temp[11].xy, -temp[1].xx__, none.00__;
> 19: ADD temp[12].xy, temp[3].xy__, -temp[2].xy__;
> 20: MAD temp[2].xy, temp[11].xy__, temp[12].xy__, temp[2].xy__;
> 21: SEQ temp[3].y, const[1]._x__, none._1__;
> 22: SLT temp[13].x, -temp[3].y___, none.0___;
> 23: ADD temp[14].x, temp[2].y___, -temp[2].x___;
> 24: MAD temp[2].x, temp[13].x___, temp[14].x___, temp[2].x___;
> 25: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 26: IF temp[2].x___;
> 27:   MOV temp[2], none.0101;
> 28: ELSE;
> 29:   MOV temp[2], none.1001;
> 30: ENDIF;
> 31: MOV output[1], temp[2];
> 32: MOV output[0], temp[0];
> 33: MOV output[2], temp[0];
>Vertex Program: after 'source conflict resolve'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: MOV temp[4], const[8].1y__;
>  5: SEQ temp[1].xy, const[3].xx__, temp[4];
>  6: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  7: MOV temp[15], -const[8].1y__;
>  8: ADD temp[5].xy, const[9].xy__, temp[15];
>  9: MAD temp[2].xy, temp[2].xy__, temp[5].xy__, const[8].1y__;
> 10: SLT temp[3].xy, -temp[1].xx__, none.00__;
> 11: MOV temp[16], -const[8].zw__;
> 12: ADD temp[6].xy, const[9].zw__, temp[16];
> 13: MAD temp[3].xy, temp[3].xy__, temp[6].xy__, const[8].zw__;
> 14: SLT temp[7].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[8].xy, const[10].xy__, -temp[2].xy__;
> 16: MAD temp[2].xy, temp[7].xy__, temp[8].xy__, temp[2].xy__;
> 17: SLT temp[9].xy, -temp[1].yy__, none.00__;
> 18: ADD temp[10].xy, const[10].zw__, -temp[3].xy__;
> 19: MAD temp[3].xy, temp[9].xy__, temp[10].xy__, temp[3].xy__;
> 20: SEQ temp[1].x, const[2].x___, none.1___;
> 21: SLT temp[11].xy, -temp[1].xx__, none.00__;
> 22: ADD temp[12].xy, temp[3].xy__, -temp[2].xy__;
> 23: MAD temp[2].xy, temp[11].xy__, temp[12].xy__, temp[2].xy__;
> 24: SEQ temp[3].y, const[1]._x__, none._1__;
> 25: SLT temp[13].x, -temp[3].y___, none.0___;
> 26: ADD temp[14].x, temp[2].y___, -temp[2].x___;
> 27: MAD temp[2].x, temp[13].x___, temp[14].x___, temp[2].x___;
> 28: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 29: IF temp[2].x___;
> 30:   MOV temp[2], none.0101;
> 31: ELSE;
> 32:   MOV temp[2], none.1001;
> 33: ENDIF;
> 34: MOV output[1], temp[2];
> 35: MOV output[0], temp[0];
> 36: MOV output[2], temp[0];
>Vertex Program: after 'register allocation'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: MOV temp[1], const[8].1y__;
>  5: SEQ temp[1].xy, const[3].xx__, temp[1];
>  6: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  7: MOV temp[3], -const[8].1y__;
>  8: ADD temp[3].xy, const[9].xy__, temp[3];
>  9: MAD temp[2].xy, temp[2].xy__, temp[3].xy__, const[8].1y__;
> 10: SLT temp[3].xy, -temp[1].xx__, none.00__;
> 11: MOV temp[4], -const[8].zw__;
> 12: ADD temp[4].xy, const[9].zw__, temp[4];
> 13: MAD temp[3].xy, temp[3].xy__, temp[4].xy__, const[8].zw__;
> 14: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[5].xy, const[10].xy__, -temp[2].xy__;
> 16: MAD temp[2].xy, temp[4].xy__, temp[5].xy__, temp[2].xy__;
> 17: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 18: ADD temp[5].xy, const[10].zw__, -temp[3].xy__;
> 19: MAD temp[3].xy, temp[4].xy__, temp[5].xy__, temp[3].xy__;
> 20: SEQ temp[1].x, const[2].x___, none.1___;
> 21: SLT temp[1].xy, -temp[1].xx__, none.00__;
> 22: ADD temp[4].xy, temp[3].xy__, -temp[2].xy__;
> 23: MAD temp[2].xy, temp[1].xy__, temp[4].xy__, temp[2].xy__;
> 24: SEQ temp[3].y, const[1]._x__, none._1__;
> 25: SLT temp[1].x, -temp[3].y___, none.0___;
> 26: ADD temp[3].x, temp[2].y___, -temp[2].x___;
> 27: MAD temp[2].x, temp[1].x___, temp[3].x___, temp[2].x___;
> 28: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 29: IF temp[2].x___;
> 30:   MOV temp[2], none.0101;
> 31: ELSE;
> 32:   MOV temp[2], none.1001;
> 33: ENDIF;
> 34: MOV output[1], temp[2];
> 35: MOV output[0], temp[0];
> 36: MOV output[2], temp[0];
>CONST[8] = {     1.0000     2.0000     3.0000     4.0000 }
>CONST[9] = {     5.0000     6.0000     7.0000     8.0000 }
>CONST[10] = {     9.0000    10.0000    11.0000    12.0000 }
>Vertex Program: after 'dead constants'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: MOV temp[1], const[8].1y__;
>  5: SEQ temp[1].xy, const[3].xx__, temp[1];
>  6: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  7: MOV temp[3], -const[8].1y__;
>  8: ADD temp[3].xy, const[9].xy__, temp[3];
>  9: MAD temp[2].xy, temp[2].xy__, temp[3].xy__, const[8].1y__;
> 10: SLT temp[3].xy, -temp[1].xx__, none.00__;
> 11: MOV temp[4], -const[8].zw__;
> 12: ADD temp[4].xy, const[9].zw__, temp[4];
> 13: MAD temp[3].xy, temp[3].xy__, temp[4].xy__, const[8].zw__;
> 14: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[5].xy, const[10].xy__, -temp[2].xy__;
> 16: MAD temp[2].xy, temp[4].xy__, temp[5].xy__, temp[2].xy__;
> 17: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 18: ADD temp[5].xy, const[10].zw__, -temp[3].xy__;
> 19: MAD temp[3].xy, temp[4].xy__, temp[5].xy__, temp[3].xy__;
> 20: SEQ temp[1].x, const[2].x___, none.1___;
> 21: SLT temp[1].xy, -temp[1].xx__, none.00__;
> 22: ADD temp[4].xy, temp[3].xy__, -temp[2].xy__;
> 23: MAD temp[2].xy, temp[1].xy__, temp[4].xy__, temp[2].xy__;
> 24: SEQ temp[3].y, const[1]._x__, none._1__;
> 25: SLT temp[1].x, -temp[3].y___, none.0___;
> 26: ADD temp[3].x, temp[2].y___, -temp[2].x___;
> 27: MAD temp[2].x, temp[1].x___, temp[3].x___, temp[2].x___;
> 28: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 29: IF temp[2].x___;
> 30:   MOV temp[2], none.0101;
> 31: ELSE;
> 32:   MOV temp[2], none.1001;
> 33: ENDIF;
> 34: MOV output[1], temp[2];
> 35: MOV output[0], temp[0];
> 36: MOV output[2], temp[0];
>Vertex Program: after 'lower control flow opcodes'
># Radeon Compiler Program
>  0: MUL temp[0], const[4], input[0].xxxx;
>  1: MAD temp[0], const[5], input[0].yyyy, temp[0];
>  2: MAD temp[0], const[6], input[0].zzzz, temp[0];
>  3: MAD temp[0], const[7], input[0].wwww, temp[0];
>  4: MOV temp[1], const[8].1y__;
>  5: SEQ temp[1].xy, const[3].xx__, temp[1];
>  6: SLT temp[2].xy, -temp[1].xx__, none.00__;
>  7: MOV temp[3], -const[8].1y__;
>  8: ADD temp[3].xy, const[9].xy__, temp[3];
>  9: MAD temp[2].xy, temp[2].xy__, temp[3].xy__, const[8].1y__;
> 10: SLT temp[3].xy, -temp[1].xx__, none.00__;
> 11: MOV temp[4], -const[8].zw__;
> 12: ADD temp[4].xy, const[9].zw__, temp[4];
> 13: MAD temp[3].xy, temp[3].xy__, temp[4].xy__, const[8].zw__;
> 14: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 15: ADD temp[5].xy, const[10].xy__, -temp[2].xy__;
> 16: MAD temp[2].xy, temp[4].xy__, temp[5].xy__, temp[2].xy__;
> 17: SLT temp[4].xy, -temp[1].yy__, none.00__;
> 18: ADD temp[5].xy, const[10].zw__, -temp[3].xy__;
> 19: MAD temp[3].xy, temp[4].xy__, temp[5].xy__, temp[3].xy__;
> 20: SEQ temp[1].x, const[2].x___, none.1___;
> 21: SLT temp[1].xy, -temp[1].xx__, none.00__;
> 22: ADD temp[4].xy, temp[3].xy__, -temp[2].xy__;
> 23: MAD temp[2].xy, temp[1].xy__, temp[4].xy__, temp[2].xy__;
> 24: SEQ temp[3].y, const[1]._x__, none._1__;
> 25: SLT temp[1].x, -temp[3].y___, none.0___;
> 26: ADD temp[3].x, temp[2].y___, -temp[2].x___;
> 27: MAD temp[2].x, temp[1].x___, temp[3].x___, temp[2].x___;
> 28: SEQ temp[2].x, temp[2].x___, const[0].x___;
> 29: ME_PRED_SNEQ temp[6].w, temp[2].x___;
> 30: MOV temp[2], none.0101; PRED_SET
> 31: ME_PRED_SET_INV temp[6].w, temp[6].___w;
> 32: MOV temp[2], none.1001; PRED_SET
> 33: ME_PRED_SET_POP temp[6].w, temp[6].___w;
> 34: MOV output[1], temp[2];
> 35: MOV output[0], temp[0];
> 36: MOV output[2], temp[0];
>Final vertex program code:
>0: op: 0x00f00002 dst: 0t op:               VE_MULTIPLY
> src0: 0x00d10082 reg: 4c swiz:  X/ Y/ Z/ W
> src1: 0x00000001 reg: 0i swiz:  X/ X/ X/ X
> src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
>1: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
> src0: 0x00d100a2 reg: 5c swiz:  X/ Y/ Z/ W
> src1: 0x00492001 reg: 0i swiz:  Y/ Y/ Y/ Y
> src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
>2: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
> src0: 0x00d100c2 reg: 6c swiz:  X/ Y/ Z/ W
> src1: 0x00924001 reg: 0i swiz:  Z/ Z/ Z/ Z
> src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
>3: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
> src0: 0x00d100e2 reg: 7c swiz:  X/ Y/ Z/ W
> src1: 0x00db6001 reg: 0i swiz:  W/ W/ W/ W
> src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
>4: op: 0x00f02003 dst: 1t op:                    VE_ADD
> src0: 0x01f9a102 reg: 8c swiz:  1/ Y/ U/ U
> src1: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
> src2: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
>5: op: 0x0030201b dst: 1t op:              VE_SET_EQUAL
> src0: 0x01f80062 reg: 3c swiz:  X/ X/ U/ U
> src1: 0x00d10020 reg: 1t swiz:  X/ Y/ Z/ W
> src2: 0x01248020 reg: 1t swiz:  0/ 0/ 0/ 0
>6: op: 0x0030400a dst: 2t op:          VE_SET_LESS_THAN
> src0: 0x1ff80020 reg: 1t swiz: -X/-X/-U/-U
> src1: 0x01fc8000 reg: 0t swiz:  0/ 0/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>7: op: 0x00f06003 dst: 3t op:                    VE_ADD
> src0: 0x1ff9a102 reg: 8c swiz: -1/-Y/-U/-U
> src1: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
> src2: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
>8: op: 0x00306003 dst: 3t op:                    VE_ADD
> src0: 0x01f90122 reg: 9c swiz:  X/ Y/ U/ U
> src1: 0x00d10060 reg: 3t swiz:  X/ Y/ Z/ W
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>9: op: 0x00304004 dst: 2t op:           VE_MULTIPLY_ADD
> src0: 0x01f90040 reg: 2t swiz:  X/ Y/ U/ U
> src1: 0x01f90060 reg: 3t swiz:  X/ Y/ U/ U
> src2: 0x01f9a102 reg: 8c swiz:  1/ Y/ U/ U
>10: op: 0x0030600a dst: 3t op:          VE_SET_LESS_THAN
> src0: 0x1ff80020 reg: 1t swiz: -X/-X/-U/-U
> src1: 0x01fc8000 reg: 0t swiz:  0/ 0/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>11: op: 0x00f08003 dst: 4t op:                    VE_ADD
> src0: 0x1ffb4102 reg: 8c swiz: -Z/-W/-U/-U
> src1: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
> src2: 0x01248102 reg: 8c swiz:  0/ 0/ 0/ 0
>12: op: 0x00308003 dst: 4t op:                    VE_ADD
> src0: 0x01fb4122 reg: 9c swiz:  Z/ W/ U/ U
> src1: 0x00d10080 reg: 4t swiz:  X/ Y/ Z/ W
> src2: 0x01248080 reg: 4t swiz:  0/ 0/ 0/ 0
>13: op: 0x00306004 dst: 3t op:           VE_MULTIPLY_ADD
> src0: 0x01f90060 reg: 3t swiz:  X/ Y/ U/ U
> src1: 0x01f90080 reg: 4t swiz:  X/ Y/ U/ U
> src2: 0x01fb4102 reg: 8c swiz:  Z/ W/ U/ U
>14: op: 0x0030800a dst: 4t op:          VE_SET_LESS_THAN
> src0: 0x1ff92020 reg: 1t swiz: -Y/-Y/-U/-U
> src1: 0x01fc8000 reg: 0t swiz:  0/ 0/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>15: op: 0x0030a003 dst: 5t op:                    VE_ADD
> src0: 0x01f90142 reg: 10c swiz:  X/ Y/ U/ U
> src1: 0x1ff90040 reg: 2t swiz: -X/-Y/-U/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>16: op: 0x00304080 dst: 2t op:    PVS_MACRO_OP_2CLK_MADD
> src0: 0x01f90080 reg: 4t swiz:  X/ Y/ U/ U
> src1: 0x01f900a0 reg: 5t swiz:  X/ Y/ U/ U
> src2: 0x01f90040 reg: 2t swiz:  X/ Y/ U/ U
>17: op: 0x0030800a dst: 4t op:          VE_SET_LESS_THAN
> src0: 0x1ff92020 reg: 1t swiz: -Y/-Y/-U/-U
> src1: 0x01fc8000 reg: 0t swiz:  0/ 0/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>18: op: 0x0030a003 dst: 5t op:                    VE_ADD
> src0: 0x01fb4142 reg: 10c swiz:  Z/ W/ U/ U
> src1: 0x1ff90060 reg: 3t swiz: -X/-Y/-U/-U
> src2: 0x01248060 reg: 3t swiz:  0/ 0/ 0/ 0
>19: op: 0x00306080 dst: 3t op:    PVS_MACRO_OP_2CLK_MADD
> src0: 0x01f90080 reg: 4t swiz:  X/ Y/ U/ U
> src1: 0x01f900a0 reg: 5t swiz:  X/ Y/ U/ U
> src2: 0x01f90060 reg: 3t swiz:  X/ Y/ U/ U
>20: op: 0x0010201b dst: 1t op:              VE_SET_EQUAL
> src0: 0x01ff0042 reg: 2c swiz:  X/ U/ U/ U
> src1: 0x01ffa000 reg: 0t swiz:  1/ U/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>21: op: 0x0030200a dst: 1t op:          VE_SET_LESS_THAN
> src0: 0x1ff80020 reg: 1t swiz: -X/-X/-U/-U
> src1: 0x01fc8000 reg: 0t swiz:  0/ 0/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>22: op: 0x00308003 dst: 4t op:                    VE_ADD
> src0: 0x01f90060 reg: 3t swiz:  X/ Y/ U/ U
> src1: 0x1ff90040 reg: 2t swiz: -X/-Y/-U/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>23: op: 0x00304080 dst: 2t op:    PVS_MACRO_OP_2CLK_MADD
> src0: 0x01f90020 reg: 1t swiz:  X/ Y/ U/ U
> src1: 0x01f90080 reg: 4t swiz:  X/ Y/ U/ U
> src2: 0x01f90040 reg: 2t swiz:  X/ Y/ U/ U
>24: op: 0x0020601b dst: 3t op:              VE_SET_EQUAL
> src0: 0x01f8e022 reg: 1c swiz:  U/ X/ U/ U
> src1: 0x01fde000 reg: 0t swiz:  U/ 1/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>25: op: 0x0010200a dst: 1t op:          VE_SET_LESS_THAN
> src0: 0x1fff2060 reg: 3t swiz: -Y/-U/-U/-U
> src1: 0x01ff8000 reg: 0t swiz:  0/ U/ U/ U
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>26: op: 0x00106003 dst: 3t op:                    VE_ADD
> src0: 0x01ff2040 reg: 2t swiz:  Y/ U/ U/ U
> src1: 0x1fff0040 reg: 2t swiz: -X/-U/-U/-U
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>27: op: 0x00104080 dst: 2t op:    PVS_MACRO_OP_2CLK_MADD
> src0: 0x01ff0020 reg: 1t swiz:  X/ U/ U/ U
> src1: 0x01ff0060 reg: 3t swiz:  X/ U/ U/ U
> src2: 0x01ff0040 reg: 2t swiz:  X/ U/ U/ U
>28: op: 0x0010401b dst: 2t op:              VE_SET_EQUAL
> src0: 0x01ff0040 reg: 2t swiz:  X/ U/ U/ U
> src1: 0x01ff0002 reg: 0c swiz:  X/ U/ U/ U
> src2: 0x01248002 reg: 0c swiz:  0/ 0/ 0/ 0
>29: op: 0x0080c058 dst: 6t op:           ME_PRED_SET_NEQ
> src0: 0x00000040 reg: 2t swiz:  X/ X/ X/ X
> src1: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>30: op: 0x0cf04003 dst: 2t op: PRED 1                   VE_ADD
> src0: 0x01658000 reg: 0t swiz:  0/ 1/ 0/ 1
> src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>31: op: 0x0080c05a dst: 6t op:           ME_PRED_SET_INV
> src0: 0x00db60c0 reg: 6t swiz:  W/ W/ W/ W
> src1: 0x012480c0 reg: 6t swiz:  0/ 0/ 0/ 0
> src2: 0x012480c0 reg: 6t swiz:  0/ 0/ 0/ 0
>32: op: 0x0cf04003 dst: 2t op: PRED 1                   VE_ADD
> src0: 0x0164a000 reg: 0t swiz:  1/ 0/ 0/ 1
> src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>33: op: 0x0080c05b dst: 6t op:           ME_PRED_SET_POP
> src0: 0x00db60c0 reg: 6t swiz:  W/ W/ W/ W
> src1: 0x012480c0 reg: 6t swiz:  0/ 0/ 0/ 0
> src2: 0x012480c0 reg: 6t swiz:  0/ 0/ 0/ 0
>34: op: 0x00f02203 dst: 1o op:                    VE_ADD
> src0: 0x00d10040 reg: 2t swiz:  X/ Y/ Z/ W
> src1: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
> src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
>35: op: 0x00f00203 dst: 0o op:                    VE_ADD
> src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
> src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>36: op: 0x00f04203 dst: 2o op:                    VE_ADD
> src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
> src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
> src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
>Flow Control Ops: 0x00000000
>r300: Initial fragment program
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'rewrite depth out'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'transform KILP'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'unroll loops'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'transform TEX'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'transform IF'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'native rewrite'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'deadcode'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'register rename'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'dataflow optimize'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'inline literals'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'dataflow swizzles'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'dead constants'
># Radeon Compiler Program
>  0: MOV output[0], input[0];
>Fragment Program: after 'pair translate'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'pair scheduling'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'dead sources'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'register allocation'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>R500 Fragment Program:
>--------
>0	0:CMN_INST   0x00078005:OUT TEX_WAIT    wmask: NONE omask: ARGB
>	1:RGB_ADDR   0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	3 RGB_INST:  0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0
>	4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0
>	5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0
>
>r300: Initial fragment program
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'rewrite depth out'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'transform KILP'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'unroll loops'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'transform TEX'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'transform IF'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'native rewrite'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'deadcode'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'register rename'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'dataflow optimize'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'inline literals'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'dataflow swizzles'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'dead constants'
># Radeon Compiler Program
>  0: MOV_SAT output[0], input[0];
>Fragment Program: after 'pair translate'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD_SAT color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'pair scheduling'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD_SAT color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'dead sources'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD_SAT color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'register allocation'
># Radeon Compiler Program
>  0: src0.xyz = input[0], src0.w = input[0]
>     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD_SAT color[0].w, src0.w, src0.1, src0.0
>R500 Fragment Program:
>--------
>0	0:CMN_INST   0x001f8005:OUT TEX_WAIT    wmask: NONE omask: ARGB
>	1:RGB_ADDR   0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	3 RGB_INST:  0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0
>	4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0
>	5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0
>
>r300: Initial fragment program
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>Fragment Program: before compilation
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after 'rewrite depth out'
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after 'transform KILP'
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after 'unroll loops'
># Radeon Compiler Program
>  0: TEX output[0], input[0], 2D[0];
>Fragment Program: after 'transform TEX'
># Radeon Compiler Program
>  0: TEX temp[1], input[0], 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after 'transform IF'
># Radeon Compiler Program
>  0: TEX temp[1], input[0], 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after 'native rewrite'
># Radeon Compiler Program
>  0: TEX temp[1], input[0], 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after 'deadcode'
># Radeon Compiler Program
>  0: TEX temp[1], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[1];
>Fragment Program: after 'register rename'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after 'dataflow optimize'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after 'inline literals'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after 'dataflow swizzles'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after 'dead constants'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: MOV output[0], temp[0];
>Fragment Program: after 'pair translate'
># Radeon Compiler Program
>  0: TEX temp[0], input[0].xy__, 2D[0];
>  1: src0.xyz = temp[0], src0.w = temp[0]
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'pair scheduling'
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE;
>  2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'dead sources'
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE;
>  2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>Fragment Program: after 'register allocation'
># Radeon Compiler Program
>  0: BEGIN_TEX;
>  1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE;
>  2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT
>     MAD color[0].xyz, src0.xyz, src0.111, src0.000
>     MAD color[0].w, src0.w, src0.1, src0.0
>R500 Fragment Program:
>--------
>0	0:CMN_INST   0x00007807:TEX TEX_WAIT    wmask: ARGB omask: NONE
>	1:TEX_INST:  0x02400000: id: 0 op:LD, ACQ,  SCALED
>	2:TEX_ADDR:  0xe400f400: src: 0 R/G/A/A dst: 0 R/G/B/A
>	3:TEX_DXDY:  0x00000000
>
>1	0:CMN_INST   0x00078005:OUT TEX_WAIT    wmask: NONE omask: ARGB
>	1:RGB_ADDR   0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0
>	3 RGB_INST:  0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0
>	4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0
>	5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0
>
>PIGLIT: {'result': 'pass' }

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Attachments on bug 62696: 76962 | 76963 | 76967 | 76971 | 76987

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