Attachment 77018 Details for Bug 60029 – Possible fix

[patch] Possible fix

0001-drm-i915-preserve-CPT-FDI-RX-bit-polarity.patch (text/plain), 5.54 KB, created by Paulo Zanoni on 2013-03-25 20:35:49 UTC

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Creator: Paulo Zanoni

Created: 2013-03-25 20:35:49 UTC

Size: 5.54 KB

patch

obsolete

>From 0798743b6fcfbc0b6d06355380aab054f0df3bf3 Mon Sep 17 00:00:00 2001
>From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>Date: Mon, 25 Mar 2013 16:57:08 -0300
>Subject: [PATCH] drm/i915: preserve CPT FDI RX bit polarity
>
>Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>---
> drivers/gpu/drm/i915/i915_drv.h      |    1 +
> drivers/gpu/drm/i915/i915_reg.h      |    1 +
> drivers/gpu/drm/i915/intel_bios.c    |    7 +++++--
> drivers/gpu/drm/i915/intel_bios.h    |    4 +++-
> drivers/gpu/drm/i915/intel_display.c |   25 ++++++++++++++++++-------
> drivers/gpu/drm/i915/intel_pm.c      |    9 +++++++--
> 6 files changed, 35 insertions(+), 12 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 1657d873..fd9fca1 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -940,6 +940,7 @@ typedef struct drm_i915_private {
> 	unsigned int int_crt_support:1;
> 	unsigned int lvds_use_ssc:1;
> 	unsigned int display_clock_mode:1;
>+	unsigned int fdi_rx_polarity_inverted:1;
> 	int lvds_ssc_freq;
> 	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
> 	struct {
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index bceca11..cc02f0d 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -3857,6 +3857,7 @@
> #define _TRANSB_CHICKEN2	 0xf1064
> #define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
> #define  TRANS_CHICKEN2_TIMING_OVERRIDE		(1<<31)
>+#define  TRANS_CHICKEN2_FDI_POLARITY_REVERSED	(1<<29)
> 
> 
> #define SOUTH_CHICKEN1		0xc2000
>diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>index 55ffba1..deeabca 100644
>--- a/drivers/gpu/drm/i915/intel_bios.c
>+++ b/drivers/gpu/drm/i915/intel_bios.c
>@@ -351,12 +351,15 @@ parse_general_features(struct drm_i915_private *dev_priv,
> 		dev_priv->lvds_ssc_freq =
> 			intel_bios_ssc_frequency(dev, general->ssc_freq);
> 		dev_priv->display_clock_mode = general->display_clock_mode;
>-		DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
>+		dev_priv->fdi_rx_polarity_inverted =
>+			general->fdi_rx_polarity_inverted;
>+		DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
> 			      dev_priv->int_tv_support,
> 			      dev_priv->int_crt_support,
> 			      dev_priv->lvds_use_ssc,
> 			      dev_priv->lvds_ssc_freq,
>-			      dev_priv->display_clock_mode);
>+			      dev_priv->display_clock_mode,
>+			      dev_priv->fdi_rx_polarity_inverted);
> 	}
> }
> 
>diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
>index 36e57f9..e088d6f 100644
>--- a/drivers/gpu/drm/i915/intel_bios.h
>+++ b/drivers/gpu/drm/i915/intel_bios.h
>@@ -127,7 +127,9 @@ struct bdb_general_features {
>         /* bits 3 */
> 	u8 disable_smooth_vision:1;
> 	u8 single_dvi:1;
>-	u8 rsvd9:6; /* finish byte */
>+	u8 rsvd9:1;
>+	u8 fdi_rx_polarity_inverted:1;
>+	u8 rsvd10:4; /* finish byte */
> 
>         /* bits 4 */
> 	u8 legacy_monitor_detect;
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 7307974..b6f0798 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -2590,15 +2590,18 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
> 	I915_WRITE(FDI_RX_MISC(pipe),
> 		   FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
> 
>+	reg = TRANS_CHICKEN2(pipe);
>+	temp = I915_READ(reg);
>+	if (dev_priv->fdi_rx_polarity_inverted)
>+		temp |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
>+	else
>+		temp &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
>+	I915_WRITE(reg, temp);
>+
> 	reg = FDI_RX_CTL(pipe);
> 	temp = I915_READ(reg);
>-	if (HAS_PCH_CPT(dev)) {
>-		temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
>-		temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
>-	} else {
>-		temp &= ~FDI_LINK_TRAIN_NONE;
>-		temp |= FDI_LINK_TRAIN_PATTERN_1;
>-	}
>+	temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
>+	temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
> 	I915_WRITE(reg, temp | FDI_RX_ENABLE);
> 
> 	POSTING_READ(reg);
>@@ -2725,6 +2728,14 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
> 	I915_WRITE(FDI_RX_MISC(pipe),
> 		   FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
> 
>+	reg = TRANS_CHICKEN2(pipe);
>+	temp = I915_READ(reg);
>+	if (dev_priv->fdi_rx_polarity_inverted)
>+		temp |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
>+	else
>+		temp &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
>+	I915_WRITE(reg, temp);
>+
> 	reg = FDI_RX_CTL(pipe);
> 	temp = I915_READ(reg);
> 	temp &= ~FDI_LINK_TRAIN_AUTO;
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 6fa9b79..195457c 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -3564,6 +3564,7 @@ static void cpt_init_clock_gating(struct drm_device *dev)
> {
> 	struct drm_i915_private *dev_priv = dev->dev_private;
> 	int pipe;
>+	uint32_t val;
> 
> 	/*
> 	 * On Ibex Peak and Cougar Point, we need to disable clock
>@@ -3576,8 +3577,12 @@ static void cpt_init_clock_gating(struct drm_device *dev)
> 	/* The below fixes the weird display corruption, a few pixels shifted
> 	 * downward, on (only) LVDS of some HP laptops with IVY.
> 	 */
>-	for_each_pipe(pipe)
>-		I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_CHICKEN2_TIMING_OVERRIDE);
>+	for_each_pipe(pipe) {
>+		val = I915_READ(TRANS_CHICKEN2(pipe));
>+		DRM_DEBUG_KMS("=== TRANS_CHICKEN2: %08x\n", val);
>+		val |= TRANS_CHICKEN2_TIMING_OVERRIDE;
>+		I915_WRITE(TRANS_CHICKEN2(pipe), val);
>+	}
> 	/* WADP0ClockGatingDisable */
> 	for_each_pipe(pipe) {
> 		I915_WRITE(TRANS_CHICKEN1(pipe),
>-- 
>1.7.10.4
>

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Attachments on bug 60029: 73841 | 74074 | 74075 | 74173 | 74174 | 74185 | 74186 | 77018 | 77628

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