Attachment 77438 Details for Bug 63132 – R600_DUMP_SHADERS=1

R600_DUMP_SHADERS=1

assertion.log (text/plain), 264.14 KB, created by Johannes Obermayr on 2013-04-04 17:38:06 UTC

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Creator: Johannes Obermayr

Created: 2013-04-04 17:38:06 UTC

Size: 264.14 KB

patch

obsolete

>R600_DUMP_SHADERS=1 gdb konqueror
>GNU gdb (GDB) SUSE (7.5.1-2.1.1)
>Copyright (C) 2012 Free Software Foundation, Inc.
>License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
>This is free software: you are free to change and redistribute it.
>There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
>and "show warranty" for details.
>This GDB was configured as "x86_64-suse-linux".
>For bug reporting instructions, please see:
><http://www.gnu.org/software/gdb/bugs/>...
>Reading symbols from /usr/bin/konqueror...Reading symbols from /usr/lib/debug/usr/bin/konqueror.debug...done.
>done.
>(gdb) run
>Starting program: /usr/bin/konqueror 
>Missing separate debuginfo for /usr/lib64/libstdc++.so.6
>Try: zypper install -C "debuginfo(build-id)=babb0ba2913558a7b90bb6d23750a6a1885bfb59"
>Missing separate debuginfo for /lib64/libz.so.1
>Try: zypper install -C "debuginfo(build-id)=bef211df25174b1ba44958f0e7f8e301d59c8de5"
>Missing separate debuginfo for /usr/lib64/libXrender.so.1
>Try: zypper install -C "debuginfo(build-id)=4c4100815412bcd3a1872673c672a54b33611e94"
>[Thread debugging using libthread_db enabled]
>Using host libthread_db library "/lib64/libthread_db.so.1".
>Missing separate debuginfo for /lib64/libgcc_s.so.1
>Try: zypper install -C "debuginfo(build-id)=79056b80865c15deabba7b20155ea27c76d91bf1"
>Missing separate debuginfo for /usr/lib64/libSM.so.6
>Try: zypper install -C "debuginfo(build-id)=79fefe2c609ad87d5a8f425318ce8925aa865a27"
>Missing separate debuginfo for /usr/lib64/libICE.so.6
>Try: zypper install -C "debuginfo(build-id)=e8113eebc3a1829977c056484751c39c9241d529"
>Missing separate debuginfo for /usr/lib64/libattica.so.0.4
>Try: zypper install -C "debuginfo(build-id)=88a2d946c44c55834fad7c2272d002f04852597a"
>Missing separate debuginfo for /usr/lib64/libXtst.so.6
>Try: zypper install -C "debuginfo(build-id)=96a6562a4a6cfb9b456fbc489a96ba3eec27487b"
>Missing separate debuginfo for /usr/lib64/libXcursor.so.1
>Try: zypper install -C "debuginfo(build-id)=29f36aded41cb1598d698806df73a7fea9bcb48b"
>Missing separate debuginfo for /lib64/libdbus-1.so.3
>Try: zypper install -C "debuginfo(build-id)=1be88794566ef1137883c5f6053e753dfcbcc26c"
>Missing separate debuginfo for /usr/lib64/libpng15.so.15
>Try: zypper install -C "debuginfo(build-id)=d6f9815dc65be00216c7f05fa93beab20b863345"
>Missing separate debuginfo for /usr/lib64/libXrandr.so.2
>Try: zypper install -C "debuginfo(build-id)=128dee30e573e6f1cd8a8d240fc913593644df9b"
>Missing separate debuginfo for /usr/lib64/libXinerama.so.1
>Try: zypper install -C "debuginfo(build-id)=d9c88fe22c8ca3f9717c9ee40e0193f581cf8ad4"
>Missing separate debuginfo for /usr/lib64/libudev.so.1
>Try: zypper install -C "debuginfo(build-id)=ff58f116127378f733ab41910b4878be588986ea"
>Missing separate debuginfo for /usr/lib64/libxml2.so.2
>Try: zypper install -C "debuginfo(build-id)=d9c4dfc80361b0893a449b1e00c4bb48e3ba9d73"
>Missing separate debuginfo for /usr/lib64/libpcre.so.1
>Try: zypper install -C "debuginfo(build-id)=91e4d9d2fc2824fbd0f18002a4fc2a6fd4921c2b"
>Missing separate debuginfo for /usr/lib64/libffi.so.4
>Try: zypper install -C "debuginfo(build-id)=709181e6ec6b54499e2caed4f1ccc1e41b6689b0"
>Missing separate debuginfo for /usr/lib64/libjpeg.so.8
>Try: zypper install -C "debuginfo(build-id)=4cd380ccf936a6141a8479d9de5bad05ead4be90"
>Missing separate debuginfo for /usr/lib64/libmng.so.1
>Try: zypper install -C "debuginfo(build-id)=12b7563fac57868453ad36313d534954f34f32a2"
>Missing separate debuginfo for /usr/lib64/libtiff.so.5
>Try: zypper install -C "debuginfo(build-id)=74725d77414bc0fff3800332b52fe2148cfe2de0"
>Missing separate debuginfo for /usr/lib64/libIlmImf.so.7
>Try: zypper install -C "debuginfo(build-id)=cfa599924c7d48f7df2e6508ee4aeea37b4e550c"
>Missing separate debuginfo for /usr/lib64/libIex.so.7
>Try: zypper install -C "debuginfo(build-id)=4aaa188050df7de848770cce10d8f01b8e876968"
>Missing separate debuginfo for /usr/lib64/libHalf.so.7
>Try: zypper install -C "debuginfo(build-id)=538912d8bb8ac731644f8ed84a4ad618eaf7f46d"
>Missing separate debuginfo for /usr/lib64/libIlmThread.so.7
>Try: zypper install -C "debuginfo(build-id)=27739233a7ac5484961c95060eb54378b5539b77"
>Missing separate debuginfo for /usr/lib64/qt4/plugins/menubar/libappmenu-qt.so
>Try: zypper install -C "debuginfo(build-id)=a77d386fa692d8bbb77402a89b6bff894d970e50"
>[New Thread 0x7fffe095f700 (LWP 10852)]
>[New Thread 0x7fff9f40f700 (LWP 10853)]
>[New Thread 0x7fff9de3f700 (LWP 10856)]
>[New Thread 0x7fff8e3ea700 (LWP 11191)]
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 0 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 1 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 2 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 3 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 4 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 5 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 6 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 7 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 8 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 9 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 10 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 11 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 12 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 13 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 14 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 15 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 16 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 17 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 18 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 19 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 20 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 21 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 22 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 23 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 24 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 25 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 26 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 27 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 28 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 29 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 30 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 31 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 32 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 33 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 34 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 35 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 36 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 37 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 38 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 39 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 40 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 41 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 42 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 43 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 44 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 45 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 46 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 47 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 48 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 49 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 50 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 51 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 52 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 53 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 54 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 55 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 56 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 57 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 58 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 59 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 60 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 61 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 62 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 63 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 64 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 65 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 66 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 67 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 68 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 69 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 70 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 71 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 72 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 73 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 74 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 75 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 76 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 77 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 78 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 79 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 80 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 81 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 82 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 83 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 84 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 85 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 86 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 87 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 88 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 89 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 90 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 91 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 92 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 93 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 94 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 95 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 96 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 97 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 98 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 99 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 100 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 101 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 102 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 103 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 104 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 105 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 106 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 107 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 108 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 109 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 110 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 111 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 112 -- E
>0000 00000002 80800400  VTX 2 @4 
> 0004 7C000000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C000000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 113 -- E
>0000 00000002 80800000  VTX 1 @4 
> 0004 7C000000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:0 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 85000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 6 dw -- 3 gprs -- 1 nstack -------------
>shader 114 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0004 C0014000 95200688  EXPORT_DONE        PARAM 0     R2.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 2 gprs -- 1 nstack -------------
>shader 115 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 00008000 90001FFF  MEM_STREAM0_BUF0   WRITE 0     R1.x___      ES:0 
>0004 C000A03C 95000688  EXPORT_DONE        POS   60    R1.xyzw      ES:3 
>0006 C0004000 95200FFF  EXPORT_DONE        PARAM 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 -1)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 -1)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 -1)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 -1)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 2 dw -- 1 gprs -- 0 nstack -------------
>shader 116 -- E
>0000 C0000000 95200FFF  EXPORT_DONE        PIXEL 0     R0.____      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV_SAT OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = call float @llvm.AMDIL.clamp.(float %0, float 0,000000e+00, float 0x3FF0000000000000)
>  %5 = call float @llvm.AMDIL.clamp.(float %1, float 0,000000e+00, float 0x3FF0000000000000)
>  %6 = call float @llvm.AMDIL.clamp.(float %2, float 0,000000e+00, float 0x3FF0000000000000)
>  %7 = call float @llvm.AMDIL.clamp.(float %3, float 0,000000e+00, float 0x3FF0000000000000)
>  %8 = insertelement <4 x float> undef, float %4, i32 0
>  %9 = insertelement <4 x float> %8, float %5, i32 1
>  %10 = insertelement <4 x float> %9, float %6, i32 2
>  %11 = insertelement <4 x float> %10, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 28 dw -- 2 gprs -- 0 nstack -------------
>shader 117 -- E
>0000 00000002 A02C0000  ALU 12 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40146B90            INTERP_ZW                R0.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 00380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
> 0020 800008FE C0000C90            MOV_sat                  R0.z,  PV.z
> 0022 000000FE 80000C90     3      MOV_sat                  R0.x,  PV.x
> 0024 000004FE A0000C90            MOV_sat                  R0.y,  PV.y
> 0026 80000C01 E0000C90            MOV_sat                  R0.w,  R1.w
>0002 C0000000 95200688  EXPORT_DONE        PIXEL 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0,000000e+00, float 0x3FF0000000000000)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0,000000e+00, float 0x3FF0000000000000)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0,000000e+00, float 0x3FF0000000000000)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0,000000e+00, float 0x3FF0000000000000)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>declare float @llvm.R600.load.input(i32) #1
>
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 48 dw -- 5 gprs -- 1 nstack -------------
>shader 118 -- E
>0000 00000000 84C00000  CALL_FS @0 
>0002 80000004 A04C0000  ALU 20 @8 KC0[CB0:0-32] 
> 0008 00100001 00000110     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0010 00900001 20000110            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0012 01100001 40000110            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0014 81900001 60000110            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0016 00102401 000300FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0018 00902401 200304FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0020 01102401 400308FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0022 81902401 60030CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0024 00104801 002300FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0026 00904801 202304FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0028 01104801 408308FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0030 01904801 60630CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0032 80000002 80000C90            MOV_sat                  R0.x,  R2.x
> 0034 00106C01 006300FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0036 00906C01 206304FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0038 01106C01 406308FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0040 01906C01 60630CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0042 80000402 A0000C90            MOV_sat                  R0.y,  R2.y
> 0044 00000802 C0000C90     5      MOV_sat                  R0.z,  R2.z
> 0046 80000C02 E0000C90            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 95000688  EXPORT_DONE        POS   60    R3.xyzw      ES:3 
>0006 C0004000 95200688  EXPORT_DONE        PARAM 0     R0.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.interp.input(i32 0, i32 0)
>  %1 = call float @llvm.R600.interp.input(i32 1, i32 0)
>  %2 = call float @llvm.R600.interp.input(i32 2, i32 0)
>  %3 = call float @llvm.R600.interp.input(i32 3, i32 0)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>declare float @llvm.R600.interp.input(i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 20 dw -- 2 gprs -- 0 nstack -------------
>shader 119 -- E
>0000 00000002 A01C0000  ALU 8 @4 
> 0004 00380400 00146B80     1      INTERP_ZW                __.x,  R0.y, Param0  BS:5
> 0006 00380000 20146B80            INTERP_ZW                __.y,  R0.x, Param0  BS:5
> 0008 00380400 40346B90            INTERP_ZW                R1.z,  R0.y, Param0  BS:5
> 0010 80380000 60346B90            INTERP_ZW                R1.w,  R0.x, Param0  BS:5
> 0012 00380400 00346B10     2      INTERP_XY                R1.x,  R0.y, Param0  BS:5
> 0014 00380000 20346B10            INTERP_XY                R1.y,  R0.x, Param0  BS:5
> 0016 00380400 40146B00            INTERP_XY                __.z,  R0.y, Param0  BS:5
> 0018 80380000 60146B00            INTERP_XY                __.w,  R0.x, Param0  BS:5
>0002 C0008000 95200688  EXPORT_DONE        PIXEL 0     R1.xyzw      ES:3 EOP 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], POSITION, LINEAR
>DCL OUT[0], COLOR
>DCL CONST[2..3]
>DCL CONST[0..1]
>DCL TEMP[0]
>DCL TEMP[1..422], LOCAL
>IMM[0] FLT32 {    2,0000,    -1,0000,     2,7500,     3,0000}
>IMM[1] FLT32 {    1,7000,     4,0000,     0,0000,     1,0000}
>IMM[2] FLT32 {    1,5000,     0,2000,   113,0000,    57,0000}
>IMM[3] INT32 {0, 44, 1, 0}
>IMM[4] FLT32 {    1,0000,     0,1000,     0,0000,     0,5000}
>IMM[5] FLT32 {43758,5469,    58,0000,   114,0000,   170,0000}
>IMM[6] FLT32 {  171,0000,    -0,6000,    -0,4800,     0,6400}
>IMM[7] FLT32 {   -0,8000,     0,3600,    -0,4800,     2,0200}
>IMM[8] FLT32 {    0,0000,     0,8000,     0,6000,     0,2500}
>IMM[9] FLT32 {    2,0300,     0,1250,     2,0100,     0,0625}
>IMM[10] FLT32 {   -0,3000,     0,0000,     0,7000,     1,6667}
>IMM[11] FLT32 {    1,1500,     1,0925,     0,9200,     0,3500}
>IMM[12] FLT32 {    0,3150,     0,2250,     0,1350,     0,0500}
>IMM[13] FLT32 {    0,8775,     0,9180,     0,9450,     0,0010}
>IMM[14] FLT32 {   -1,0000,     0,0000,     0,2000,     0,1000}
>IMM[15] FLT32 {    0,6750,     0,7850,     0,8250,     8,0000}
>IMM[16] FLT32 {    0,1000,     0,0400,     0,0200,     0,9500}
>IMM[17] FLT32 {    0,2000,     0,1200,     0,0200,     0,0000}
>  0: MOV TEMP[0], IN[0]
>  1: MAD TEMP[0].y, IN[0], CONST[3].xxxx, CONST[3].yyyy
>  2: RCP TEMP[1].x, CONST[2].xxxx
>  3: RCP TEMP[1].y, CONST[2].yyyy
>  4: MUL TEMP[1].xy, TEMP[0].xyyy, TEMP[1].xyyy
>  5: MAD TEMP[1].xy, IMM[0].xxxx, TEMP[1].xyyy, IMM[0].yyyy
>  6: MOV TEMP[2].y, TEMP[1].yyyy
>  7: RCP TEMP[3].x, CONST[2].yyyy
>  8: MUL TEMP[3].x, CONST[2].xxxx, TEMP[3].xxxx
>  9: MUL TEMP[2].x, TEMP[1].xxxx, TEMP[3].xxxx
> 10: MUL TEMP[3].xy, IMM[0].xxxx, CONST[0].xyyy
> 11: RCP TEMP[4].x, CONST[2].xxxx
> 12: RCP TEMP[4].y, CONST[2].yyyy
> 13: MAD TEMP[3].xy, TEMP[3].xyyy, TEMP[4].xyyy, IMM[0].yyyy
> 14: MUL TEMP[4].x, IMM[0].wwww, TEMP[3].xxxx
> 15: ADD TEMP[4].x, IMM[0].zzzz, -TEMP[4].xxxx
> 16: COS TEMP[4].x, TEMP[4].xxxx
> 17: ADD TEMP[5].x, TEMP[3].yyyy, IMM[1].xxxx
> 18: MOV TEMP[4].y, TEMP[5].xxxx
> 19: MUL TEMP[3].x, IMM[0].wwww, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].zzzz, -TEMP[3].xxxx
> 21: SIN TEMP[3].x, TEMP[3].xxxx
> 22: MOV TEMP[4].z, TEMP[3].xxxx
> 23: DP3 TEMP[3].x, TEMP[4].xyzz, TEMP[4].xyzz
> 24: RSQ TEMP[3].x, TEMP[3].xxxx
> 25: MUL TEMP[3].xyz, TEMP[4].xyzz, TEMP[3].xxxx
> 26: MUL TEMP[3].xyz, IMM[1].yyyy, TEMP[3].xyzz
> 27: ADD TEMP[4].xyz, IMM[1].zwzz, -TEMP[3].xyzz
> 28: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
> 29: RSQ TEMP[5].x, TEMP[5].xxxx
> 30: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[5].xxxx
> 31: MUL TEMP[5].xyz, IMM[1].zzww, TEMP[4].yzxx
> 32: MAD TEMP[5].xyz, IMM[1].wzzz, TEMP[4].zxyy, -TEMP[5].xyzz
> 33: DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
> 34: RSQ TEMP[6].x, TEMP[6].xxxx
> 35: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
> 36: MUL TEMP[6].xyz, TEMP[4].zxyy, TEMP[5].yzxx
> 37: MAD TEMP[6].xyz, TEMP[4].yzxx, TEMP[5].zxyy, -TEMP[6].xyzz
> 38: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[6].xyzz
> 39: RSQ TEMP[7].x, TEMP[7].xxxx
> 40: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[7].xxxx
> 41: MUL TEMP[2].xyz, TEMP[2].xxxx, TEMP[5].xyzz
> 42: MAD TEMP[1].xyz, TEMP[1].yyyy, TEMP[6].xyzz, TEMP[2].xyzz
> 43: MAD TEMP[1].xyz, IMM[2].xxxx, TEMP[4].xyzz, TEMP[1].xyzz
> 44: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
> 45: RSQ TEMP[2].x, TEMP[2].xxxx
> 46: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
> 47: MOV TEMP[2].xyz, TEMP[3].xyzx
> 48: MOV TEMP[3].xyz, TEMP[1].xyzx
> 49: MOV TEMP[4], IMM[1].zzzz
> 50: MOV TEMP[5].x, IMM[1].zzzz
> 51: MOV TEMP[6].x, IMM[3].xxxx
> 52: BGNLOOP :2
> 53:   ISGE TEMP[7].x, TEMP[6].xxxx, IMM[3].yyyy
> 54:   IF TEMP[7].xxxx :2
> 55:     BRK
> 56:   ENDIF
> 57:   MAD TEMP[8].xyz, TEMP[5].xxxx, TEMP[3].xyzz, TEMP[2].xyzz
> 58:   ADD TEMP[9].x, IMM[2].yyyy, -TEMP[8].yyyy
> 59:   MUL TEMP[10].xyz, IMM[4].xyzz, CONST[1].xxxx
> 60:   ADD TEMP[11].xyz, TEMP[8].xyzz, -TEMP[10].xyzz
> 61:   FLR TEMP[12].xyz, TEMP[11].xyzz
> 62:   FRC TEMP[13].xyz, TEMP[11].xyzz
> 63:   MUL TEMP[14].xyz, TEMP[13].xyzz, TEMP[13].xyzz
> 64:   MUL TEMP[15].xyz, IMM[0].xxxx, TEMP[13].xyzz
> 65:   ADD TEMP[16].xyz, IMM[0].wwww, -TEMP[15].xyzz
> 66:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xyzz
> 67:   MAD TEMP[18].x, TEMP[12].yyyy, IMM[2].wwww, TEMP[12].xxxx
> 68:   MAD TEMP[19].x, IMM[2].zzzz, TEMP[12].zzzz, TEMP[18].xxxx
> 69:   SIN TEMP[20].x, TEMP[19].xxxx
> 70:   MUL TEMP[21].x, TEMP[20].xxxx, IMM[5].xxxx
> 71:   FRC TEMP[22].x, TEMP[21].xxxx
> 72:   ADD TEMP[23].x, TEMP[19].xxxx, IMM[1].wwww
> 73:   SIN TEMP[24].x, TEMP[23].xxxx
> 74:   MUL TEMP[25].x, TEMP[24].xxxx, IMM[5].xxxx
> 75:   FRC TEMP[26].x, TEMP[25].xxxx
> 76:   LRP TEMP[27].x, TEMP[17].xxxx, TEMP[26].xxxx, TEMP[22].xxxx
> 77:   ADD TEMP[28].x, TEMP[19].xxxx, IMM[2].wwww
> 78:   SIN TEMP[29].x, TEMP[28].xxxx
> 79:   MUL TEMP[30].x, TEMP[29].xxxx, IMM[5].xxxx
> 80:   FRC TEMP[31].x, TEMP[30].xxxx
> 81:   ADD TEMP[32].x, TEMP[19].xxxx, IMM[5].yyyy
> 82:   SIN TEMP[33].x, TEMP[32].xxxx
> 83:   MUL TEMP[34].x, TEMP[33].xxxx, IMM[5].xxxx
> 84:   FRC TEMP[35].x, TEMP[34].xxxx
> 85:   LRP TEMP[36].x, TEMP[17].xxxx, TEMP[35].xxxx, TEMP[31].xxxx
> 86:   LRP TEMP[37].x, TEMP[17].yyyy, TEMP[36].xxxx, TEMP[27].xxxx
> 87:   ADD TEMP[38].x, TEMP[19].xxxx, IMM[2].zzzz
> 88:   SIN TEMP[39].x, TEMP[38].xxxx
> 89:   MUL TEMP[40].x, TEMP[39].xxxx, IMM[5].xxxx
> 90:   FRC TEMP[41].x, TEMP[40].xxxx
> 91:   ADD TEMP[42].x, TEMP[19].xxxx, IMM[5].zzzz
> 92:   SIN TEMP[43].x, TEMP[42].xxxx
> 93:   MUL TEMP[44].x, TEMP[43].xxxx, IMM[5].xxxx
> 94:   FRC TEMP[45].x, TEMP[44].xxxx
> 95:   LRP TEMP[46].x, TEMP[17].xxxx, TEMP[45].xxxx, TEMP[41].xxxx
> 96:   ADD TEMP[47].x, TEMP[19].xxxx, IMM[5].wwww
> 97:   SIN TEMP[48].x, TEMP[47].xxxx
> 98:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[5].xxxx
> 99:   FRC TEMP[50].x, TEMP[49].xxxx
>100:   ADD TEMP[51].x, TEMP[19].xxxx, IMM[6].xxxx
>101:   SIN TEMP[52].x, TEMP[51].xxxx
>102:   MUL TEMP[53].x, TEMP[52].xxxx, IMM[5].xxxx
>103:   FRC TEMP[54].x, TEMP[53].xxxx
>104:   LRP TEMP[55].x, TEMP[17].xxxx, TEMP[54].xxxx, TEMP[50].xxxx
>105:   LRP TEMP[56].x, TEMP[17].yyyy, TEMP[55].xxxx, TEMP[46].xxxx
>106:   LRP TEMP[57].x, TEMP[17].zzzz, TEMP[56].xxxx, TEMP[37].xxxx
>107:   MUL TEMP[58].x, IMM[4].wwww, TEMP[57].xxxx
>108:   MUL TEMP[59].xyz, IMM[8].xyzz, TEMP[11].xxxx
>109:   MAD TEMP[60].xyz, IMM[7].xyzz, TEMP[11].yyyy, TEMP[59].xyzz
>110:   MAD TEMP[61].xyz, IMM[6].yzww, TEMP[11].zzzz, TEMP[60].xyzz
>111:   MUL TEMP[62].xyz, TEMP[61].xyzz, IMM[7].wwww
>112:   FLR TEMP[63].xyz, TEMP[62].xyzz
>113:   FRC TEMP[64].xyz, TEMP[62].xyzz
>114:   MUL TEMP[65].xyz, TEMP[64].xyzz, TEMP[64].xyzz
>115:   MUL TEMP[66].xyz, IMM[0].xxxx, TEMP[64].xyzz
>116:   ADD TEMP[67].xyz, IMM[0].wwww, -TEMP[66].xyzz
>117:   MUL TEMP[68].xyz, TEMP[65].xyzz, TEMP[67].xyzz
>118:   MAD TEMP[69].x, TEMP[63].yyyy, IMM[2].wwww, TEMP[63].xxxx
>119:   MAD TEMP[70].x, IMM[2].zzzz, TEMP[63].zzzz, TEMP[69].xxxx
>120:   SIN TEMP[71].x, TEMP[70].xxxx
>121:   MUL TEMP[72].x, TEMP[71].xxxx, IMM[5].xxxx
>122:   FRC TEMP[73].x, TEMP[72].xxxx
>123:   ADD TEMP[74].x, TEMP[70].xxxx, IMM[1].wwww
>124:   SIN TEMP[75].x, TEMP[74].xxxx
>125:   MUL TEMP[76].x, TEMP[75].xxxx, IMM[5].xxxx
>126:   FRC TEMP[77].x, TEMP[76].xxxx
>127:   LRP TEMP[78].x, TEMP[68].xxxx, TEMP[77].xxxx, TEMP[73].xxxx
>128:   ADD TEMP[79].x, TEMP[70].xxxx, IMM[2].wwww
>129:   SIN TEMP[80].x, TEMP[79].xxxx
>130:   MUL TEMP[81].x, TEMP[80].xxxx, IMM[5].xxxx
>131:   FRC TEMP[82].x, TEMP[81].xxxx
>132:   ADD TEMP[83].x, TEMP[70].xxxx, IMM[5].yyyy
>133:   SIN TEMP[84].x, TEMP[83].xxxx
>134:   MUL TEMP[85].x, TEMP[84].xxxx, IMM[5].xxxx
>135:   FRC TEMP[86].x, TEMP[85].xxxx
>136:   LRP TEMP[87].x, TEMP[68].xxxx, TEMP[86].xxxx, TEMP[82].xxxx
>137:   LRP TEMP[88].x, TEMP[68].yyyy, TEMP[87].xxxx, TEMP[78].xxxx
>138:   ADD TEMP[89].x, TEMP[70].xxxx, IMM[2].zzzz
>139:   SIN TEMP[90].x, TEMP[89].xxxx
>140:   MUL TEMP[91].x, TEMP[90].xxxx, IMM[5].xxxx
>141:   FRC TEMP[92].x, TEMP[91].xxxx
>142:   ADD TEMP[93].x, TEMP[70].xxxx, IMM[5].zzzz
>143:   SIN TEMP[94].x, TEMP[93].xxxx
>144:   MUL TEMP[95].x, TEMP[94].xxxx, IMM[5].xxxx
>145:   FRC TEMP[96].x, TEMP[95].xxxx
>146:   LRP TEMP[97].x, TEMP[68].xxxx, TEMP[96].xxxx, TEMP[92].xxxx
>147:   ADD TEMP[98].x, TEMP[70].xxxx, IMM[5].wwww
>148:   SIN TEMP[99].x, TEMP[98].xxxx
>149:   MUL TEMP[100].x, TEMP[99].xxxx, IMM[5].xxxx
>150:   FRC TEMP[101].x, TEMP[100].xxxx
>151:   ADD TEMP[102].x, TEMP[70].xxxx, IMM[6].xxxx
>152:   SIN TEMP[103].x, TEMP[102].xxxx
>153:   MUL TEMP[104].x, TEMP[103].xxxx, IMM[5].xxxx
>154:   FRC TEMP[105].x, TEMP[104].xxxx
>155:   LRP TEMP[106].x, TEMP[68].xxxx, TEMP[105].xxxx, TEMP[101].xxxx
>156:   LRP TEMP[107].x, TEMP[68].yyyy, TEMP[106].xxxx, TEMP[97].xxxx
>157:   LRP TEMP[108].x, TEMP[68].zzzz, TEMP[107].xxxx, TEMP[88].xxxx
>158:   MAD TEMP[58].x, IMM[8].wwww, TEMP[108].xxxx, TEMP[58].xxxx
>159:   MUL TEMP[109].xyz, IMM[8].xyzz, TEMP[62].xxxx
>160:   MAD TEMP[110].xyz, IMM[7].xyzz, TEMP[62].yyyy, TEMP[109].xyzz
>161:   MAD TEMP[111].xyz, IMM[6].yzww, TEMP[62].zzzz, TEMP[110].xyzz
>162:   MUL TEMP[112].xyz, TEMP[111].xyzz, IMM[9].xxxx
>163:   FLR TEMP[113].xyz, TEMP[112].xyzz
>164:   FRC TEMP[114].xyz, TEMP[112].xyzz
>165:   MUL TEMP[115].xyz, TEMP[114].xyzz, TEMP[114].xyzz
>166:   MUL TEMP[116].xyz, IMM[0].xxxx, TEMP[114].xyzz
>167:   ADD TEMP[117].xyz, IMM[0].wwww, -TEMP[116].xyzz
>168:   MUL TEMP[118].xyz, TEMP[115].xyzz, TEMP[117].xyzz
>169:   MAD TEMP[119].x, TEMP[113].yyyy, IMM[2].wwww, TEMP[113].xxxx
>170:   MAD TEMP[120].x, IMM[2].zzzz, TEMP[113].zzzz, TEMP[119].xxxx
>171:   SIN TEMP[121].x, TEMP[120].xxxx
>172:   MUL TEMP[122].x, TEMP[121].xxxx, IMM[5].xxxx
>173:   FRC TEMP[123].x, TEMP[122].xxxx
>174:   ADD TEMP[124].x, TEMP[120].xxxx, IMM[1].wwww
>175:   SIN TEMP[125].x, TEMP[124].xxxx
>176:   MUL TEMP[126].x, TEMP[125].xxxx, IMM[5].xxxx
>177:   FRC TEMP[127].x, TEMP[126].xxxx
>178:   LRP TEMP[128].x, TEMP[118].xxxx, TEMP[127].xxxx, TEMP[123].xxxx
>179:   ADD TEMP[129].x, TEMP[120].xxxx, IMM[2].wwww
>180:   SIN TEMP[130].x, TEMP[129].xxxx
>181:   MUL TEMP[131].x, TEMP[130].xxxx, IMM[5].xxxx
>182:   FRC TEMP[132].x, TEMP[131].xxxx
>183:   ADD TEMP[133].x, TEMP[120].xxxx, IMM[5].yyyy
>184:   SIN TEMP[134].x, TEMP[133].xxxx
>185:   MUL TEMP[135].x, TEMP[134].xxxx, IMM[5].xxxx
>186:   FRC TEMP[136].x, TEMP[135].xxxx
>187:   LRP TEMP[137].x, TEMP[118].xxxx, TEMP[136].xxxx, TEMP[132].xxxx
>188:   LRP TEMP[138].x, TEMP[118].yyyy, TEMP[137].xxxx, TEMP[128].xxxx
>189:   ADD TEMP[139].x, TEMP[120].xxxx, IMM[2].zzzz
>190:   SIN TEMP[140].x, TEMP[139].xxxx
>191:   MUL TEMP[141].x, TEMP[140].xxxx, IMM[5].xxxx
>192:   FRC TEMP[142].x, TEMP[141].xxxx
>193:   ADD TEMP[143].x, TEMP[120].xxxx, IMM[5].zzzz
>194:   SIN TEMP[144].x, TEMP[143].xxxx
>195:   MUL TEMP[145].x, TEMP[144].xxxx, IMM[5].xxxx
>196:   FRC TEMP[146].x, TEMP[145].xxxx
>197:   LRP TEMP[147].x, TEMP[118].xxxx, TEMP[146].xxxx, TEMP[142].xxxx
>198:   ADD TEMP[148].x, TEMP[120].xxxx, IMM[5].wwww
>199:   SIN TEMP[149].x, TEMP[148].xxxx
>200:   MUL TEMP[150].x, TEMP[149].xxxx, IMM[5].xxxx
>201:   FRC TEMP[151].x, TEMP[150].xxxx
>202:   ADD TEMP[152].x, TEMP[120].xxxx, IMM[6].xxxx
>203:   SIN TEMP[153].x, TEMP[152].xxxx
>204:   MUL TEMP[154].x, TEMP[153].xxxx, IMM[5].xxxx
>205:   FRC TEMP[155].x, TEMP[154].xxxx
>206:   LRP TEMP[156].x, TEMP[118].xxxx, TEMP[155].xxxx, TEMP[151].xxxx
>207:   LRP TEMP[157].x, TEMP[118].yyyy, TEMP[156].xxxx, TEMP[147].xxxx
>208:   LRP TEMP[158].x, TEMP[118].zzzz, TEMP[157].xxxx, TEMP[138].xxxx
>209:   MAD TEMP[58].x, IMM[9].yyyy, TEMP[158].xxxx, TEMP[58].xxxx
>210:   MUL TEMP[159].xyz, IMM[8].xyzz, TEMP[112].xxxx
>211:   MAD TEMP[160].xyz, IMM[7].xyzz, TEMP[112].yyyy, TEMP[159].xyzz
>212:   MAD TEMP[161].xyz, IMM[6].yzww, TEMP[112].zzzz, TEMP[160].xyzz
>213:   MUL TEMP[162].xyz, TEMP[161].xyzz, IMM[9].zzzz
>214:   MOV TEMP[11].xyz, TEMP[162].xyzx
>215:   FLR TEMP[163].xyz, TEMP[162].xyzz
>216:   FRC TEMP[164].xyz, TEMP[162].xyzz
>217:   MUL TEMP[165].xyz, TEMP[164].xyzz, TEMP[164].xyzz
>218:   MUL TEMP[166].xyz, IMM[0].xxxx, TEMP[164].xyzz
>219:   ADD TEMP[167].xyz, IMM[0].wwww, -TEMP[166].xyzz
>220:   MUL TEMP[168].xyz, TEMP[165].xyzz, TEMP[167].xyzz
>221:   MAD TEMP[169].x, TEMP[163].yyyy, IMM[2].wwww, TEMP[163].xxxx
>222:   MAD TEMP[170].x, IMM[2].zzzz, TEMP[163].zzzz, TEMP[169].xxxx
>223:   SIN TEMP[171].x, TEMP[170].xxxx
>224:   MUL TEMP[172].x, TEMP[171].xxxx, IMM[5].xxxx
>225:   FRC TEMP[173].x, TEMP[172].xxxx
>226:   ADD TEMP[174].x, TEMP[170].xxxx, IMM[1].wwww
>227:   SIN TEMP[175].x, TEMP[174].xxxx
>228:   MUL TEMP[176].x, TEMP[175].xxxx, IMM[5].xxxx
>229:   FRC TEMP[177].x, TEMP[176].xxxx
>230:   LRP TEMP[178].x, TEMP[168].xxxx, TEMP[177].xxxx, TEMP[173].xxxx
>231:   ADD TEMP[179].x, TEMP[170].xxxx, IMM[2].wwww
>232:   SIN TEMP[180].x, TEMP[179].xxxx
>233:   MUL TEMP[181].x, TEMP[180].xxxx, IMM[5].xxxx
>234:   FRC TEMP[182].x, TEMP[181].xxxx
>235:   ADD TEMP[183].x, TEMP[170].xxxx, IMM[5].yyyy
>236:   SIN TEMP[184].x, TEMP[183].xxxx
>237:   MUL TEMP[185].x, TEMP[184].xxxx, IMM[5].xxxx
>238:   FRC TEMP[186].x, TEMP[185].xxxx
>239:   LRP TEMP[187].x, TEMP[168].xxxx, TEMP[186].xxxx, TEMP[182].xxxx
>240:   LRP TEMP[188].x, TEMP[168].yyyy, TEMP[187].xxxx, TEMP[178].xxxx
>241:   ADD TEMP[189].x, TEMP[170].xxxx, IMM[2].zzzz
>242:   SIN TEMP[190].x, TEMP[189].xxxx
>243:   MUL TEMP[191].x, TEMP[190].xxxx, IMM[5].xxxx
>244:   FRC TEMP[192].x, TEMP[191].xxxx
>245:   ADD TEMP[193].x, TEMP[170].xxxx, IMM[5].zzzz
>246:   SIN TEMP[194].x, TEMP[193].xxxx
>247:   MUL TEMP[195].x, TEMP[194].xxxx, IMM[5].xxxx
>248:   FRC TEMP[196].x, TEMP[195].xxxx
>249:   LRP TEMP[197].x, TEMP[168].xxxx, TEMP[196].xxxx, TEMP[192].xxxx
>250:   ADD TEMP[198].x, TEMP[170].xxxx, IMM[5].wwww
>251:   SIN TEMP[199].x, TEMP[198].xxxx
>252:   MUL TEMP[200].x, TEMP[199].xxxx, IMM[5].xxxx
>253:   FRC TEMP[201].x, TEMP[200].xxxx
>254:   ADD TEMP[202].x, TEMP[170].xxxx, IMM[6].xxxx
>255:   SIN TEMP[203].x, TEMP[202].xxxx
>256:   MUL TEMP[204].x, TEMP[203].xxxx, IMM[5].xxxx
>257:   FRC TEMP[205].x, TEMP[204].xxxx
>258:   LRP TEMP[206].x, TEMP[168].xxxx, TEMP[205].xxxx, TEMP[201].xxxx
>259:   LRP TEMP[207].x, TEMP[168].yyyy, TEMP[206].xxxx, TEMP[197].xxxx
>260:   LRP TEMP[208].x, TEMP[168].zzzz, TEMP[207].xxxx, TEMP[188].xxxx
>261:   MAD TEMP[209].x, IMM[9].wwww, TEMP[208].xxxx, TEMP[58].xxxx
>262:   MOV TEMP[58].x, TEMP[209].xxxx
>263:   MAD_SAT TEMP[210].x, IMM[0].wwww, TEMP[209].xxxx, TEMP[9].xxxx
>264:   MOV TEMP[9].x, TEMP[210].xxxx
>265:   ADD TEMP[211].xyz, TEMP[8].xyzz, IMM[10].xyyy
>266:   ADD TEMP[212].x, IMM[2].yyyy, -TEMP[211].yyyy
>267:   MUL TEMP[213].xyz, IMM[4].xyzz, CONST[1].xxxx
>268:   ADD TEMP[214].xyz, TEMP[211].xyzz, -TEMP[213].xyzz
>269:   FLR TEMP[215].xyz, TEMP[214].xyzz
>270:   FRC TEMP[216].xyz, TEMP[214].xyzz
>271:   MUL TEMP[217].xyz, TEMP[216].xyzz, TEMP[216].xyzz
>272:   MUL TEMP[218].xyz, IMM[0].xxxx, TEMP[216].xyzz
>273:   ADD TEMP[219].xyz, IMM[0].wwww, -TEMP[218].xyzz
>274:   MUL TEMP[220].xyz, TEMP[217].xyzz, TEMP[219].xyzz
>275:   MAD TEMP[221].x, TEMP[215].yyyy, IMM[2].wwww, TEMP[215].xxxx
>276:   MAD TEMP[222].x, IMM[2].zzzz, TEMP[215].zzzz, TEMP[221].xxxx
>277:   SIN TEMP[223].x, TEMP[222].xxxx
>278:   MUL TEMP[224].x, TEMP[223].xxxx, IMM[5].xxxx
>279:   FRC TEMP[225].x, TEMP[224].xxxx
>280:   ADD TEMP[226].x, TEMP[222].xxxx, IMM[1].wwww
>281:   SIN TEMP[227].x, TEMP[226].xxxx
>282:   MUL TEMP[228].x, TEMP[227].xxxx, IMM[5].xxxx
>283:   FRC TEMP[229].x, TEMP[228].xxxx
>284:   LRP TEMP[230].x, TEMP[220].xxxx, TEMP[229].xxxx, TEMP[225].xxxx
>285:   ADD TEMP[231].x, TEMP[222].xxxx, IMM[2].wwww
>286:   SIN TEMP[232].x, TEMP[231].xxxx
>287:   MUL TEMP[233].x, TEMP[232].xxxx, IMM[5].xxxx
>288:   FRC TEMP[234].x, TEMP[233].xxxx
>289:   ADD TEMP[235].x, TEMP[222].xxxx, IMM[5].yyyy
>290:   SIN TEMP[236].x, TEMP[235].xxxx
>291:   MUL TEMP[237].x, TEMP[236].xxxx, IMM[5].xxxx
>292:   FRC TEMP[238].x, TEMP[237].xxxx
>293:   LRP TEMP[239].x, TEMP[220].xxxx, TEMP[238].xxxx, TEMP[234].xxxx
>294:   LRP TEMP[240].x, TEMP[220].yyyy, TEMP[239].xxxx, TEMP[230].xxxx
>295:   ADD TEMP[241].x, TEMP[222].xxxx, IMM[2].zzzz
>296:   SIN TEMP[242].x, TEMP[241].xxxx
>297:   MUL TEMP[243].x, TEMP[242].xxxx, IMM[5].xxxx
>298:   FRC TEMP[244].x, TEMP[243].xxxx
>299:   ADD TEMP[245].x, TEMP[222].xxxx, IMM[5].zzzz
>300:   SIN TEMP[246].x, TEMP[245].xxxx
>301:   MUL TEMP[247].x, TEMP[246].xxxx, IMM[5].xxxx
>302:   FRC TEMP[248].x, TEMP[247].xxxx
>303:   LRP TEMP[249].x, TEMP[220].xxxx, TEMP[248].xxxx, TEMP[244].xxxx
>304:   ADD TEMP[250].x, TEMP[222].xxxx, IMM[5].wwww
>305:   SIN TEMP[251].x, TEMP[250].xxxx
>306:   MUL TEMP[252].x, TEMP[251].xxxx, IMM[5].xxxx
>307:   FRC TEMP[253].x, TEMP[252].xxxx
>308:   ADD TEMP[254].x, TEMP[222].xxxx, IMM[6].xxxx
>309:   SIN TEMP[255].x, TEMP[254].xxxx
>310:   MUL TEMP[256].x, TEMP[255].xxxx, IMM[5].xxxx
>311:   FRC TEMP[257].x, TEMP[256].xxxx
>312:   LRP TEMP[258].x, TEMP[220].xxxx, TEMP[257].xxxx, TEMP[253].xxxx
>313:   LRP TEMP[259].x, TEMP[220].yyyy, TEMP[258].xxxx, TEMP[249].xxxx
>314:   LRP TEMP[260].x, TEMP[220].zzzz, TEMP[259].xxxx, TEMP[240].xxxx
>315:   MUL TEMP[261].x, IMM[4].wwww, TEMP[260].xxxx
>316:   MUL TEMP[262].xyz, IMM[8].xyzz, TEMP[214].xxxx
>317:   MAD TEMP[263].xyz, IMM[7].xyzz, TEMP[214].yyyy, TEMP[262].xyzz
>318:   MAD TEMP[264].xyz, IMM[6].yzww, TEMP[214].zzzz, TEMP[263].xyzz
>319:   MUL TEMP[265].xyz, TEMP[264].xyzz, IMM[7].wwww
>320:   FLR TEMP[266].xyz, TEMP[265].xyzz
>321:   FRC TEMP[267].xyz, TEMP[265].xyzz
>322:   MUL TEMP[268].xyz, TEMP[267].xyzz, TEMP[267].xyzz
>323:   MUL TEMP[269].xyz, IMM[0].xxxx, TEMP[267].xyzz
>324:   ADD TEMP[270].xyz, IMM[0].wwww, -TEMP[269].xyzz
>325:   MUL TEMP[271].xyz, TEMP[268].xyzz, TEMP[270].xyzz
>326:   MAD TEMP[272].x, TEMP[266].yyyy, IMM[2].wwww, TEMP[266].xxxx
>327:   MAD TEMP[273].x, IMM[2].zzzz, TEMP[266].zzzz, TEMP[272].xxxx
>328:   SIN TEMP[274].x, TEMP[273].xxxx
>329:   MUL TEMP[275].x, TEMP[274].xxxx, IMM[5].xxxx
>330:   FRC TEMP[276].x, TEMP[275].xxxx
>331:   ADD TEMP[277].x, TEMP[273].xxxx, IMM[1].wwww
>332:   SIN TEMP[278].x, TEMP[277].xxxx
>333:   MUL TEMP[279].x, TEMP[278].xxxx, IMM[5].xxxx
>334:   FRC TEMP[280].x, TEMP[279].xxxx
>335:   LRP TEMP[281].x, TEMP[271].xxxx, TEMP[280].xxxx, TEMP[276].xxxx
>336:   ADD TEMP[282].x, TEMP[273].xxxx, IMM[2].wwww
>337:   SIN TEMP[283].x, TEMP[282].xxxx
>338:   MUL TEMP[284].x, TEMP[283].xxxx, IMM[5].xxxx
>339:   FRC TEMP[285].x, TEMP[284].xxxx
>340:   ADD TEMP[286].x, TEMP[273].xxxx, IMM[5].yyyy
>341:   SIN TEMP[287].x, TEMP[286].xxxx
>342:   MUL TEMP[288].x, TEMP[287].xxxx, IMM[5].xxxx
>343:   FRC TEMP[289].x, TEMP[288].xxxx
>344:   LRP TEMP[290].x, TEMP[271].xxxx, TEMP[289].xxxx, TEMP[285].xxxx
>345:   LRP TEMP[291].x, TEMP[271].yyyy, TEMP[290].xxxx, TEMP[281].xxxx
>346:   ADD TEMP[292].x, TEMP[273].xxxx, IMM[2].zzzz
>347:   SIN TEMP[293].x, TEMP[292].xxxx
>348:   MUL TEMP[294].x, TEMP[293].xxxx, IMM[5].xxxx
>349:   FRC TEMP[295].x, TEMP[294].xxxx
>350:   ADD TEMP[296].x, TEMP[273].xxxx, IMM[5].zzzz
>351:   SIN TEMP[297].x, TEMP[296].xxxx
>352:   MUL TEMP[298].x, TEMP[297].xxxx, IMM[5].xxxx
>353:   FRC TEMP[299].x, TEMP[298].xxxx
>354:   LRP TEMP[300].x, TEMP[271].xxxx, TEMP[299].xxxx, TEMP[295].xxxx
>355:   ADD TEMP[301].x, TEMP[273].xxxx, IMM[5].wwww
>356:   SIN TEMP[302].x, TEMP[301].xxxx
>357:   MUL TEMP[303].x, TEMP[302].xxxx, IMM[5].xxxx
>358:   FRC TEMP[304].x, TEMP[303].xxxx
>359:   ADD TEMP[305].x, TEMP[273].xxxx, IMM[6].xxxx
>360:   SIN TEMP[306].x, TEMP[305].xxxx
>361:   MUL TEMP[307].x, TEMP[306].xxxx, IMM[5].xxxx
>362:   FRC TEMP[308].x, TEMP[307].xxxx
>363:   LRP TEMP[309].x, TEMP[271].xxxx, TEMP[308].xxxx, TEMP[304].xxxx
>364:   LRP TEMP[310].x, TEMP[271].yyyy, TEMP[309].xxxx, TEMP[300].xxxx
>365:   LRP TEMP[311].x, TEMP[271].zzzz, TEMP[310].xxxx, TEMP[291].xxxx
>366:   MAD TEMP[261].x, IMM[8].wwww, TEMP[311].xxxx, TEMP[261].xxxx
>367:   MUL TEMP[312].xyz, IMM[8].xyzz, TEMP[265].xxxx
>368:   MAD TEMP[313].xyz, IMM[7].xyzz, TEMP[265].yyyy, TEMP[312].xyzz
>369:   MAD TEMP[314].xyz, IMM[6].yzww, TEMP[265].zzzz, TEMP[313].xyzz
>370:   MUL TEMP[315].xyz, TEMP[314].xyzz, IMM[9].xxxx
>371:   FLR TEMP[316].xyz, TEMP[315].xyzz
>372:   FRC TEMP[317].xyz, TEMP[315].xyzz
>373:   MUL TEMP[318].xyz, TEMP[317].xyzz, TEMP[317].xyzz
>374:   MUL TEMP[319].xyz, IMM[0].xxxx, TEMP[317].xyzz
>375:   ADD TEMP[320].xyz, IMM[0].wwww, -TEMP[319].xyzz
>376:   MUL TEMP[321].xyz, TEMP[318].xyzz, TEMP[320].xyzz
>377:   MAD TEMP[322].x, TEMP[316].yyyy, IMM[2].wwww, TEMP[316].xxxx
>378:   MAD TEMP[323].x, IMM[2].zzzz, TEMP[316].zzzz, TEMP[322].xxxx
>379:   SIN TEMP[324].x, TEMP[323].xxxx
>380:   MUL TEMP[325].x, TEMP[324].xxxx, IMM[5].xxxx
>381:   FRC TEMP[326].x, TEMP[325].xxxx
>382:   ADD TEMP[327].x, TEMP[323].xxxx, IMM[1].wwww
>383:   SIN TEMP[328].x, TEMP[327].xxxx
>384:   MUL TEMP[329].x, TEMP[328].xxxx, IMM[5].xxxx
>385:   FRC TEMP[330].x, TEMP[329].xxxx
>386:   LRP TEMP[331].x, TEMP[321].xxxx, TEMP[330].xxxx, TEMP[326].xxxx
>387:   ADD TEMP[332].x, TEMP[323].xxxx, IMM[2].wwww
>388:   SIN TEMP[333].x, TEMP[332].xxxx
>389:   MUL TEMP[334].x, TEMP[333].xxxx, IMM[5].xxxx
>390:   FRC TEMP[335].x, TEMP[334].xxxx
>391:   ADD TEMP[336].x, TEMP[323].xxxx, IMM[5].yyyy
>392:   SIN TEMP[337].x, TEMP[336].xxxx
>393:   MUL TEMP[338].x, TEMP[337].xxxx, IMM[5].xxxx
>394:   FRC TEMP[339].x, TEMP[338].xxxx
>395:   LRP TEMP[340].x, TEMP[321].xxxx, TEMP[339].xxxx, TEMP[335].xxxx
>396:   LRP TEMP[341].x, TEMP[321].yyyy, TEMP[340].xxxx, TEMP[331].xxxx
>397:   ADD TEMP[342].x, TEMP[323].xxxx, IMM[2].zzzz
>398:   SIN TEMP[343].x, TEMP[342].xxxx
>399:   MUL TEMP[344].x, TEMP[343].xxxx, IMM[5].xxxx
>400:   FRC TEMP[345].x, TEMP[344].xxxx
>401:   ADD TEMP[346].x, TEMP[323].xxxx, IMM[5].zzzz
>402:   SIN TEMP[347].x, TEMP[346].xxxx
>403:   MUL TEMP[348].x, TEMP[347].xxxx, IMM[5].xxxx
>404:   FRC TEMP[349].x, TEMP[348].xxxx
>405:   LRP TEMP[350].x, TEMP[321].xxxx, TEMP[349].xxxx, TEMP[345].xxxx
>406:   ADD TEMP[351].x, TEMP[323].xxxx, IMM[5].wwww
>407:   SIN TEMP[352].x, TEMP[351].xxxx
>408:   MUL TEMP[353].x, TEMP[352].xxxx, IMM[5].xxxx
>409:   FRC TEMP[354].x, TEMP[353].xxxx
>410:   ADD TEMP[355].x, TEMP[323].xxxx, IMM[6].xxxx
>411:   SIN TEMP[356].x, TEMP[355].xxxx
>412:   MUL TEMP[357].x, TEMP[356].xxxx, IMM[5].xxxx
>413:   FRC TEMP[358].x, TEMP[357].xxxx
>414:   LRP TEMP[359].x, TEMP[321].xxxx, TEMP[358].xxxx, TEMP[354].xxxx
>415:   LRP TEMP[360].x, TEMP[321].yyyy, TEMP[359].xxxx, TEMP[350].xxxx
>416:   LRP TEMP[361].x, TEMP[321].zzzz, TEMP[360].xxxx, TEMP[341].xxxx
>417:   MAD TEMP[261].x, IMM[9].yyyy, TEMP[361].xxxx, TEMP[261].xxxx
>418:   MUL TEMP[362].xyz, IMM[8].xyzz, TEMP[315].xxxx
>419:   MAD TEMP[363].xyz, IMM[7].xyzz, TEMP[315].yyyy, TEMP[362].xyzz
>420:   MAD TEMP[364].xyz, IMM[6].yzww, TEMP[315].zzzz, TEMP[363].xyzz
>421:   MUL TEMP[365].xyz, TEMP[364].xyzz, IMM[9].zzzz
>422:   MOV TEMP[214].xyz, TEMP[365].xyzx
>423:   FLR TEMP[366].xyz, TEMP[365].xyzz
>424:   FRC TEMP[367].xyz, TEMP[365].xyzz
>425:   MUL TEMP[368].xyz, TEMP[367].xyzz, TEMP[367].xyzz
>426:   MUL TEMP[369].xyz, IMM[0].xxxx, TEMP[367].xyzz
>427:   ADD TEMP[370].xyz, IMM[0].wwww, -TEMP[369].xyzz
>428:   MUL TEMP[371].xyz, TEMP[368].xyzz, TEMP[370].xyzz
>429:   MAD TEMP[372].x, TEMP[366].yyyy, IMM[2].wwww, TEMP[366].xxxx
>430:   MAD TEMP[373].x, IMM[2].zzzz, TEMP[366].zzzz, TEMP[372].xxxx
>431:   SIN TEMP[374].x, TEMP[373].xxxx
>432:   MUL TEMP[375].x, TEMP[374].xxxx, IMM[5].xxxx
>433:   FRC TEMP[376].x, TEMP[375].xxxx
>434:   ADD TEMP[377].x, TEMP[373].xxxx, IMM[1].wwww
>435:   SIN TEMP[378].x, TEMP[377].xxxx
>436:   MUL TEMP[379].x, TEMP[378].xxxx, IMM[5].xxxx
>437:   FRC TEMP[380].x, TEMP[379].xxxx
>438:   LRP TEMP[381].x, TEMP[371].xxxx, TEMP[380].xxxx, TEMP[376].xxxx
>439:   ADD TEMP[382].x, TEMP[373].xxxx, IMM[2].wwww
>440:   SIN TEMP[383].x, TEMP[382].xxxx
>441:   MUL TEMP[384].x, TEMP[383].xxxx, IMM[5].xxxx
>442:   FRC TEMP[385].x, TEMP[384].xxxx
>443:   ADD TEMP[386].x, TEMP[373].xxxx, IMM[5].yyyy
>444:   SIN TEMP[387].x, TEMP[386].xxxx
>445:   MUL TEMP[388].x, TEMP[387].xxxx, IMM[5].xxxx
>446:   FRC TEMP[389].x, TEMP[388].xxxx
>447:   LRP TEMP[390].x, TEMP[371].xxxx, TEMP[389].xxxx, TEMP[385].xxxx
>448:   LRP TEMP[391].x, TEMP[371].yyyy, TEMP[390].xxxx, TEMP[381].xxxx
>449:   ADD TEMP[392].x, TEMP[373].xxxx, IMM[2].zzzz
>450:   SIN TEMP[393].x, TEMP[392].xxxx
>451:   MUL TEMP[394].x, TEMP[393].xxxx, IMM[5].xxxx
>452:   FRC TEMP[395].x, TEMP[394].xxxx
>453:   ADD TEMP[396].x, TEMP[373].xxxx, IMM[5].zzzz
>454:   SIN TEMP[397].x, TEMP[396].xxxx
>455:   MUL TEMP[398].x, TEMP[397].xxxx, IMM[5].xxxx
>456:   FRC TEMP[399].x, TEMP[398].xxxx
>457:   LRP TEMP[400].x, TEMP[371].xxxx, TEMP[399].xxxx, TEMP[395].xxxx
>458:   ADD TEMP[401].x, TEMP[373].xxxx, IMM[5].wwww
>459:   SIN TEMP[402].x, TEMP[401].xxxx
>460:   MUL TEMP[403].x, TEMP[402].xxxx, IMM[5].xxxx
>461:   FRC TEMP[404].x, TEMP[403].xxxx
>462:   ADD TEMP[405].x, TEMP[373].xxxx, IMM[6].xxxx
>463:   SIN TEMP[406].x, TEMP[405].xxxx
>464:   MUL TEMP[407].x, TEMP[406].xxxx, IMM[5].xxxx
>465:   FRC TEMP[408].x, TEMP[407].xxxx
>466:   LRP TEMP[409].x, TEMP[371].xxxx, TEMP[408].xxxx, TEMP[404].xxxx
>467:   LRP TEMP[410].x, TEMP[371].yyyy, TEMP[409].xxxx, TEMP[400].xxxx
>468:   LRP TEMP[411].x, TEMP[371].zzzz, TEMP[410].xxxx, TEMP[391].xxxx
>469:   MAD TEMP[412].x, IMM[9].wwww, TEMP[411].xxxx, TEMP[261].xxxx
>470:   MOV TEMP[261].x, TEMP[412].xxxx
>471:   MAD_SAT TEMP[413].x, IMM[0].wwww, TEMP[412].xxxx, TEMP[212].xxxx
>472:   MOV TEMP[212].x, TEMP[413].xxxx
>473:   LRP TEMP[414].xyz, TEMP[210].xxxx, IMM[10].zzzz, IMM[11].xyzz
>474:   ADD TEMP[415].x, TEMP[210].xxxx, -TEMP[413].xxxx
>475:   MUL_SAT TEMP[416].x, TEMP[415].xxxx, IMM[10].wwww
>476:   MAD TEMP[417].xyz, IMM[12].xyzz, TEMP[416].xxxx, IMM[13].xyzz
>477:   MUL TEMP[418].xyz, TEMP[414].xyzz, TEMP[417].xyzz
>478:   MUL TEMP[419].x, TEMP[210].xxxx, IMM[11].wwww
>479:   MOV TEMP[418].w, TEMP[419].xxxx
>480:   MUL TEMP[418].xyz, TEMP[418].xyzz, TEMP[419].xxxx
>481:   ADD TEMP[420].x, IMM[1].wwww, -TEMP[4].wwww
>482:   MAD TEMP[4], TEMP[418], TEMP[420].xxxx, TEMP[4]
>483:   MUL TEMP[421].x, IMM[12].wwww, TEMP[5].xxxx
>484:   MAX TEMP[422].x, IMM[4].yyyy, TEMP[421].xxxx
>485:   ADD TEMP[5].x, TEMP[5].xxxx, TEMP[422].xxxx
>486:   UADD TEMP[6].x, TEMP[6].xxxx, IMM[3].zzzz
>487:   UADD TEMP[6].x, TEMP[6].xxxx, IMM[3].zzzz
>488: ENDLOOP :2
>489: ADD TEMP[2].x, IMM[13].wwww, TEMP[4].wwww
>490: RCP TEMP[2].x, TEMP[2].xxxx
>491: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].xxxx
>492: MOV_SAT TEMP[2], TEMP[4]
>493: DP3_SAT TEMP[3].x, IMM[14].xyyy, TEMP[1].xyzz
>494: MUL TEMP[1].xyz, IMM[14].zwzz, TEMP[1].yyyy
>495: ADD TEMP[1].xyz, IMM[15].xyzz, -TEMP[1].xyzz
>496: POW TEMP[4].x, TEMP[3].xxxx, IMM[0].wwww
>497: POW TEMP[3].x, TEMP[3].xxxx, IMM[15].wwww
>498: MAD TEMP[1].xyz, IMM[17].xyzz, TEMP[3].xxxx, TEMP[1].xyzz
>499: MUL TEMP[1].xyz, TEMP[1].xyzz, IMM[16].wwww
>500: LRP TEMP[1].xyz, TEMP[2].wwww, TEMP[2].xyzz, TEMP[1].xyzz
>501: MAD TEMP[1].xyz, IMM[16].xyzz, TEMP[4].xxxx, TEMP[1].xyzz
>502: MOV TEMP[2].w, IMM[1].wwww
>503: MOV TEMP[2].xyz, TEMP[1].xyzx
>504: MOV_SAT OUT[0], TEMP[2]
>505: END
>../../../../src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c:1887:lp_emit_declaration_soa: Assertion `idx < 256' failed.
>
>Program received signal SIGTRAP, Trace/breakpoint trap.
>_debug_assert_fail (expr=expr@entry=0x7fff96fe32eb "idx < 256", file=file@entry=0x7fff96fe3ac0 "../../../../src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c", line=line@entry=1887, function=function@entry=0x7fff96fe41a0 <__func__.12044> "lp_emit_declaration_soa")
>    at ../../../../src/gallium/auxiliary/util/u_debug.c:281
>281     ../../../../src/gallium/auxiliary/util/u_debug.c: Datei oder Verzeichnis nicht gefunden.
>(gdb) bt
>#0  _debug_assert_fail (expr=expr@entry=0x7fff96fe32eb "idx < 256", file=file@entry=0x7fff96fe3ac0 "../../../../src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c", line=line@entry=1887, function=function@entry=0x7fff96fe41a0 <__func__.12044> "lp_emit_declaration_soa")
>    at ../../../../src/gallium/auxiliary/util/u_debug.c:281
>#1  0x00007fff96f5abe7 in lp_emit_declaration_soa (bld_base=0x7fffffff4460, decl=0x7fffffff3b84) at ../../../../src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c:1887
>#2  0x00007fff96f554cc in lp_build_tgsi_llvm (bld_base=bld_base@entry=0x7fffffff4460, tokens=tokens@entry=0x3522ae0) at ../../../../src/gallium/auxiliary/gallivm/lp_bld_tgsi.c:451
>#3  0x00007fff9caedd1a in r600_tgsi_llvm (ctx=0x7fffffff4460, tokens=tokens@entry=0x3522ae0) at ../../../../../src/gallium/drivers/r600/r600_llvm.c:546
>#4  0x00007fff9cacb0b5 in r600_shader_from_tgsi (rscreen=<optimized out>, pipeshader=pipeshader@entry=0x38bd700, key=...) at ../../../../../src/gallium/drivers/r600/r600_shader.c:1461
>#5  0x00007fff9cacc269 in r600_pipe_shader_create (ctx=ctx@entry=0x145f0c0, shader=shader@entry=0x38bd700, key=...) at ../../../../../src/gallium/drivers/r600/r600_shader.c:132
>#6  0x00007fff9cae4455 in r600_shader_select (ctx=ctx@entry=0x145f0c0, sel=sel@entry=0x36de2e0, dirty=dirty@entry=0x0) at ../../../../../src/gallium/drivers/r600/r600_state_common.c:747
>#7  0x00007fff9cae45fe in r600_create_shader_state (ctx=0x145f0c0, state=<optimized out>, pipe_shader_type=1) at ../../../../../src/gallium/drivers/r600/r600_state_common.c:794
>#8  0x00007fff979da90e in st_translate_fragment_program (st=st@entry=0x1399750, stfp=<optimized out>, stfp@entry=0x37cacc0, key=key@entry=0x7fffffffc9a0) at ../../../src/mesa/state_tracker/st_program.c:769
>#9  0x00007fff979db47e in st_get_fp_variant (st=st@entry=0x1399750, stfp=stfp@entry=0x37cacc0, key=key@entry=0x7fffffffc9a0) at ../../../src/mesa/state_tracker/st_program.c:806
>#10 0x00007fff979a0d0b in update_fp (st=0x1399750) at ../../../src/mesa/state_tracker/st_atom_shader.c:92
>#11 0x00007fff9799cd45 in st_validate_state (st=st@entry=0x1399750) at ../../../src/mesa/state_tracker/st_atom.c:205
>#12 0x00007fff979b5982 in st_draw_vbo (ctx=0x13c7fa0, prims=0x7fffffffcb10, nr_prims=1, ib=0x0, index_bounds_valid=<optimized out>, min_index=0, max_index=5, tfb_vertcount=0x0) at ../../../src/mesa/state_tracker/st_draw.c:211
>#13 0x00007fff97560b21 in vbo_draw_arrays (ctx=0x13c7fa0, mode=4, start=0, count=6, numInstances=<optimized out>, baseInstance=<optimized out>) at ../../../src/mesa/vbo/vbo_exec_array.c:619
>#14 0x00007fffe4958550 in WebCore::WebGLRenderingContext::drawArrays () from /usr/lib64/libQtWebKit.so.4
>#15 0x00007fffe4af4c12 in WebCore::jsWebGLRenderingContextPrototypeFunctionDrawArrays () from /usr/lib64/libQtWebKit.so.4
>#16 0x00007fffa005e265 in ?? ()
>#17 0xffff000000000002 in ?? ()
>#18 0x00007fffe5095e73 in llint_op_call () from /usr/lib64/libQtWebKit.so.4
>#19 0x0000004a00000002 in ?? ()
>#20 0x00007fff9cfff780 in ?? ()
>#21 0x00007fffe0066200 in ?? ()
>#22 0x00007fff9d02af20 in ?? ()
>#23 0x00007fffa0068ca9 in ?? ()
>#24 0x00007fff9d1f0000 in ?? ()
>#25 0x00007fff8d480d00 in ?? ()
>#26 0x00007fffe512f9f9 in reportExtraMemoryCost (cost=<optimized out>, this=<optimized out>) at /usr/src/debug/webkit-qtwebkit-23/Source/JavaScriptCore/heap/Heap.h:380
>#27 JSC::FunctionExecutable::compileForCallInternal (this=<optimized out>, exec=<optimized out>, scope=<optimized out>, jitType=<optimized out>, bytecodeIndex=0) at /usr/src/debug/webkit-qtwebkit-23/Source/JavaScriptCore/runtime/Executable.cpp:542
>#28 0x00007fffe502eac6 in execute (globalData=0x7fff9d08f388, callFrame=0x7fffe0063080, stack=0x7fffe0063090, this=<optimized out>) at /usr/src/debug/webkit-qtwebkit-23/Source/JavaScriptCore/jit/JITCode.h:134
>#29 JSC::Interpreter::executeCall (this=0x7fff9d201038, callFrame=0x7fffe00d3300, function=0x7fff9d0ccec0, callType=<optimized out>, callData=..., thisValue=..., args=...) at /usr/src/debug/webkit-qtwebkit-23/Source/JavaScriptCore/interpreter/Interpreter.cpp:1051
>#30 0x00007fffe511484a in JSC::call (exec=<optimized out>, functionObject=..., callType=<optimized out>, callData=..., thisValue=..., args=...) at /usr/src/debug/webkit-qtwebkit-23/Source/JavaScriptCore/runtime/CallData.cpp:39
>#31 0x00007fffe3dadc9e in WebCore::ScheduledAction::executeFunctionInContext () from /usr/lib64/libQtWebKit.so.4
>#32 0x00007fffe3dae660 in WebCore::ScheduledAction::execute () from /usr/lib64/libQtWebKit.so.4
>#33 0x00007fffe437ed76 in WebCore::DOMTimer::fired () from /usr/lib64/libQtWebKit.so.4
>#34 0x00007fffe449ba6a in WebCore::ThreadTimers::sharedTimerFiredInternal () from /usr/lib64/libQtWebKit.so.4
>#35 0x00007ffff531f5ac in QObject::event (this=0xc3a350, e=<optimized out>) at kernel/qobject.cpp:1165
>#36 0x00007ffff443786c in QApplicationPrivate::notify_helper (this=this@entry=0x630ee0, receiver=receiver@entry=0xc3a350, e=e@entry=0x7fffffffd6d0) at kernel/qapplication.cpp:4562
>#37 0x00007ffff443bceb in QApplication::notify (this=0x7fffffffdc40, receiver=0xc3a350, e=0x7fffffffd6d0) at kernel/qapplication.cpp:4423
>#38 0x00007ffff5d6f226 in KApplication::notify (this=0x7fffffffdc40, receiver=0xc3a350, event=0x7fffffffd6d0) at /usr/src/debug/kdelibs-4.10.41/kdeui/kernel/kapplication.cpp:311
>#39 0x00007ffff530ad8e in QCoreApplication::notifyInternal (this=0x7fffffffdc40, receiver=0xc3a350, event=0x7fffffffd6d0) at kernel/qcoreapplication.cpp:946
>#40 0x00007ffff533bb61 in sendEvent (event=0x7fffffffd6d0, receiver=<optimized out>) at kernel/qcoreapplication.h:231
>#41 QTimerInfoList::activateTimers (this=0x62fec0) at kernel/qeventdispatcher_unix.cpp:637
>#42 0x00007ffff5338c54 in timerSourceDispatch (source=0x62fe60) at kernel/qeventdispatcher_glib.cpp:186
>#43 timerSourceDispatch (source=source@entry=0x62fe60) at kernel/qeventdispatcher_glib.cpp:180
>#44 0x00007ffff03957d5 in g_main_dispatch (context=0x62ce10) at gmain.c:2715
>#45 g_main_context_dispatch (context=context@entry=0x62ce10) at gmain.c:3219
>#46 0x00007ffff0395b08 in g_main_context_iterate (context=context@entry=0x62ce10, block=block@entry=1, dispatch=dispatch@entry=1, self=<optimized out>) at gmain.c:3290
>#47 0x00007ffff0395bc4 in g_main_context_iteration (context=0x62ce10, may_block=1) at gmain.c:3351
>#48 0x00007ffff53392c6 in QEventDispatcherGlib::processEvents (this=0x607ad0, flags=...) at kernel/qeventdispatcher_glib.cpp:424
>#49 0x00007ffff44d7c1e in QGuiEventDispatcherGlib::processEvents (this=<optimized out>, flags=...) at kernel/qguieventdispatcher_glib.cpp:204
>#50 0x00007ffff5309adf in QEventLoop::processEvents (this=this@entry=0x7fffffffd940, flags=...) at kernel/qeventloop.cpp:149
>#51 0x00007ffff5309d68 in QEventLoop::exec (this=0x7fffffffd940, flags=...) at kernel/qeventloop.cpp:204
>#52 0x00007ffff530ea08 in QCoreApplication::exec () at kernel/qcoreapplication.cpp:1218
>#53 0x00007ffff7baa242 in kdemain (argc=<optimized out>, argv=<optimized out>) at /usr/src/debug/kde-baseapps-4.10.41/konqueror/src/konqmain.cpp:227
>#54 0x00007ffff7768a15 in __libc_start_main (main=0x400730 <main(int, char**)>, argc=1, ubp_av=0x7fffffffdec8, init=<optimized out>, fini=<optimized out>, rtld_fini=<optimized out>, stack_end=0x7fffffffdeb8) at libc-start.c:258
>#55 0x0000000000400761 in _start () at ../sysdeps/x86_64/start.S:123

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