Attachment 78540 Details for Bug 63451 – dmesg

dmesg

dp_lost (text/plain), 17.26 KB, created by XiongZhang on 2013-04-27 03:38:53 UTC

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Description:

Filename:

MIME Type:

Creator: XiongZhang

Created: 2013-04-27 03:38:53 UTC

Size: 17.26 KB

patch

obsolete

>[   51.616183] [drm:intel_crtc_cursor_set], cursor off
>[   51.616190] [drm:intel_crtc_cursor_set], cursor off
>[   51.646425] [drm:intel_crtc_cursor_set], cursor off
>[   51.646432] [drm:intel_crtc_cursor_set], cursor off
>[   51.676670] [drm:intel_crtc_cursor_set], cursor off
>[   51.676679] [drm:intel_crtc_cursor_set], cursor off
>[   51.706940] [drm:intel_crtc_cursor_set], cursor off
>[   51.706946] [drm:intel_crtc_cursor_set], cursor off
>[   51.737178] [drm:intel_crtc_cursor_set], cursor off
>[   51.737185] [drm:intel_crtc_cursor_set], cursor off
>[   51.767419] [drm:intel_crtc_cursor_set], cursor off
>[   51.767425] [drm:intel_crtc_cursor_set], cursor off
>[   51.797660] [drm:intel_crtc_cursor_set], cursor off
>[   51.797666] [drm:intel_crtc_cursor_set], cursor off
>[   51.827875] [drm:intel_crtc_cursor_set], cursor off
>[   51.827882] [drm:intel_crtc_cursor_set], cursor off
>[   51.858116] [drm:intel_crtc_cursor_set], cursor off
>[   51.858122] [drm:intel_crtc_cursor_set], cursor off
>[   51.888357] [drm:intel_crtc_cursor_set], cursor off
>[   51.888363] [drm:intel_crtc_cursor_set], cursor off
>[   51.918596] [drm:intel_crtc_cursor_set], cursor off
>[   51.918603] [drm:intel_crtc_cursor_set], cursor off
>[   51.948823] [drm:intel_crtc_cursor_set], cursor off
>[   51.948830] [drm:intel_crtc_cursor_set], cursor off
>[   51.979064] [drm:intel_crtc_cursor_set], cursor off
>[   51.979070] [drm:intel_crtc_cursor_set], cursor off
>[   52.009305] [drm:intel_crtc_cursor_set], cursor off
>[   52.009312] [drm:intel_crtc_cursor_set], cursor off
>[   52.039519] [drm:intel_crtc_cursor_set], cursor off
>[   52.039526] [drm:intel_crtc_cursor_set], cursor off
>[   52.069759] [drm:intel_crtc_cursor_set], cursor off
>[   52.069766] [drm:intel_crtc_cursor_set], cursor off
>[   52.099975] [drm:intel_crtc_cursor_set], cursor off
>[   52.099981] [drm:intel_crtc_cursor_set], cursor off
>[   52.130215] [drm:intel_crtc_cursor_set], cursor off
>[   52.130222] [drm:intel_crtc_cursor_set], cursor off
>[   52.160457] [drm:intel_crtc_cursor_set], cursor off
>[   52.160463] [drm:intel_crtc_cursor_set], cursor off
>[   52.190698] [drm:intel_crtc_cursor_set], cursor off
>[   52.190704] [drm:intel_crtc_cursor_set], cursor off
>[   52.220941] [drm:intel_crtc_cursor_set], cursor off
>[   52.220948] [drm:intel_crtc_cursor_set], cursor off
>[   52.251181] [drm:intel_crtc_cursor_set], cursor off
>[   52.251188] [drm:intel_crtc_cursor_set], cursor off
>[   52.281422] [drm:intel_crtc_cursor_set], cursor off
>[   52.281428] [drm:intel_crtc_cursor_set], cursor off
>[   52.311663] [drm:intel_crtc_cursor_set], cursor off
>[   52.311669] [drm:intel_crtc_cursor_set], cursor off
>[   52.341903] [drm:intel_crtc_cursor_set], cursor off
>[   52.341910] [drm:intel_crtc_cursor_set], cursor off
>[   52.372119] [drm:intel_crtc_cursor_set], cursor off
>[   52.372126] [drm:intel_crtc_cursor_set], cursor off
>[   52.402363] [drm:intel_crtc_cursor_set], cursor off
>[   52.402370] [drm:intel_crtc_cursor_set], cursor off
>[   52.432604] [drm:intel_crtc_cursor_set], cursor off
>[   52.432610] [drm:intel_crtc_cursor_set], cursor off
>[   52.462844] [drm:intel_crtc_cursor_set], cursor off
>[   52.462850] [drm:intel_crtc_cursor_set], cursor off
>[   52.493070] [drm:intel_crtc_cursor_set], cursor off
>[   52.493077] [drm:intel_crtc_cursor_set], cursor off
>[   52.523287] [drm:intel_crtc_cursor_set], cursor off
>[   52.523295] [drm:intel_crtc_cursor_set], cursor off
>[   52.553536] [drm:intel_crtc_cursor_set], cursor off
>[   52.553543] [drm:intel_crtc_cursor_set], cursor off
>[   52.583777] [drm:intel_crtc_cursor_set], cursor off
>[   52.583784] [drm:intel_crtc_cursor_set], cursor off
>[   52.614017] [drm:intel_crtc_cursor_set], cursor off
>[   52.614024] [drm:intel_crtc_cursor_set], cursor off
>[   52.644233] [drm:intel_crtc_cursor_set], cursor off
>[   52.644239] [drm:intel_crtc_cursor_set], cursor off
>[   52.674473] [drm:intel_crtc_cursor_set], cursor off
>[   52.674479] [drm:intel_crtc_cursor_set], cursor off
>[   52.704714] [drm:intel_crtc_cursor_set], cursor off
>[   52.704720] [drm:intel_crtc_cursor_set], cursor off
>[   52.734954] [drm:intel_crtc_cursor_set], cursor off
>[   52.734960] [drm:intel_crtc_cursor_set], cursor off
>[   52.765192] [drm:intel_crtc_cursor_set], cursor off
>[   52.765198] [drm:intel_crtc_cursor_set], cursor off
>[   52.795433] [drm:intel_crtc_cursor_set], cursor off
>[   52.795439] [drm:intel_crtc_cursor_set], cursor off
>[   52.825674] [drm:intel_crtc_cursor_set], cursor off
>[   52.825680] [drm:intel_crtc_cursor_set], cursor off
>[   52.855888] [drm:intel_crtc_cursor_set], cursor off
>[   52.855894] [drm:intel_crtc_cursor_set], cursor off
>[   52.886128] [drm:intel_crtc_cursor_set], cursor off
>[   52.886135] [drm:intel_crtc_cursor_set], cursor off
>[   52.916346] [drm:intel_crtc_cursor_set], cursor off
>[   52.916353] [drm:intel_crtc_cursor_set], cursor off
>[   52.946587] [drm:intel_crtc_cursor_set], cursor off
>[   52.946593] [drm:intel_crtc_cursor_set], cursor off
>[   52.976827] [drm:intel_crtc_cursor_set], cursor off
>[   52.976834] [drm:intel_crtc_cursor_set], cursor off
>[   53.007067] [drm:intel_crtc_cursor_set], cursor off
>[   53.007074] [drm:intel_crtc_cursor_set], cursor off
>[   53.037306] [drm:intel_crtc_cursor_set], cursor off
>[   53.037313] [drm:intel_crtc_cursor_set], cursor off
>[   53.067547] [drm:intel_crtc_cursor_set], cursor off
>[   53.067553] [drm:intel_crtc_cursor_set], cursor off
>[   53.097787] [drm:intel_crtc_cursor_set], cursor off
>[   53.097793] [drm:intel_crtc_cursor_set], cursor off
>[   53.128028] [drm:intel_crtc_cursor_set], cursor off
>[   53.128034] [drm:intel_crtc_cursor_set], cursor off
>[   53.158268] [drm:intel_crtc_cursor_set], cursor off
>[   53.158274] [drm:intel_crtc_cursor_set], cursor off
>[   53.188484] [drm:intel_crtc_cursor_set], cursor off
>[   53.188490] [drm:intel_crtc_cursor_set], cursor off
>[   53.218724] [drm:intel_crtc_cursor_set], cursor off
>[   53.218731] [drm:intel_crtc_cursor_set], cursor off
>[   53.248966] [drm:intel_crtc_cursor_set], cursor off
>[   53.248972] [drm:intel_crtc_cursor_set], cursor off
>[   53.279207] [drm:intel_crtc_cursor_set], cursor off
>[   53.279213] [drm:intel_crtc_cursor_set], cursor off
>[   53.309440] [drm:intel_crtc_cursor_set], cursor off
>[   53.309447] [drm:intel_crtc_cursor_set], cursor off
>[   53.339681] [drm:intel_crtc_cursor_set], cursor off
>[   53.339687] [drm:intel_crtc_cursor_set], cursor off
>[   53.369921] [drm:intel_crtc_cursor_set], cursor off
>[   53.369927] [drm:intel_crtc_cursor_set], cursor off
>[   53.400162] [drm:intel_crtc_cursor_set], cursor off
>[   53.400168] [drm:intel_crtc_cursor_set], cursor off
>[   53.430403] [drm:intel_crtc_cursor_set], cursor off
>[   53.430410] [drm:intel_crtc_cursor_set], cursor off
>[   53.460619] [drm:intel_crtc_cursor_set], cursor off
>[   53.460626] [drm:intel_crtc_cursor_set], cursor off
>[   53.491422] [drm:intel_crtc_cursor_set], cursor off
>[   53.491429] [drm:intel_crtc_cursor_set], cursor off
>[   53.521662] [drm:intel_crtc_cursor_set], cursor off
>[   53.521669] [drm:intel_crtc_cursor_set], cursor off
>[   53.551903] [drm:intel_crtc_cursor_set], cursor off
>[   53.551909] [drm:intel_crtc_cursor_set], cursor off
>[   53.582142] [drm:intel_crtc_cursor_set], cursor off
>[   53.582148] [drm:intel_crtc_cursor_set], cursor off
>[   53.612386] [drm:intel_crtc_cursor_set], cursor off
>[   53.612392] [drm:intel_crtc_cursor_set], cursor off
>[   53.642626] [drm:intel_crtc_cursor_set], cursor off
>[   53.642633] [drm:intel_crtc_cursor_set], cursor off
>[   53.672866] [drm:intel_crtc_cursor_set], cursor off
>[   53.672873] [drm:intel_crtc_cursor_set], cursor off
>[   53.703108] [drm:intel_crtc_cursor_set], cursor off
>[   53.703114] [drm:intel_crtc_cursor_set], cursor off
>[   53.733348] [drm:intel_crtc_cursor_set], cursor off
>[   53.733354] [drm:intel_crtc_cursor_set], cursor off
>[   53.763587] [drm:intel_crtc_cursor_set], cursor off
>[   53.763594] [drm:intel_crtc_cursor_set], cursor off
>[   53.793827] [drm:intel_crtc_cursor_set], cursor off
>[   53.793833] [drm:intel_crtc_cursor_set], cursor off
>[   53.824068] [drm:intel_crtc_cursor_set], cursor off
>[   53.824074] [drm:intel_crtc_cursor_set], cursor off
>[   53.854307] [drm:intel_crtc_cursor_set], cursor off
>[   53.854314] [drm:intel_crtc_cursor_set], cursor off
>[   53.884546] [drm:intel_crtc_cursor_set], cursor off
>[   53.884553] [drm:intel_crtc_cursor_set], cursor off
>[   53.914786] [drm:intel_crtc_cursor_set], cursor off
>[   53.914793] [drm:intel_crtc_cursor_set], cursor off
>[   53.945026] [drm:intel_crtc_cursor_set], cursor off
>[   53.945033] [drm:intel_crtc_cursor_set], cursor off
>[   53.975266] [drm:intel_crtc_cursor_set], cursor off
>[   53.975273] [drm:intel_crtc_cursor_set], cursor off
>[   54.005506] [drm:intel_crtc_cursor_set], cursor off
>[   54.005513] [drm:intel_crtc_cursor_set], cursor off
>[   54.035746] [drm:intel_crtc_cursor_set], cursor off
>[   54.035752] [drm:intel_crtc_cursor_set], cursor off
>[   54.065986] [drm:intel_crtc_cursor_set], cursor off
>[   54.065993] [drm:intel_crtc_cursor_set], cursor off
>[   54.096228] [drm:intel_crtc_cursor_set], cursor off
>[   54.096235] [drm:intel_crtc_cursor_set], cursor off
>[   54.126735] [drm:intel_crtc_cursor_set], cursor off
>[   54.126741] [drm:intel_crtc_cursor_set], cursor off
>[   54.156949] [drm:intel_crtc_cursor_set], cursor off
>[   54.156955] [drm:intel_crtc_cursor_set], cursor off
>[   54.187658] [drm:intel_crtc_cursor_set], cursor off
>[   54.187665] [drm:intel_crtc_cursor_set], cursor off
>[   54.217898] [drm:intel_crtc_cursor_set], cursor off
>[   54.217905] [drm:intel_crtc_cursor_set], cursor off
>[   54.248139] [drm:intel_crtc_cursor_set], cursor off
>[   54.248146] [drm:intel_crtc_cursor_set], cursor off
>[   54.278356] [drm:intel_crtc_cursor_set], cursor off
>[   54.278363] [drm:intel_crtc_cursor_set], cursor off
>[   54.308597] [drm:intel_crtc_cursor_set], cursor off
>[   54.308603] [drm:intel_crtc_cursor_set], cursor off
>[   54.338839] [drm:intel_crtc_cursor_set], cursor off
>[   54.338845] [drm:intel_crtc_cursor_set], cursor off
>[   54.369080] [drm:intel_crtc_cursor_set], cursor off
>[   54.369086] [drm:intel_crtc_cursor_set], cursor off
>[   54.399656] [drm:intel_crtc_cursor_set], cursor off
>[   54.399663] [drm:intel_crtc_cursor_set], cursor off
>[   54.408271] [drm:intel_crtc_set_config], [CRTC:3] [FB:38] #connectors=1 (x y) (0 0)
>[   54.408276] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.408278] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.408285] [drm:ironlake_update_plane], Writing base 00073000 00000000 0 0 7680
>[   54.424098] [drm:intel_crtc_set_config], [CRTC:5] [FB:38] #connectors=1 (x y) (0 0)
>[   54.424101] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[   54.424104] [drm:drm_mode_debug_printmodeline], Modeline 54:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[   54.424107] [drm:drm_mode_debug_printmodeline], Modeline 37:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[   54.424110] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.424112] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.424113] [drm:intel_crtc_set_config], attempting to set mode from userspace
>[   54.424116] [drm:drm_mode_debug_printmodeline], Modeline 37:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[   54.424119] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   54.424122] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 154000KHz
>[   54.424127] [drm:intel_dp_compute_config], DP link bw 06 lane count 4 clock 162000 bpp 24
>[   54.424129] [drm:intel_dp_compute_config], DP link bw required 369600 available 518400
>[   54.424131] [drm:intel_modeset_pipe_config], [CRTC:5]
>[   54.424132] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   54.424353] [drm:intel_dp_link_down], 
>[   54.484092] [drm:intel_disable_pch_pll], disable PCH PLL c6018 (active 1, on? 1) for crtc 5
>[   54.484094] [drm:intel_disable_pch_pll], disabling PCH PLL c6018
>[   54.484504] [drm:ivybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[   54.484508] [drm:ironlake_check_srwm], watermark 1: display plane 12, fbc lines 3, cursor 6
>[   54.484511] [drm:ironlake_check_srwm], watermark 2: display plane 42, fbc lines 3, cursor 6
>[   54.484513] [drm:ironlake_check_srwm], watermark 3: display plane 81, fbc lines 4, cursor 10
>[   54.484516] [drm:ironlake_check_srwm], watermark 3: display plane 160, fbc lines 5, cursor 14
>[   54.484545] [drm:ironlake_crtc_mode_set], Mode for pipe B:
>[   54.484550] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[   54.484552] [drm:intel_get_pch_pll], CRTC:5 reusing existing PCH PLL c6018
>[   54.484554] [drm:intel_get_pch_pll], switching PLL c6018 off
>[   54.484867] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe B, lanes 2
>[   54.484874] [drm:ironlake_update_plane], Writing base 00073000 00000000 0 0 7680
>[   54.548141] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[   54.548144] [drm:ivybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[   54.548147] [drm:ironlake_check_srwm], watermark 1: display plane 12, fbc lines 3, cursor 6
>[   54.548149] [drm:ironlake_check_srwm], watermark 2: display plane 42, fbc lines 3, cursor 6
>[   54.548151] [drm:ironlake_check_srwm], watermark 3: display plane 81, fbc lines 4, cursor 10
>[   54.548152] [drm:ironlake_check_srwm], watermark 3: display plane 160, fbc lines 5, cursor 14
>[   54.548155] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1200]
>[   54.548158] [drm:intel_dp_mode_set], Enabling DP audio on pipe B
>[   54.548160] [drm:intel_write_eld], ELD on [CONNECTOR:18:DP-1], [ENCODER:17:TMDS-17]
>[   54.548162] [drm:ironlake_write_eld], ELD on pipe B
>[   54.548164] [drm:ironlake_write_eld], Audio directed to unknown port
>[   54.548165] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[   54.548177] [drm:ivybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
>[   54.548179] [drm:ivybridge_update_wm], FIFO watermarks For pipe B - plane 8, cursor: 6
>[   54.612180] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[   54.676209] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[   54.676366] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[   54.677019] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[   54.677022] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[   54.677673] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x600
>[   54.677676] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[   54.677677] [drm:ivb_manual_fdi_link_train], FDI train done.
>[   54.677678] [drm:ironlake_enable_pch_pll], enable PCH PLL c6018 (active 0, on? 0)for crtc 5
>[   54.677681] [drm:ironlake_enable_pch_pll], enabling PCH PLL c6018
>[   54.679331] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[   54.680158] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[   54.680965] [drm:intel_dp_start_link_train], clock recovery OK
>[   54.680967] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[   54.682031] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[   54.683106] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[   54.684186] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[   54.685278] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[   54.686370] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successfull
>[   54.708194] [drm:intel_connector_check_state], [CONNECTOR:9:VGA-1]
>[   54.708202] [drm:intel_connector_check_state], [CONNECTOR:18:DP-1]
>[   54.708209] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
>[   54.708213] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
>[   54.708217] [drm:intel_modeset_check_state], [ENCODER:15:TMDS-15]
>[   54.708221] [drm:intel_modeset_check_state], [ENCODER:17:TMDS-17]
>[   54.708226] [drm:intel_modeset_check_state], [ENCODER:19:TMDS-19]
>[   54.708229] [drm:intel_modeset_check_state], [CRTC:3]
>[   54.708233] [drm:intel_modeset_check_state], [CRTC:5]
>[   54.708237] [drm:intel_modeset_check_state], [CRTC:7]
>[   54.708240] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[   54.708245] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.708248] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.708252] [drm:intel_crtc_set_config], [CRTC:3] [FB:38] #connectors=1 (x y) (0 0)
>[   54.708256] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.708259] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.708262] [drm:intel_crtc_set_config], [CRTC:5] [FB:38] #connectors=1 (x y) (0 0)
>[   54.708265] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.708267] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.708281] [drm:intel_crtc_set_config], [CRTC:3] [FB:38] #connectors=1 (x y) (0 0)
>[   54.708284] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.708287] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]
>[   54.708290] [drm:intel_crtc_set_config], [CRTC:5] [FB:38] #connectors=1 (x y) (0 0)
>[   54.708292] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to [CRTC:3]
>[   54.708295] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:DP-1] to [CRTC:5]

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Attachments on bug 63451: 77837 | 78540 | 78964 | 78965 | 78966

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