Attachment 8103 Details for Bug 9325 – Xorg.log (w. modesetting commit 3fe802453a85183a69c36a098639895f49b17df1 )

Xorg.log (w. modesetting commit 3fe802453a85183a69c36a098639895f49b17df1 )

Xorg.0.log-modesetting2 (text/plain), 68.57 KB, created by Jens Stroebel on 2006-12-14 08:34:03 UTC

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Creator: Jens Stroebel

Created: 2006-12-14 08:34:03 UTC

Size: 68.57 KB

patch

obsolete

>_XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6
>_XSERVTransOpen: transport open failed for inet6/cs1:0
>_XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6
>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X Window System Version 7.1.99.2
>Release Date: 21 December 2005
>X Protocol Version 11, Revision 0, Release 7.1.99.2
>Build Operating System: Linux 2.6.19-1-ida i686 
>Current Operating System: Linux cs1 2.6.19-1-ida #1 SMP Fri Dec 8 17:07:12 CET 2006 i686
>Build Date: 08 December 2006
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/opt/Xorg/var/log/Xorg.0.log", Time: Thu Dec 14 17:11:11 2006
>(==) Using config file: "/etc/xorg.conf"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Card0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(WW) The directory "/opt/Xorg/lib/X11/fonts/CID/" does not exist.
>	Entry deleted from font path.
>(**) FontPath set to:
>	/opt/Xorg/lib/X11/fonts/misc/,
>	/opt/Xorg/lib/X11/fonts/TTF/,
>	/opt/Xorg/lib/X11/fonts/OTF,
>	/opt/Xorg/lib/X11/fonts/Type1/,
>	/opt/Xorg/lib/X11/fonts/100dpi/,
>	/opt/Xorg/lib/X11/fonts/75dpi/
>(**) RgbPath set to "/opt/Xorg/share/X11/rgb"
>(**) ModulePath set to "/opt/Xorg/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81d24a0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.1
>	X.Org XInput driver : 1.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /opt/Xorg/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.1
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,29a0 card 1043,81ea rev 02 class 06,00,00 hdr 00
>(II) PCI: 00:01:0: chip 8086,29a1 card 0000,0000 rev 02 class 06,04,00 hdr 01
>(II) PCI: 00:02:0: chip 8086,29a2 card 1043,81ea rev 02 class 03,00,00 hdr 00
>(II) PCI: 00:1a:0: chip 8086,2834 card 1043,81ec rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1a:1: chip 8086,2835 card 1043,81ec rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:7: chip 8086,283a card 1043,81ec rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1c:0: chip 8086,283f card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:4: chip 8086,2847 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:5: chip 8086,2849 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2830 card 1043,81ec rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2831 card 1043,81ec rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,2832 card 1043,81ec rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,2836 card 1043,81ec rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev f2 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,2810 card 1043,81ec rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:2: chip 8086,2820 card 1043,81ec rev 02 class 01,01,8f hdr 00
>(II) PCI: 00:1f:3: chip 8086,283e card 1043,81ec rev 02 class 0c,05,00 hdr 00
>(II) PCI: 00:1f:5: chip 8086,2825 card 1043,81ec rev 02 class 01,01,85 hdr 00
>(II) PCI: 02:00:0: chip 10ec,8168 card 1043,81aa rev 01 class 02,00,00 hdr 00
>(II) PCI: 03:00:0: chip 197b,2363 card 1043,81e4 rev 02 class 01,06,01 hdr 80
>(II) PCI: 03:00:1: chip 197b,2363 card 1043,81e4 rev 02 class 01,01,85 hdr 00
>(II) PCI: 05:03:0: chip 10ec,8169 card 1385,311a rev 10 class 02,00,00 hdr 00
>(II) PCI: 05:04:0: chip 10ec,8169 card 1385,311a rev 10 class 02,00,00 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,5), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:1:0), (0,1,1), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 1 prefetchable memory range:
>	[0] -1	0	0xbfd00000 - 0xbfdfffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:28:0), (0,4,4), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 4 prefetchable memory range:
>	[0] -1	0	0xbfe00000 - 0xbfefffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:4), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 3 I/O range:
>	[0] -1	0	0x0000a000 - 0x0000afff (0x1000) IX[B]
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0xff600000 - 0xff6fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:5), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x00009000 - 0x00009fff (0x1000) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xff500000 - 0xff5fffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 5: bridge is at (0:30:0), (0,5,5), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 5 I/O range:
>	[0] -1	0	0x0000b000 - 0x0000bfff (0x1000) IX[B]
>(II) Bus 5 non-prefetchable memory range:
>	[0] -1	0	0xff700000 - 0xff7fffff (0x100000) MX[B]
>(II) Bus 5 prefetchable memory range:
>	[0] -1	0	0x40000000 - 0x400fffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 82G965 Integrated Graphics Controller rev 2, Mem @ 0xffa00000/20, 0xd0000000/28, I/O @ 0xec00/3
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[1] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[2] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[3] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[4] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[5] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[6] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[9] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[10] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[11] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[12] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[13] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[14] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[15] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[16] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[17] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[18] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[19] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[20] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[21] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[22] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[23] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[24] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[25] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[26] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[27] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[28] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[29] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[30] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[31] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[32] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[33] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[34] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[35] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[1] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[2] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[3] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[4] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[5] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[6] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[9] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[10] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[11] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[12] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[13] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[14] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[15] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[16] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[17] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[18] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[19] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[20] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[21] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[22] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[23] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[24] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[25] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[26] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[27] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[28] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[29] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[30] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[31] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[32] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[33] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[34] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[35] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[5] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[6] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[7] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[8] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[9] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[10] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[16] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[17] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[18] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[19] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[20] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[21] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[22] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[23] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[24] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[25] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[26] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[27] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[28] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[29] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[30] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[31] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[32] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[33] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[34] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[35] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[36] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[37] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[38] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[39] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[40] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[41] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>(II) LoadModule: "glx"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "extmod"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "xtrap"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//libxtrap.so
>(II) Module xtrap: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DEC-XTRAP
>(II) LoadModule: "record"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dbe"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "type1"
>(II) Loading /opt/Xorg/lib/xorg/modules/fonts//libtype1.so
>dlopen: /opt/Xorg/lib/xorg/modules/fonts//libtype1.so: undefined symbol: Type1RegisterFontFileFunctions
>(EE) Failed to load /opt/Xorg/lib/xorg/modules/fonts//libtype1.so
>(II) UnloadModule: "type1"
>(EE) Failed to load module "type1" (loader failed, 7)
>(II) LoadModule: "freetype"
>(II) Loading /opt/Xorg/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 7.1.99.2, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "i810"
>(II) Loading /opt/Xorg/lib/xorg/modules/drivers//i810_drv.so
>(II) Module i810: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.7.2
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.1
>(II) LoadModule: "mouse"
>(II) Loading /opt/Xorg/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.1.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 1.0
>(II) LoadModule: "kbd"
>(II) Loading /opt/Xorg/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.1.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 1.0
>(II) I810: Driver for Intel Integrated Graphics Chipsets: i810, i810-dc100,
>	i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G, E7221 (i915),
>	915GM, 945G, 945GM, 965G, 965G, 965Q, 946GZ
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(--) Chipset 965G found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[5] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[6] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[7] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[8] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[9] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[10] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[16] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[17] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[18] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[19] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[20] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[21] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[22] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[23] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[24] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[25] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[26] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[27] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[28] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[29] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[30] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[31] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[32] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[33] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[34] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[35] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[36] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[37] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[38] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[39] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[40] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[41] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[5] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[6] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[7] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[8] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[9] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[10] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[13] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[14] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[15] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[19] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[20] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[21] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[22] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[23] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[24] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[25] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[26] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[27] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[28] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[29] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[30] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[31] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[32] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[33] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[34] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[35] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[36] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[37] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[38] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[39] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[40] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[41] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[42] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[43] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[44] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>	[45] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[46] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /opt/Xorg/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /opt/Xorg/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /opt/Xorg/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.1
>(**) I810(0): Depth 24, (--) framebuffer bpp 32
>(==) I810(0): RGB weight 888
>(==) I810(0): Default visual is TrueColor
>(II) I810(0): Integrated Graphics Chipset: Intel(R) 965G
>(--) I810(0): Chipset: "965G"
>(--) I810(0): Linear framebuffer at 0xD0000000
>(--) I810(0): IO registers at addr 0xFFA00000
>(II) I810(0): Hardware state on X startup:
>(II) I810(0): DumpRegsBegin
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):            DPLL_TEST: 0x00010001 ()
>(II) I810(0):              D_STATE: 0x00000000
>(II) I810(0):        DSPCLK_GATE_D: 0x00040000
>(II) I810(0):       RENCLK_GATE_D1: 0x70000000
>(II) I810(0):       RENCLK_GATE_D2: 0x00000000
>(II) I810(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):              SDVOUDI: 0x00000000
>(II) I810(0):               DSPARB: 0x00001d9c
>(II) I810(0):               DSPFW1: 0x1f8f0f0f
>(II) I810(0):               DSPFW2: 0x00000f0f
>(II) I810(0):               DSPFW3: 0x00000000
>(II) I810(0):                 ADPA: 0x80008000
>(II) I810(0):                 LVDS: 0x00000000 (disabled, pipe A)
>(II) I810(0):                 DVOA: 0x00000000
>(II) I810(0):                 DVOB: 0x00080018
>(II) I810(0):                 DVOC: 0x00080018
>(II) I810(0):          DVOA_SRCDIM: 0x00000000
>(II) I810(0):          DVOB_SRCDIM: 0x00000000
>(II) I810(0):          DVOC_SRCDIM: 0x00000000
>(II) I810(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) I810(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) I810(0):         PFIT_CONTROL: 0x00000000
>(II) I810(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) I810(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) I810(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) I810(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) I810(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) I810(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPABASE: 0x00000000
>(II) I810(0):             DSPASURF: 0x00000000
>(II) I810(0):          DSPATILEOFF: 0x00000000
>(II) I810(0):            PIPEACONF: 0xc0000000 (enabled, double-wide)
>(II) I810(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) I810(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, dac/serial mode, default clock, p1 = 8, p2 = 10)
>(II) I810(0):            DPLL_A_MD: 0x00000003
>(II) I810(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) I810(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) I810(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) I810(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) I810(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) I810(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) I810(0):            BCLRPAT_A: 0x00000000
>(II) I810(0):         VSYNCSHIFT_A: 0x00000000
>(II) I810(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) I810(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) I810(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPBBASE: 0x00000000
>(II) I810(0):             DSPBSURF: 0x00000000
>(II) I810(0):          DSPBTILEOFF: 0x00000000
>(II) I810(0):            PIPEBCONF: 0xc0000000 (enabled, double-wide)
>(II) I810(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) I810(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, dac/serial mode, default clock, p1 = 8, p2 = 10)
>(II) I810(0):            DPLL_B_MD: 0x00000303
>(II) I810(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) I810(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) I810(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) I810(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) I810(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) I810(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) I810(0):            BCLRPAT_B: 0x00000000
>(II) I810(0):         VSYNCSHIFT_B: 0x00000000
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):             VGACNTRL: 0x0000008e (enabled)
>(II) I810(0):               TV_CTL: 0x00000000
>(II) I810(0):               TV_DAC: 0x00000000
>(II) I810(0):             TV_CSC_Y: 0x00000000
>(II) I810(0):            TV_CSC_Y2: 0x00000000
>(II) I810(0):             TV_CSC_U: 0x00000000
>(II) I810(0):            TV_CSC_U2: 0x00000000
>(II) I810(0):             TV_CSC_V: 0x00000000
>(II) I810(0):            TV_CSC_V2: 0x00000000
>(II) I810(0):         TV_CLR_KNOBS: 0x00000000
>(II) I810(0):         TV_CLR_LEVEL: 0x00000000
>(II) I810(0):           TV_H_CTL_1: 0x00000000
>(II) I810(0):           TV_H_CTL_2: 0x00000000
>(II) I810(0):           TV_H_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_1: 0x00000000
>(II) I810(0):           TV_V_CTL_2: 0x00000000
>(II) I810(0):           TV_V_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_4: 0x00000000
>(II) I810(0):           TV_V_CTL_5: 0x00000000
>(II) I810(0):           TV_V_CTL_6: 0x00000000
>(II) I810(0):           TV_V_CTL_7: 0x00000000
>(II) I810(0):          TV_SC_CTL_1: 0x00000000
>(II) I810(0):          TV_SC_CTL_2: 0x00000000
>(II) I810(0):          TV_SC_CTL_3: 0x00000000
>(II) I810(0):           TV_WIN_POS: 0x00000000
>(II) I810(0):          TV_WIN_SIZE: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_1: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_2: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_3: 0x00000000
>(II) I810(0):        TV_CC_CONTROL: 0x00000000
>(II) I810(0):           TV_CC_DATA: 0x00000000
>(II) I810(0):          TV_H_LUMA_0: 0x00000000
>(II) I810(0):         TV_H_LUMA_59: 0x00000000
>(II) I810(0):        TV_H_CHROMA_0: 0x00000000
>(II) I810(0):       TV_H_CHROMA_59: 0x00000000
>(II) I810(0):                 SR00: 0x03
>(II) I810(0):                 SR01: 0x00
>(II) I810(0):                 SR02: 0x03
>(II) I810(0):                 SR03: 0x00
>(II) I810(0):                 SR04: 0x02
>(II) I810(0):                 SR05: 0x00
>(II) I810(0):                 SR06: 0x00
>(II) I810(0):                 SR07: 0x00
>(II) I810(0):                  MSR: 0x67
>(II) I810(0):                 CR00: 0x5f
>(II) I810(0):                 CR01: 0x4f
>(II) I810(0):                 CR02: 0x50
>(II) I810(0):                 CR03: 0x82
>(II) I810(0):                 CR04: 0x55
>(II) I810(0):                 CR05: 0x81
>(II) I810(0):                 CR06: 0xbf
>(II) I810(0):                 CR07: 0x1f
>(II) I810(0):                 CR08: 0x00
>(II) I810(0):                 CR09: 0x4f
>(II) I810(0):                 CR0a: 0x1f
>(II) I810(0):                 CR0b: 0x1e
>(II) I810(0):                 CR0c: 0x00
>(II) I810(0):                 CR0d: 0x00
>(II) I810(0):                 CR0e: 0x00
>(II) I810(0):                 CR0f: 0x00
>(II) I810(0):                 CR10: 0x9c
>(II) I810(0):                 CR11: 0x8e
>(II) I810(0):                 CR12: 0x8f
>(II) I810(0):                 CR13: 0x28
>(II) I810(0):                 CR14: 0x1f
>(II) I810(0):                 CR15: 0x96
>(II) I810(0):                 CR16: 0xb9
>(II) I810(0):                 CR17: 0xa3
>(II) I810(0):                 CR18: 0xff
>(II) I810(0):                 CR19: 0x00
>(II) I810(0):                 CR1a: 0x00
>(II) I810(0):                 CR1b: 0x00
>(II) I810(0):                 CR1c: 0x00
>(II) I810(0):                 CR1d: 0x00
>(II) I810(0):                 CR1e: 0x00
>(II) I810(0):                 CR1f: 0x00
>(II) I810(0):                 CR20: 0x00
>(II) I810(0):                 CR21: 0x00
>(II) I810(0):                 CR22: 0x20
>(II) I810(0):                 CR23: 0x00
>(II) I810(0):                 CR24: 0x80
>(II) I810(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) I810(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) I810(0): DumpRegsEnd
>(II) I810(0): 2 display pipes available.
>(II) I810(0): detected 512 kB GTT.
>(II) I810(0): detected 7676 kB stolen memory.
>(II) I810(0): Kernel reported 208896 total, 1 used
>(II) I810(0): I830CheckAvailableMemory: 835580 kB available
>(==) I810(0): Using XAA for acceleration
>(--) I810(0): Will try to allocate texture pool for old Mesa 3D driver.
>(II) I810(0): Will try to reserve 32768 kiB of AGP aperture space
>	for the DRM memory manager.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Loading /opt/Xorg/lib/xorg/modules//libddc.so
>(II) Module ddc: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Loading /opt/Xorg/lib/xorg/modules//libi2c.so
>(II) Module i2c: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.2.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) I810(0): I2C bus "CRTDDC_A" initialized.
>(II) I810(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) I810(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) I810(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) I810(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) I810(0): SDVO: R: 00 00 00 00 00 00 00 00 (Power on)
>(EE) I810(0): SDVO: No active TMDS outputs (0x0000)
>(II) I810(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) I810(0): SDVO: R: 00 00 00 00             (Power on)
>(II) I810(0): SDVO device VID/DID: 00:00.00, clock range 0.0MHz - 0.0MHz, input 1: N, input 2: N, output 1: N, output 2: N
>(II) I810(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) I810(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) I810(0): I2C bus "SDVOC DDC Bus" initialized.
>(II) I810(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) I810(0): SDVO: R: 00 00 00 00 00 00 00 00 (Power on)
>(EE) I810(0): SDVO: No active TMDS outputs (0x0000)
>(II) I810(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) I810(0): SDVO: R: 00 00 00 00             (Power on)
>(II) I810(0): SDVO device VID/DID: 00:00.00, clock range 0.0MHz - 0.0MHz, input 1: N, input 2: N, output 1: N, output 2: N
>(II) I810(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R: 00                      (Power on)
>(EE) I810(0): Couldn't get SDVO clock rate multiplier
>(II) I810(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R: 00                      (Power on)
>(EE) I810(0): Couldn't get SDVO clock rate multiplier
>(II) I810(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) I810(0): I2C device "CRTDDC_A:ddc2" removed.
>(II) I810(0): EDID for output VGA
>(II) I810(0): Manufacturer: MED  Model: 2937  Serial#: 16843009
>(II) I810(0): Year: 2002  Week: 35
>(II) I810(0): EDID Version: 1.3
>(II) I810(0): Analog Display Input,  Input Voltage Level: 0.700/0.700 V
>(II) I810(0): Sync:  Separate
>(II) I810(0): Max H-Image Size [cm]: horiz.: 36  vert.: 27
>(II) I810(0): Gamma: 2.85
>(II) I810(0): DPMS capabilities: Off; RGB/Color Display
>(II) I810(0): First detailed timing is preferred mode
>(II) I810(0): redX: 0.638 redY: 0.325   greenX: 0.276 greenY: 0.596
>(II) I810(0): blueX: 0.143 blueY: 0.066   whiteX: 0.283 whiteY: 0.297
>(II) I810(0): Supported VESA Video Modes:
>(II) I810(0): 720x400@70Hz
>(II) I810(0): 720x400@88Hz
>(II) I810(0): 640x480@60Hz
>(II) I810(0): 640x480@67Hz
>(II) I810(0): 640x480@72Hz
>(II) I810(0): 640x480@75Hz
>(II) I810(0): 800x600@56Hz
>(II) I810(0): 800x600@60Hz
>(II) I810(0): 800x600@72Hz
>(II) I810(0): 800x600@75Hz
>(II) I810(0): 832x624@75Hz
>(II) I810(0): 1024x768@87Hz (interlaced)
>(II) I810(0): 1024x768@60Hz
>(II) I810(0): 1024x768@70Hz
>(II) I810(0): 1024x768@75Hz
>(II) I810(0): 1280x1024@75Hz
>(II) I810(0): 1152x870@75Hz
>(II) I810(0): Manufacturer's mask: 0
>(II) I810(0): Supported Future Video Modes:
>(II) I810(0): #0: hsize: 640  vsize 480  refresh: 85  vid: 22833
>(II) I810(0): #1: hsize: 800  vsize 600  refresh: 85  vid: 22853
>(II) I810(0): #2: hsize: 1024  vsize 768  refresh: 85  vid: 22881
>(II) I810(0): #3: hsize: 1280  vsize 1024  refresh: 85  vid: 39297
>(II) I810(0): #4: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) I810(0): #5: hsize: 1600  vsize 1200  refresh: 75  vid: 20393
>(II) I810(0): #6: hsize: 1024  vsize 768  refresh: 100  vid: 26721
>(II) I810(0): #7: hsize: 1280  vsize 960  refresh: 85  vid: 22913
>(II) I810(0): Supported additional Video Mode:
>(II) I810(0): clock: 157.5 MHz   Image Size:  350 x 262 mm
>(II) I810(0): h_active: 1280  h_sync: 1344  h_sync_end 1504 h_blank_end 1728 h_border: 0
>(II) I810(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1072 v_border: 0
>(II) I810(0): Ranges: V min: 50  V max: 120 Hz, H min: 30  H max: 98 kHz, PixClock max 210 MHz
>(II) I810(0): Monitor name: MD1998LK
>(II) I810(0): Serial No: 235544828
>(II) I810(0): EDID (in hex):
>(II) I810(0): 	00ffffffffffff0034a4372901010101
>(II) I810(0): 	230c010368241bb92a5e88a353469824
>(II) I810(0): 	11484cffff803159455961598199714f
>(II) I810(0): 	a94f61688159863d00c05100304040a0
>(II) I810(0): 	13005e061100001e000000fd0032781e
>(II) I810(0): 	6215000a202020202020000000fc004d
>(II) I810(0): 	44313939384c4b0a20202020000000ff
>(II) I810(0): 	003233353534343832380a202020001a
>(II) I810(0): Using EDID range info for horizontal sync
>(II) I810(0): Using EDID range info for vertical refresh
>(II) I810(0): Printing DDC gathered Modelines:
>(II) I810(0): Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>(II) I810(0): Modeline "800x600"   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync
>(II) I810(0): Modeline "640x480"   31.50  640 656 720 840  480 481 484 500 -hsync -vsync
>(II) I810(0): Modeline "640x480"   31.50  640 664 704 832  480 489 491 520 -hsync -vsync
>(II) I810(0): Modeline "640x480"   30.24  640 704 768 864  480 483 486 525 -hsync -vsync
>(II) I810(0): Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(II) I810(0): Modeline "720x400"   35.50  720 738 846 900  400 421 423 449 -hsync -vsync
>(II) I810(0): Modeline "720x400"   28.32  720 738 846 900  400 412 414 449 -hsync +vsync
>(II) I810(0): Modeline "1280x1024"  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) I810(0): Modeline "1024x768"   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync
>(II) I810(0): Modeline "1024x768"   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync
>(II) I810(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) I810(0): Modeline "1024x768"   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync
>(II) I810(0): Modeline "832x624"   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync
>(II) I810(0): Modeline "800x600"   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync
>(II) I810(0): Modeline "800x600"   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync
>(II) I810(0): Modeline "1152x864"  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync
>(II) I810(0): Modeline "640x480"   35.00  640 664 728 816  480 483 487 507 -hsync +vsync
>(II) I810(0): Modeline "800x600"   56.75  800 848 928 1056  600 603 607 633 -hsync +vsync
>(II) I810(0): Modeline "1024x768"   94.50  1024 1096 1200 1376  768 771 775 809 -hsync +vsync
>(II) I810(0): Modeline "1280x1024"  159.50  1280 1376 1512 1744  1024 1027 1034 1078 -hsync +vsync
>(II) I810(0): Modeline "1152x864"  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync
>(II) I810(0): Modeline "1600x1200"  204.75  1600 1720 1888 2176  1200 1203 1207 1255 -hsync +vsync
>(II) I810(0): Modeline "1024x768"  112.25  1024 1096 1200 1376  768 771 775 816 -hsync +vsync
>(II) I810(0): Modeline "1280x960"  148.25  1280 1368 1504 1728  960 963 967 1011 -hsync +vsync
>(II) I810(0): Modeline "1280x1024"  157.50  1280 1344 1504 1728  1024 1025 1028 1072 +hsync +vsync
>(II) I810(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): I2C device "SDVOB DDC Bus:ddc2" removed.
>(II) I810(0): I2C device "SDVOC DDC Bus:ddc2" registered at address 0xA0.
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) I810(0): I2C device "SDVOC DDC Bus:ddc2" removed.
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 11 00 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 11 00 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R:                         (Power on)
>(--) I810(0): Pre-allocated VideoRAM: 7676 kByte
>(==) I810(0): VideoRAM: 65536 kByte
>(==) I810(0): video overlay key set to 0x101fe
>(**) I810(0): page flipping disabled
>(==) I810(0): Using gamma correction (1.0, 1.0, 1.0)
>(--) I810(0): Maximum frambuffer space: 65368 kByte
>(II) I810(0): move blank start from 1280 to 1280
>(II) I810(0): move blank start from 800 to 800
>(II) I810(0): move blank start from 800 to 800
>(II) I810(0): move blank start from 640 to 640
>(II) I810(0): move blank start from 640 to 640
>(II) I810(0): move blank start from 640 to 640
>(II) I810(0): move blank start from 640 to 640
>(II) I810(0): move blank start from 720 to 720
>(II) I810(0): move blank start from 720 to 720
>(II) I810(0): move blank start from 1280 to 1280
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 832 to 832
>(II) I810(0): move blank start from 800 to 800
>(II) I810(0): move blank start from 800 to 800
>(II) I810(0): move blank start from 1152 to 1152
>(II) I810(0): move blank start from 640 to 640
>(II) I810(0): move blank start from 800 to 800
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 1280 to 1280
>(II) I810(0): move blank start from 1152 to 1152
>(II) I810(0): move blank start from 1672 to 1600
>(II) I810(0): move blank start from 1024 to 1024
>(II) I810(0): move blank start from 1280 to 1280
>(EE) I810(0): [dri] I830CheckDRIAvailable failed: dri not loaded
>(**) I810(0): Display dimensions: (360, 270) mm
>(**) I810(0): DPI set to (112, 112)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /opt/Xorg/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "xaa"
>(II) LoadModule: "xaa"
>(II) Loading /opt/Xorg/lib/xorg/modules//libxaa.so
>(II) Module xaa: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.2.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Loading /opt/Xorg/lib/xorg/modules//libramdac.so
>(II) Module ramdac: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.1
>(II) I810(0): Comparing regs from server start up to After PreInit
>(WW) I810(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00
>(II) Loading sub module "shadow"
>(II) LoadModule: "shadow"
>(II) Loading /opt/Xorg/lib/xorg/modules//libshadow.so
>(II) Module shadow: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.1.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MS[B]
>	[1] 0	0	0xffa00000 - 0xffafffff (0x100000) MS[B]
>	[2] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0xff7ff800 - 0xff7ff8ff (0x100) MX[B]
>	[7] -1	0	0xff7ffc00 - 0xff7ffcff (0x100) MX[B]
>	[8] -1	0	0xff6fe000 - 0xff6fffff (0x2000) MX[B]
>	[9] -1	0	0xff5ff000 - 0xff5fffff (0x1000) MX[B]
>	[10] -1	0	0x40100000 - 0x401000ff (0x100) MX[B]
>	[11] -1	0	0xff9fb400 - 0xff9fb7ff (0x400) MX[B]
>	[12] -1	0	0xff9fb800 - 0xff9fbbff (0x400) MX[B]
>	[13] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[14] -1	0	0xffa00000 - 0xffafffff (0x100000) MX[B](B)
>	[15] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[16] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[17] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[18] 0	0	0x0000ec00 - 0x0000ec07 (0x8) IS[B]
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x0000b400 - 0x0000b4ff (0x100) IX[B]
>	[22] -1	0	0x0000b800 - 0x0000b8ff (0x100) IX[B]
>	[23] -1	0	0x0000a400 - 0x0000a40f (0x10) IX[B]
>	[24] -1	0	0x0000a480 - 0x0000a483 (0x4) IX[B]
>	[25] -1	0	0x0000a800 - 0x0000a807 (0x8) IX[B]
>	[26] -1	0	0x0000a880 - 0x0000a883 (0x4) IX[B]
>	[27] -1	0	0x0000ac00 - 0x0000ac07 (0x8) IX[B]
>	[28] -1	0	0x00009800 - 0x000098ff (0x100) IX[B]
>	[29] -1	0	0x0000c480 - 0x0000c48f (0x10) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c80f (0x10) IX[B]
>	[31] -1	0	0x0000c880 - 0x0000c883 (0x4) IX[B]
>	[32] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B]
>	[33] -1	0	0x0000d000 - 0x0000d003 (0x4) IX[B]
>	[34] -1	0	0x0000d080 - 0x0000d087 (0x8) IX[B]
>	[35] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[36] -1	0	0x0000e000 - 0x0000e00f (0x10) IX[B]
>	[37] -1	0	0x0000e080 - 0x0000e08f (0x10) IX[B]
>	[38] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[39] -1	0	0x0000e480 - 0x0000e487 (0x8) IX[B]
>	[40] -1	0	0x0000e800 - 0x0000e803 (0x4) IX[B]
>	[41] -1	0	0x0000e880 - 0x0000e887 (0x8) IX[B]
>	[42] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[43] -1	0	0x0000d480 - 0x0000d49f (0x20) IX[B]
>	[44] -1	0	0x0000d400 - 0x0000d41f (0x20) IX[B]
>	[45] -1	0	0x0000dc00 - 0x0000dc1f (0x20) IX[B]
>	[46] -1	0	0x0000d880 - 0x0000d89f (0x20) IX[B]
>	[47] -1	0	0x0000ec00 - 0x0000ec07 (0x8) IX[B](B)
>	[48] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[49] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) I810(0): Allocated 128 kB for the ring buffer at 0x0
>(II) I810(0): Allocating at least 256 scanlines for pixmap cache
>(II) I810(0): Initial framebuffer allocation size: 11600 kByte
>(II) I810(0): Successful allocate offscreen memory at 0xb80000, size 7500 KB
>(II) I810(0): Allocated 4 kB for HW cursor at 0xffff000
>(II) I810(0): Allocated 16 kB for HW (ARGB) cursor at 0xfffb000
>(II) I810(0): Allocated 4 kB for Overlay registers at 0xfffa000 (0x2e2fb000).
>(II) I810(0): Allocated 64 kB for the scratch buffer at 0xffea000
>(II) I810(0): 0x8202d38: Memory at offset 0x00020000, size 11600 kBytes
>(II) I810(0): 0x8204308: Memory at offset 0x0ffff000, size 4 kBytes
>(II) I810(0): 0x822d3a8: Memory at offset 0x0fffb000, size 16 kBytes
>(II) I810(0): 0x8204714: Memory at offset 0x00000000, size 128 kBytes
>(II) I810(0): 0x8202d78: Memory at offset 0x0ffea000, size 64 kBytes
>(II) I810(0): 0x8230d50: Memory at offset 0x0fffa000, size 4 kBytes
>(==) I810(0): Write-combining range (0xd0000000,0x10000000)
>(II) I810(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) I810(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R: 00                      (Power on)
>(EE) I810(0): Couldn't get SDVO clock rate multiplier
>(II) I810(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R: 00                      (Power on)
>(EE) I810(0): Couldn't get SDVO clock rate multiplier
>(II) I810(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): xf86BindGARTMemory: bind key 4 at 0x0077f000 (pgoffset 1919)
>(II) I810(0): xf86BindGARTMemory: bind key 0 at 0x0ffff000 (pgoffset 65535)
>(II) I810(0): xf86BindGARTMemory: bind key 1 at 0x0fffb000 (pgoffset 65531)
>(II) I810(0): xf86BindGARTMemory: bind key 3 at 0x0ffea000 (pgoffset 65514)
>(II) I810(0): xf86BindGARTMemory: bind key 2 at 0x0fffa000 (pgoffset 65530)
>chosen: dotclock 157440 vco 1574400 ((m 82, m1 13, m2 5), n 3, (p 10, p1 1, p2 10))
>clock regs: 0x14010c00, 0x00030d05
>(WW) I810(0): No pipe mode list for pipe 1,continuing with desired mode
>(II) I810(0): Disabling unused functions
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): Disabling pipe B
>(II) I810(0): Disabling DPLL B
>(II) I810(0): DumpRegsBegin
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):            DPLL_TEST: 0x00010001 ()
>(II) I810(0):              D_STATE: 0x00000000
>(II) I810(0):        DSPCLK_GATE_D: 0x00040000
>(II) I810(0):       RENCLK_GATE_D1: 0x70000000
>(II) I810(0):       RENCLK_GATE_D2: 0x00000000
>(II) I810(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):              SDVOUDI: 0x00000000
>(II) I810(0):               DSPARB: 0x00001d9c
>(II) I810(0):               DSPFW1: 0x1f8f0f0f
>(II) I810(0):               DSPFW2: 0x00000f0f
>(II) I810(0):               DSPFW3: 0x00000000
>(II) I810(0):                 ADPA: 0x80000018
>(II) I810(0):                 LVDS: 0x00000000 (disabled, pipe A)
>(II) I810(0):                 DVOA: 0x00000000
>(II) I810(0):                 DVOB: 0x00080018
>(II) I810(0):                 DVOC: 0x00080018
>(II) I810(0):          DVOA_SRCDIM: 0x00000000
>(II) I810(0):          DVOB_SRCDIM: 0x00000000
>(II) I810(0):          DVOC_SRCDIM: 0x00000000
>(II) I810(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) I810(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) I810(0):         PFIT_CONTROL: 0x00000000
>(II) I810(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) I810(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) I810(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) I810(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) I810(0):           DSPASTRIDE: 0x00001900 (6400 bytes)
>(II) I810(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPABASE: 0x00000000
>(II) I810(0):             DSPASURF: 0x00020000
>(II) I810(0):          DSPATILEOFF: 0x00000000
>(II) I810(0):            PIPEACONF: 0xc0000000 (enabled, double-wide)
>(II) I810(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) I810(0):                 FPA0: 0x00030d05 (n = 3, m1 = 13, m2 = 5)
>(II) I810(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_A: 0x94010c00 (enabled, non-dvo, dac/serial mode, default clock, p1 = 1, p2 = 10)
>(II) I810(0):            DPLL_A_MD: 0x00000000
>(II) I810(0):             HTOTAL_A: 0x06bf04ff (1280 active, 1728 total)
>(II) I810(0):             HBLANK_A: 0x06bf04ff (1280 start, 1728 end)
>(II) I810(0):              HSYNC_A: 0x05df053f (1344 start, 1504 end)
>(II) I810(0):             VTOTAL_A: 0x042f03ff (1024 active, 1072 total)
>(II) I810(0):             VBLANK_A: 0x042f03ff (1024 start, 1072 end)
>(II) I810(0):              VSYNC_A: 0x04030400 (1025 start, 1028 end)
>(II) I810(0):            BCLRPAT_A: 0x00000000
>(II) I810(0):         VSYNCSHIFT_A: 0x00000000
>(II) I810(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) I810(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) I810(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPBBASE: 0x00000000
>(II) I810(0):             DSPBSURF: 0x00020000
>(II) I810(0):          DSPBTILEOFF: 0x00000000
>(II) I810(0):            PIPEBCONF: 0x40000000 (disabled, double-wide)
>(II) I810(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) I810(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, dac/serial mode, default clock, p1 = 8, p2 = 10)
>(II) I810(0):            DPLL_B_MD: 0x00000303
>(II) I810(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) I810(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) I810(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) I810(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) I810(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) I810(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) I810(0):            BCLRPAT_B: 0x00000000
>(II) I810(0):         VSYNCSHIFT_B: 0x00000000
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):             VGACNTRL: 0x80000000 (disabled)
>(II) I810(0):               TV_CTL: 0x00000000
>(II) I810(0):               TV_DAC: 0x00000000
>(II) I810(0):             TV_CSC_Y: 0x00000000
>(II) I810(0):            TV_CSC_Y2: 0x00000000
>(II) I810(0):             TV_CSC_U: 0x00000000
>(II) I810(0):            TV_CSC_U2: 0x00000000
>(II) I810(0):             TV_CSC_V: 0x00000000
>(II) I810(0):            TV_CSC_V2: 0x00000000
>(II) I810(0):         TV_CLR_KNOBS: 0x00000000
>(II) I810(0):         TV_CLR_LEVEL: 0x00000000
>(II) I810(0):           TV_H_CTL_1: 0x00000000
>(II) I810(0):           TV_H_CTL_2: 0x00000000
>(II) I810(0):           TV_H_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_1: 0x00000000
>(II) I810(0):           TV_V_CTL_2: 0x00000000
>(II) I810(0):           TV_V_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_4: 0x00000000
>(II) I810(0):           TV_V_CTL_5: 0x00000000
>(II) I810(0):           TV_V_CTL_6: 0x00000000
>(II) I810(0):           TV_V_CTL_7: 0x00000000
>(II) I810(0):          TV_SC_CTL_1: 0x00000000
>(II) I810(0):          TV_SC_CTL_2: 0x00000000
>(II) I810(0):          TV_SC_CTL_3: 0x00000000
>(II) I810(0):           TV_WIN_POS: 0x00000000
>(II) I810(0):          TV_WIN_SIZE: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_1: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_2: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_3: 0x00000000
>(II) I810(0):        TV_CC_CONTROL: 0x00000000
>(II) I810(0):           TV_CC_DATA: 0x00000000
>(II) I810(0):          TV_H_LUMA_0: 0x00000000
>(II) I810(0):         TV_H_LUMA_59: 0x00000000
>(II) I810(0):        TV_H_CHROMA_0: 0x00000000
>(II) I810(0):       TV_H_CHROMA_59: 0x00000000
>(II) I810(0):                 SR00: 0x03
>(II) I810(0):                 SR01: 0x00
>(II) I810(0):                 SR02: 0x03
>(II) I810(0):                 SR03: 0x00
>(II) I810(0):                 SR04: 0x02
>(II) I810(0):                 SR05: 0x00
>(II) I810(0):                 SR06: 0x00
>(II) I810(0):                 SR07: 0x00
>(II) I810(0):                  MSR: 0x67
>(II) I810(0):                 CR00: 0x5f
>(II) I810(0):                 CR01: 0x4f
>(II) I810(0):                 CR02: 0x50
>(II) I810(0):                 CR03: 0x82
>(II) I810(0):                 CR04: 0x55
>(II) I810(0):                 CR05: 0x81
>(II) I810(0):                 CR06: 0xbf
>(II) I810(0):                 CR07: 0x1f
>(II) I810(0):                 CR08: 0x00
>(II) I810(0):                 CR09: 0x4f
>(II) I810(0):                 CR0a: 0x1f
>(II) I810(0):                 CR0b: 0x1e
>(II) I810(0):                 CR0c: 0x00
>(II) I810(0):                 CR0d: 0x00
>(II) I810(0):                 CR0e: 0x00
>(II) I810(0):                 CR0f: 0x00
>(II) I810(0):                 CR10: 0x9c
>(II) I810(0):                 CR11: 0x0e
>(II) I810(0):                 CR12: 0x8f
>(II) I810(0):                 CR13: 0x28
>(II) I810(0):                 CR14: 0x1f
>(II) I810(0):                 CR15: 0x96
>(II) I810(0):                 CR16: 0xb9
>(II) I810(0):                 CR17: 0xa3
>(II) I810(0):                 CR18: 0xff
>(II) I810(0):                 CR19: 0x00
>(II) I810(0):                 CR1a: 0x00
>(II) I810(0):                 CR1b: 0x00
>(II) I810(0):                 CR1c: 0x00
>(II) I810(0):                 CR1d: 0x00
>(II) I810(0):                 CR1e: 0x00
>(II) I810(0):                 CR1f: 0x00
>(II) I810(0):                 CR20: 0x00
>(II) I810(0):                 CR21: 0x00
>(II) I810(0):                 CR22: 0x00
>(II) I810(0):                 CR23: 0x00
>(II) I810(0):                 CR24: 0x00
>(II) I810(0): pipe A dot 157440 n 3 m1 13 m2 5 p1 1 p2 10
>(II) I810(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) I810(0): DumpRegsEnd
>(II) I810(0): Output configuration:
>(II) I810(0):   Pipe A is on
>(II) I810(0):   Display plane A is now enabled and connected to pipe A.
>(II) I810(0):   Pipe B is off
>(II) I810(0):   Display plane B is now disabled and connected to pipe B.
>(II) I810(0):   Output VGA is connected to pipe A
>(II) I810(0):   Output TMDS-1 is connected to pipe none
>(II) I810(0):   Output TMDS-2 is connected to pipe none
>(II) I810(0): Using XFree86 Acceleration Architecture (XAA)
>	Screen to screen bit blits
>	Solid filled rectangles
>	8x8 mono pattern filled rectangles
>	Indirect CPU to Screen color expansion
>	Solid Horizontal and Vertical Lines
>	Offscreen Pixmaps
>	Setting up tile and stipple cache:
>		24 128x128 slots
>(==) I810(0): Backing store disabled
>(==) I810(0): Silken mouse enabled
>(II) I810(0): Initializing HW Cursor
>(**) Option "dpms"
>(**) I810(0): DPMS enabled
>(II) I810(0): Set up textured video
>(II) I810(0): direct rendering: Disabled
>(II) I810(0): RandR enabled, ignore the following RandR disabled message.
>(II) I810(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) I810(0): SDVO: R: 00 00                   (Power on)
>(II) I810(0): Rotating to 0 degrees
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(EE) AIGLX: DRI module not loaded
>(II) Loading local sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /opt/Xorg/lib/xorg/modules/extensions//libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 7.1.99.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) I810(0): Setting screen physical size to 290 x 232
>(**) Option "Protocol" "auto"
>(**) Mouse0: Device: "/dev/input/mice"
>(**) Mouse0: Protocol: "auto"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5 6 7"
>(**) Mouse0: ZAxisMapping: buttons 4, 5, 6 and 7
>(**) Mouse0: Buttons: 11
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc101"
>(**) Keyboard0: XkbModel: "pc101"
>(**) Option "XkbLayout" "de"
>(**) Keyboard0: XkbLayout: "de"
>(**) Option "XkbVariant" "nodeadkeys"
>(**) Keyboard0: XkbVariant: "nodeadkeys"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) evaluating device (Mouse0)
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(--) Mouse0: PnP-detected protocol: "ExplorerPS/2"
>(II) Mouse0: ps2EnableDataReporting: succeeded
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 11 00 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 11 00 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) I810(0): SDVO: R:                         (Power on)
>(II) I810(0): Comparing regs from server start up to After LeaveVT
>(WW) I810(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00
>(II) I810(0): DumpRegsBegin
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):            DPLL_TEST: 0x00010001 ()
>(II) I810(0):              D_STATE: 0x00000000
>(II) I810(0):        DSPCLK_GATE_D: 0x00040000
>(II) I810(0):       RENCLK_GATE_D1: 0x70000000
>(II) I810(0):       RENCLK_GATE_D2: 0x00000000
>(II) I810(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) I810(0):              SDVOUDI: 0x00000000
>(II) I810(0):               DSPARB: 0x00001d9c
>(II) I810(0):               DSPFW1: 0x1f8f0f0f
>(II) I810(0):               DSPFW2: 0x00000f0f
>(II) I810(0):               DSPFW3: 0x00000000
>(II) I810(0):                 ADPA: 0x80008000
>(II) I810(0):                 LVDS: 0x00000000 (disabled, pipe A)
>(II) I810(0):                 DVOA: 0x00000000
>(II) I810(0):                 DVOB: 0x00080018
>(II) I810(0):                 DVOC: 0x00080018
>(II) I810(0):          DVOA_SRCDIM: 0x00000000
>(II) I810(0):          DVOB_SRCDIM: 0x00000000
>(II) I810(0):          DVOC_SRCDIM: 0x00000000
>(II) I810(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) I810(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) I810(0):         PFIT_CONTROL: 0x00000000
>(II) I810(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) I810(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) I810(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) I810(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) I810(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) I810(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPABASE: 0x00000000
>(II) I810(0):             DSPASURF: 0x00000000
>(II) I810(0):          DSPATILEOFF: 0x00000000
>(II) I810(0):            PIPEACONF: 0xc0000000 (enabled, double-wide)
>(II) I810(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) I810(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, dac/serial mode, default clock, p1 = 8, p2 = 10)
>(II) I810(0):            DPLL_A_MD: 0x00000003
>(II) I810(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) I810(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) I810(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) I810(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) I810(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) I810(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) I810(0):            BCLRPAT_A: 0x00000000
>(II) I810(0):         VSYNCSHIFT_A: 0x00000000
>(II) I810(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) I810(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) I810(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) I810(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) I810(0):             DSPBBASE: 0x00000000
>(II) I810(0):             DSPBSURF: 0x00000000
>(II) I810(0):          DSPBTILEOFF: 0x00000000
>(II) I810(0):            PIPEBCONF: 0xc0000000 (enabled, double-wide)
>(II) I810(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) I810(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) I810(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, dac/serial mode, default clock, p1 = 8, p2 = 10)
>(II) I810(0):            DPLL_B_MD: 0x00000303
>(II) I810(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) I810(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) I810(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) I810(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) I810(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) I810(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) I810(0):            BCLRPAT_B: 0x00000000
>(II) I810(0):         VSYNCSHIFT_B: 0x00000000
>(II) I810(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) I810(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) I810(0):        VCLK_POST_DIV: 0x00020002
>(II) I810(0):             VGACNTRL: 0x0000008e (enabled)
>(II) I810(0):               TV_CTL: 0x00000000
>(II) I810(0):               TV_DAC: 0x00000000
>(II) I810(0):             TV_CSC_Y: 0x00000000
>(II) I810(0):            TV_CSC_Y2: 0x00000000
>(II) I810(0):             TV_CSC_U: 0x00000000
>(II) I810(0):            TV_CSC_U2: 0x00000000
>(II) I810(0):             TV_CSC_V: 0x00000000
>(II) I810(0):            TV_CSC_V2: 0x00000000
>(II) I810(0):         TV_CLR_KNOBS: 0x00000000
>(II) I810(0):         TV_CLR_LEVEL: 0x00000000
>(II) I810(0):           TV_H_CTL_1: 0x00000000
>(II) I810(0):           TV_H_CTL_2: 0x00000000
>(II) I810(0):           TV_H_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_1: 0x00000000
>(II) I810(0):           TV_V_CTL_2: 0x00000000
>(II) I810(0):           TV_V_CTL_3: 0x00000000
>(II) I810(0):           TV_V_CTL_4: 0x00000000
>(II) I810(0):           TV_V_CTL_5: 0x00000000
>(II) I810(0):           TV_V_CTL_6: 0x00000000
>(II) I810(0):           TV_V_CTL_7: 0x00000000
>(II) I810(0):          TV_SC_CTL_1: 0x00000000
>(II) I810(0):          TV_SC_CTL_2: 0x00000000
>(II) I810(0):          TV_SC_CTL_3: 0x00000000
>(II) I810(0):           TV_WIN_POS: 0x00000000
>(II) I810(0):          TV_WIN_SIZE: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_1: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_2: 0x00000000
>(II) I810(0):      TV_FILTER_CTL_3: 0x00000000
>(II) I810(0):        TV_CC_CONTROL: 0x00000000
>(II) I810(0):           TV_CC_DATA: 0x00000000
>(II) I810(0):          TV_H_LUMA_0: 0x00000000
>(II) I810(0):         TV_H_LUMA_59: 0x00000000
>(II) I810(0):        TV_H_CHROMA_0: 0x00000000
>(II) I810(0):       TV_H_CHROMA_59: 0x00000000
>(II) I810(0):                 SR00: 0x03
>(II) I810(0):                 SR01: 0x00
>(II) I810(0):                 SR02: 0x03
>(II) I810(0):                 SR03: 0x00
>(II) I810(0):                 SR04: 0x02
>(II) I810(0):                 SR05: 0x00
>(II) I810(0):                 SR06: 0x00
>(II) I810(0):                 SR07: 0x00
>(II) I810(0):                  MSR: 0x67
>(II) I810(0):                 CR00: 0x5f
>(II) I810(0):                 CR01: 0x4f
>(II) I810(0):                 CR02: 0x50
>(II) I810(0):                 CR03: 0x82
>(II) I810(0):                 CR04: 0x55
>(II) I810(0):                 CR05: 0x81
>(II) I810(0):                 CR06: 0xbf
>(II) I810(0):                 CR07: 0x1f
>(II) I810(0):                 CR08: 0x00
>(II) I810(0):                 CR09: 0x4f
>(II) I810(0):                 CR0a: 0x1f
>(II) I810(0):                 CR0b: 0x1e
>(II) I810(0):                 CR0c: 0x00
>(II) I810(0):                 CR0d: 0x00
>(II) I810(0):                 CR0e: 0x00
>(II) I810(0):                 CR0f: 0x00
>(II) I810(0):                 CR10: 0x9c
>(II) I810(0):                 CR11: 0x8e
>(II) I810(0):                 CR12: 0x8f
>(II) I810(0):                 CR13: 0x28
>(II) I810(0):                 CR14: 0x1f
>(II) I810(0):                 CR15: 0x96
>(II) I810(0):                 CR16: 0xb9
>(II) I810(0):                 CR17: 0xa3
>(II) I810(0):                 CR18: 0xff
>(II) I810(0):                 CR19: 0x00
>(II) I810(0):                 CR1a: 0x00
>(II) I810(0):                 CR1b: 0x00
>(II) I810(0):                 CR1c: 0x00
>(II) I810(0):                 CR1d: 0x00
>(II) I810(0):                 CR1e: 0x00
>(II) I810(0):                 CR1f: 0x00
>(II) I810(0):                 CR20: 0x00
>(II) I810(0):                 CR21: 0x00
>(II) I810(0):                 CR22: 0x00
>(II) I810(0):                 CR23: 0x00
>(II) I810(0):                 CR24: 0x00
>(II) I810(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) I810(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) I810(0): DumpRegsEnd
>(II) I810(0): xf86UnbindGARTMemory: unbind key 4
>(II) I810(0): xf86UnbindGARTMemory: unbind key 0
>(II) I810(0): xf86UnbindGARTMemory: unbind key 1
>(II) I810(0): xf86UnbindGARTMemory: unbind key 3
>(II) I810(0): xf86UnbindGARTMemory: unbind key 2
>FreeFontPath: FPE "/opt/Xorg/lib/X11/fonts/misc/" refcount is 2, should be 1; fixing.

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Attachments on bug 9325: 8086 | 8103 | 8130

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