Attachment 85148 Details for Bug 68171 – 01- Rename olr

[patch] 01- Rename olr

0001-drm-i915-Rename-ring-outstanding_lazy_request.patch (text/plain), 5.43 KB, created by Chris Wilson on 2013-09-03 21:31:21 UTC

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Creator: Chris Wilson

Created: 2013-09-03 21:31:21 UTC

Size: 5.43 KB

patch

obsolete

>From 3fe6dcc37ba42a1d64d7baaa95285533fe49870a Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Tue, 3 Sep 2013 21:31:16 +0100
>Subject: [PATCH 1/2] drm/i915: Rename ring->outstanding_lazy_request
>
>Prior to preallocating an request for lazy emission, rename the existing
>field to make way (and differentiate the seqno from the struct).
>
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
> drivers/gpu/drm/i915/intel_ringbuffer.c |   18 +++++++++---------
> drivers/gpu/drm/i915/intel_ringbuffer.h |    6 +++---
> 3 files changed, 14 insertions(+), 14 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>index a82d383..0bca205 100644
>--- a/drivers/gpu/drm/i915/i915_gem.c
>+++ b/drivers/gpu/drm/i915/i915_gem.c
>@@ -1064,7 +1064,7 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)
> 	BUG_ON(!mutex_is_locked(&ring->dev->struct_mutex));
> 
> 	ret = 0;
>-	if (seqno == ring->outstanding_lazy_request)
>+	if (seqno == ring->outstanding_lazy_seqno)
> 		ret = i915_add_request(ring, NULL);
> 
> 	return ret;
>@@ -2244,7 +2244,7 @@ int __i915_add_request(struct intel_ring_buffer *ring,
> 	}
> 
> 	trace_i915_gem_request_add(ring, request->seqno);
>-	ring->outstanding_lazy_request = 0;
>+	ring->outstanding_lazy_seqno = 0;
> 
> 	if (!dev_priv->ums.mm_suspended) {
> 		i915_queue_hangcheck(ring->dev);
>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>index 7fa52bd..9aef08d 100644
>--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>@@ -603,7 +603,7 @@ update_mboxes(struct intel_ring_buffer *ring,
> #define MBOX_UPDATE_DWORDS 4
> 	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
> 	intel_ring_emit(ring, mmio_offset);
>-	intel_ring_emit(ring, ring->outstanding_lazy_request);
>+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
> 	intel_ring_emit(ring, MI_NOOP);
> }
> 
>@@ -639,7 +639,7 @@ gen6_add_request(struct intel_ring_buffer *ring)
> 
> 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
> 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
>-	intel_ring_emit(ring, ring->outstanding_lazy_request);
>+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
> 	intel_ring_emit(ring, MI_USER_INTERRUPT);
> 	__intel_ring_advance(ring);
> 
>@@ -733,7 +733,7 @@ pc_render_add_request(struct intel_ring_buffer *ring)
> 			PIPE_CONTROL_WRITE_FLUSH |
> 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
> 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
>-	intel_ring_emit(ring, ring->outstanding_lazy_request);
>+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
> 	intel_ring_emit(ring, 0);
> 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
> 	scratch_addr += 128; /* write to separate cachelines */
>@@ -752,7 +752,7 @@ pc_render_add_request(struct intel_ring_buffer *ring)
> 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
> 			PIPE_CONTROL_NOTIFY);
> 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
>-	intel_ring_emit(ring, ring->outstanding_lazy_request);
>+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
> 	intel_ring_emit(ring, 0);
> 	__intel_ring_advance(ring);
> 
>@@ -973,7 +973,7 @@ i9xx_add_request(struct intel_ring_buffer *ring)
> 
> 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
> 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
>-	intel_ring_emit(ring, ring->outstanding_lazy_request);
>+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
> 	intel_ring_emit(ring, MI_USER_INTERRUPT);
> 	__intel_ring_advance(ring);
> 
>@@ -1486,7 +1486,7 @@ int intel_ring_idle(struct intel_ring_buffer *ring)
> 	int ret;
> 
> 	/* We need to add any requests required to flush the objects and ring */
>-	if (ring->outstanding_lazy_request) {
>+	if (ring->outstanding_lazy_seqno) {
> 		ret = i915_add_request(ring, NULL);
> 		if (ret)
> 			return ret;
>@@ -1506,10 +1506,10 @@ int intel_ring_idle(struct intel_ring_buffer *ring)
> static int
> intel_ring_alloc_seqno(struct intel_ring_buffer *ring)
> {
>-	if (ring->outstanding_lazy_request)
>+	if (ring->outstanding_lazy_seqno)
> 		return 0;
> 
>-	return i915_gem_get_seqno(ring->dev, &ring->outstanding_lazy_request);
>+	return i915_gem_get_seqno(ring->dev, &ring->outstanding_lazy_seqno);
> }
> 
> static int __intel_ring_begin(struct intel_ring_buffer *ring,
>@@ -1556,7 +1556,7 @@ void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno)
> {
> 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> 
>-	BUG_ON(ring->outstanding_lazy_request);
>+	BUG_ON(ring->outstanding_lazy_seqno);
> 
> 	if (INTEL_INFO(ring->dev)->gen >= 6) {
> 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
>index 17b147a..3447c43 100644
>--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
>@@ -140,7 +140,7 @@ struct  intel_ring_buffer {
> 	/**
> 	 * Do we have some not yet emitted requests outstanding?
> 	 */
>-	u32 outstanding_lazy_request;
>+	u32 outstanding_lazy_seqno;
> 	bool gpu_caches_dirty;
> 	bool fbc_dirty;
> 
>@@ -265,8 +265,8 @@ static inline u32 intel_ring_get_tail(struct intel_ring_buffer *ring)
> 
> static inline u32 intel_ring_get_seqno(struct intel_ring_buffer *ring)
> {
>-	BUG_ON(ring->outstanding_lazy_request == 0);
>-	return ring->outstanding_lazy_request;
>+	BUG_ON(ring->outstanding_lazy_seqno == 0);
>+	return ring->outstanding_lazy_seqno;
> }
> 
> static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno)
>-- 
>1.7.10.4
>

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Attachments on bug 68171: 84120 | 84430 | 84431 | 84444 | 85095 | 85141 | 85148 | 85149 | 85153 | 85158 | 85194

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