Attachment 85794 Details for Bug 69328 – Don't set DB_DEST or CB_DEST* bit on cp_coher_cntl

[patch] Don't set DB_DEST or CB_DEST* bit on cp_coher_cntl

0001-XXX-Don-t-set-DB_DEST_BASE-or-CB-DEST_BASE-bits-of-c.patch (text/plain), 2.33 KB, created by Tom Stellard on 2013-09-13 23:29:26 UTC

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Creator: Tom Stellard

Created: 2013-09-13 23:29:26 UTC

Size: 2.33 KB

patch

obsolete

>From b5295565423723807a5e518848507b2465b390d5 Mon Sep 17 00:00:00 2001
>From: Tom Stellard <thomas.stellard@amd.com>
>Date: Fri, 13 Sep 2013 19:18:33 -0400
>Subject: [PATCH] XXX: Don't set DB_DEST_BASE or CB*DEST_BASE bits of
> cp_coher_cntl
>
>This prevents lockups on Cayman when running compute programs. I'm not sure what
>the real problem is yet.
>---
> src/gallium/drivers/r600/r600_hw_context.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
>diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
>index d985af9..d1f24cc 100644
>--- a/src/gallium/drivers/r600/r600_hw_context.c
>+++ b/src/gallium/drivers/r600/r600_hw_context.c
>@@ -252,7 +252,7 @@ void r600_flush_emit(struct r600_context *rctx)
> 	if (rctx->b.chip_class >= R700 &&
> 	    (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV_DB)) {
> 		cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) |
>-				S_0085F0_DB_DEST_BASE_ENA(1) |
>+				0 | //S_0085F0_DB_DEST_BASE_ENA(1) |
> 				S_0085F0_SMX_ACTION_ENA(1);
> 	}
> 
>@@ -262,20 +262,20 @@ void r600_flush_emit(struct r600_context *rctx)
> 	if (rctx->b.chip_class >= R700 &&
> 	    (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV_CB)) {
> 		cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) |
>-				S_0085F0_CB0_DEST_BASE_ENA(1) |
>-				S_0085F0_CB1_DEST_BASE_ENA(1) |
>-				S_0085F0_CB2_DEST_BASE_ENA(1) |
>-				S_0085F0_CB3_DEST_BASE_ENA(1) |
>-				S_0085F0_CB4_DEST_BASE_ENA(1) |
>-				S_0085F0_CB5_DEST_BASE_ENA(1) |
>-				S_0085F0_CB6_DEST_BASE_ENA(1) |
>-				S_0085F0_CB7_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB0_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB1_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB2_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB3_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB4_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB5_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB6_DEST_BASE_ENA(1) |
>+//				S_0085F0_CB7_DEST_BASE_ENA(1) |
> 				S_0085F0_SMX_ACTION_ENA(1);
>-		if (rctx->b.chip_class >= EVERGREEN)
>-			cp_coher_cntl |= S_0085F0_CB8_DEST_BASE_ENA(1) |
>-					S_0085F0_CB9_DEST_BASE_ENA(1) |
>-					S_0085F0_CB10_DEST_BASE_ENA(1) |
>-					S_0085F0_CB11_DEST_BASE_ENA(1);
>+//		if (rctx->b.chip_class >= EVERGREEN)
>+//			cp_coher_cntl |= S_0085F0_CB8_DEST_BASE_ENA(1) |
>+//					S_0085F0_CB9_DEST_BASE_ENA(1) |
>+//					S_0085F0_CB10_DEST_BASE_ENA(1) |
>+//					S_0085F0_CB11_DEST_BASE_ENA(1);
> 	}
> 
> 	if (rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) {
>-- 
>1.8.1.5
>

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