Attachment 89751 Details for Bug 71769 – Fix for limited range output on HSW+

[patch] Fix for limited range output on HSW+

0001-drm-i915-Fix-pipe-CSC-post-offset-calculation.patch (text/plain), 1.29 KB, created by Ville Syrjala on 2013-11-25 14:30:32 UTC

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Creator: Ville Syrjala

Created: 2013-11-25 14:30:32 UTC

Size: 1.29 KB

patch

obsolete

>From f6234120ad06363236598d3a009c6117d66914a4 Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
>Date: Mon, 25 Nov 2013 16:19:30 +0200
>Subject: [PATCH] drm/i915: Fix pipe CSC post offset calculation
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>
>We were miscalculating the pipe CSC post offset for the full->limited
>range conversion. The resulting post offset was double what it was
>supposed to be, which caused blacks to come out grey when using
>limited range output on HSW+.
>
>Cc: stable@vger.kernel.org
>Signed-off-by: Ville SyrjÃ¤lÃ¤ <ville.syrjala@linux.intel.com>
>---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index e85d838..4fab496 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -5991,7 +5991,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc)
> 		uint16_t postoff = 0;
> 
> 		if (intel_crtc->config.limited_color_range)
>-			postoff = (16 * (1 << 13) / 255) & 0x1fff;
>+			postoff = (16 * (1 << 12) / 255) & 0x1fff;
> 
> 		I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
> 		I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);
>-- 
>1.8.3.2
>

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Attachments on bug 71769: 89442 | 89443 | 89444 | 89751

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