Attachment 89964 Details for Bug 71944 – Output from PSC_DEBUG

Output from PSC_DEBUG

psc_debug (text/plain), 117.92 KB, created by Martin Andersson on 2013-11-28 18:20:23 UTC

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Creator: Martin Andersson

Created: 2013-11-28 18:20:23 UTC

Size: 117.92 KB

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obsolete

>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     __, __, __, __
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: []
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>process_alu uc=1  INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>release_op INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>release_op INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>release_op INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>release_op INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>    copy coalesced...
>update_local_interferences : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>p_a_g: INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot: 0
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>p_a_g: INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot: 1
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>p_a_g: INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot: 2
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>p_a_g: INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>slot: 3
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot 3 : INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R1.x.1||FP@R0.x
>  # 0.y => R1.y.1||FP@R0.y
>  # 0.z => R1.z.1||FP@R0.z
>  # 0.w => R1.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>process_group: live_after : []
>update_local_interferences : []
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : []
>check_interferences: before: 
># REGMAP :
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: []
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>process_alu uc=1  INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>release_op INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>release_op INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>release_op INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>release_op INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>    copy coalesced...
>update_local_interferences : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>p_a_g: INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot: 0
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>p_a_g: INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot: 1
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>p_a_g: INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot: 2
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>p_a_g: INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>slot: 3
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot 3 : INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R1.x.1||FP@R0.x
>  # 0.y => R1.y.1||FP@R0.y
>  # 0.z => R1.z.1||FP@R0.z
>  # 0.w => R1.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>process_group: live_after : []
>update_local_interferences : []
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : []
>check_interferences: before: 
># REGMAP :
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  POS   60     t5FP@R1.x, t6FP@R1.y, t7FP@R1.z, t8FP@R1.w
>post_sched_bb EXPORT  PARAM 0     t1FP@R2.x, t2FP@R2.y, t3FP@R2.z, t4FP@R2.w
>post_sched_bb ALU     
>init_globals: [t1FP@R2.x t2FP@R2.y t3FP@R2.z t4FP@R2.w t5FP@R1.x t6FP@R1.y t7FP@R1.z t8FP@R1.w ]
>init_globals: [t9||FP@R1.x t10||FP@R1.y t11||FP@R1.z t12||FP@R1.w t13||FP@R2.x t14||FP@R2.y t15||FP@R2.z t16||FP@R2.w ]
>init_regmap: live: [t1||FP@R2.x t2||FP@R2.y t3||FP@R2.z t4||FP@R2.w t5||FP@R1.x t6||FP@R1.y t7||FP@R1.z t8||FP@R1.w ]
>init_regmap:  2.x <= t1||FP@R2.x
>init_regmap:  2.y <= t2||FP@R2.y
>init_regmap:  2.z <= t3||FP@R2.z
>init_regmap:  2.w <= t4||FP@R2.w
>init_regmap:  1.x <= t5||FP@R1.x
>init_regmap:  1.y <= t6||FP@R1.y
>init_regmap:  1.z <= t7||FP@R1.z
>init_regmap:  1.w <= t8||FP@R1.w
>update_local_interferences : [t1||FP@R2.x t2||FP@R2.y t3||FP@R2.z t4||FP@R2.w t5||FP@R1.x t6||FP@R1.y t7||FP@R1.z t8||FP@R1.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x  release_op (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x
>process_alu uc=1  (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x  pending
>process_alu uc=0  (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y  release_op (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y
>process_alu uc=1  (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y  pending
>process_alu uc=0  (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z  release_op (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z
>process_alu uc=1  (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z  pending
>process_alu uc=0  (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w  release_op (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w
>process_alu uc=1  (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w  pending
>process_alu uc=0  (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=1  (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x  pending
>process_alu uc=0  (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y  release_op (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y
>process_alu uc=1  (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y  pending
>process_alu uc=0  (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z  release_op (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z
>process_alu uc=1  (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z  pending
>process_alu uc=0  (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w  release_op (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w
>process_alu uc=1  (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x
>release_op (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y
>release_op (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z
>release_op (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w
>release_op (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w
>    copy coalesced...
>check_copy: (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>release_op (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y
>release_op (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z
>release_op (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w
>release_op (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x
>    copy coalesced...
>check_copy: (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y
>    copy coalesced...
>check_copy: (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z
>    copy coalesced...
>check_copy: (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w
>    copy coalesced...
>check_copy: (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w
>    copy coalesced...
>update_local_interferences : [t9||FP@R1.x t10||FP@R1.y t11||FP@R1.z t12||FP@R1.w t13||FP@R2.x t14||FP@R2.y t15||FP@R2.z t16||FP@R2.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => t9||FP@R1.x
>  # 1.y => t10||FP@R1.y
>  # 1.z => t11||FP@R1.z
>  # 1.w => t12||FP@R1.w
>  # 2.x => t13||FP@R2.x
>  # 2.y => t14||FP@R2.y
>  # 2.z => t15||FP@R2.z
>  # 2.w => t16||FP@R2.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => t9||FP@R1.x
>  # 1.y => t10||FP@R1.y
>  # 1.z => t11||FP@R1.z
>  # 1.w => t12||FP@R1.w
>  # 2.x => t13||FP@R2.x
>  # 2.y => t14||FP@R2.y
>  # 2.z => t15||FP@R2.z
>  # 2.w => t16||FP@R2.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>post_sched_bb CALL_FS     t9||FP@R1.x, t10||FP@R1.y, t11||FP@R1.z, t12||FP@R1.w, t13||FP@R2.x, t14||FP@R2.y, t15||FP@R2.z, t16||FP@R2.w,       R0.xF@R0.x, R0.yF@R0.y, R0.zF@R0.z, R0.wF@R0.w
>scheduling BB 0
>post_sched_bb EXPORT  PARAM 0     __, __, __, __
>post_sched_bb MEM_STREAM0_BUF0  WRITE 0   ES:1     t5FP@R1.x, __, __, __
>post_sched_bb EXPORT  POS   60     t1FP@R1.x, t2FP@R1.y, t3FP@R1.z, t4FP@R1.w
>post_sched_bb ALU     
>init_globals: [t1FP@R1.x t2FP@R1.y t3FP@R1.z t4FP@R1.w t5FP@R1.x ]
>init_globals: [t6||FP@R1.x t7||FP@R1.y t8||FP@R1.z t9||FP@R1.w ]
>init_regmap: live: [t1||FP@R1.x t2||FP@R1.y t3||FP@R1.z t4||FP@R1.w t5||FP@R1.x ]
>init_regmap:  1.x <= t1||FP@R1.x
>init_regmap:  1.y <= t2||FP@R1.y
>init_regmap:  1.z <= t3||FP@R1.z
>init_regmap:  1.w <= t4||FP@R1.w
>init_regmap:  1.x <= t5||FP@R1.x
>update_local_interferences : [t1||FP@R1.x t2||FP@R1.y t3||FP@R1.z t4||FP@R1.w t5||FP@R1.x ]
>process_alu uc=0  (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=0  (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y  release_op (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y
>process_alu uc=1  (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y  pending
>process_alu uc=0  (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z  release_op (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z
>process_alu uc=1  (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z  pending
>process_alu uc=0  (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w  release_op (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w
>process_alu uc=1  (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w  pending
>process_alu uc=0  (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=2  (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y
>release_op (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z
>release_op (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w
>release_op (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>release_op (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x
>    copy coalesced...
>update_local_interferences : [t6||FP@R1.x t7||FP@R1.y t8||FP@R1.z t9||FP@R1.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => t6||FP@R1.x
>  # 1.y => t7||FP@R1.y
>  # 1.z => t8||FP@R1.z
>  # 1.w => t9||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => t6||FP@R1.x
>  # 1.y => t7||FP@R1.y
>  # 1.z => t8||FP@R1.z
>  # 1.w => t9||FP@R1.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>post_sched_bb CALL_FS     t6||FP@R1.x, t7||FP@R1.y, t8||FP@R1.z, t9||FP@R1.w,       R0.xF@R0.x, R0.yF@R0.y, R0.zF@R0.z, R0.wF@R0.w
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     __, __, __, __
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     __, __, __, __
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: []
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>process_alu uc=1  INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>release_op INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>release_op INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>release_op INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>release_op INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>    copy coalesced...
>update_local_interferences : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>p_a_g: INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot: 0
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>p_a_g: INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot: 1
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>p_a_g: INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot: 2
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>p_a_g: INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>slot: 3
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot 3 : INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R1.x.1||FP@R0.x
>  # 0.y => R1.y.1||FP@R0.y
>  # 0.z => R1.z.1||FP@R0.z
>  # 0.w => R1.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>process_group: live_after : []
>update_local_interferences : []
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : []
>check_interferences: before: 
># REGMAP :
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: []
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>process_alu uc=1  INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>release_op INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>release_op INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>release_op INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>release_op INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>    copy coalesced...
>update_local_interferences : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>p_a_g: INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot: 0
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>p_a_g: INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot: 1
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>p_a_g: INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot: 2
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>p_a_g: INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>slot: 3
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot 3 : INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R1.x.1||FP@R0.x
>  # 0.y => R1.y.1||FP@R0.y
>  # 0.z => R1.z.1||FP@R0.z
>  # 0.w => R1.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>process_group: live_after : []
>update_local_interferences : []
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : []
>check_interferences: before: 
># REGMAP :
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  POS   60     t5FP@R1.x, t6FP@R1.y, t7FP@R1.z, t8FP@R1.w
>post_sched_bb EXPORT  PARAM 0     t1FP@R2.x, t2FP@R2.y, t3FP@R2.z, t4FP@R2.w
>post_sched_bb ALU     
>init_globals: [t1FP@R2.x t2FP@R2.y t3FP@R2.z t4FP@R2.w t5FP@R1.x t6FP@R1.y t7FP@R1.z t8FP@R1.w ]
>init_globals: [t9||FP@R1.x t10||FP@R1.y t11||FP@R1.z t12||FP@R1.w t13||FP@R2.x t14||FP@R2.y t15||FP@R2.z t16||FP@R2.w ]
>init_regmap: live: [t1||FP@R2.x t2||FP@R2.y t3||FP@R2.z t4||FP@R2.w t5||FP@R1.x t6||FP@R1.y t7||FP@R1.z t8||FP@R1.w ]
>init_regmap:  2.x <= t1||FP@R2.x
>init_regmap:  2.y <= t2||FP@R2.y
>init_regmap:  2.z <= t3||FP@R2.z
>init_regmap:  2.w <= t4||FP@R2.w
>init_regmap:  1.x <= t5||FP@R1.x
>init_regmap:  1.y <= t6||FP@R1.y
>init_regmap:  1.z <= t7||FP@R1.z
>init_regmap:  1.w <= t8||FP@R1.w
>update_local_interferences : [t1||FP@R2.x t2||FP@R2.y t3||FP@R2.z t4||FP@R2.w t5||FP@R1.x t6||FP@R1.y t7||FP@R1.z t8||FP@R1.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x  release_op (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x
>process_alu uc=1  (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x  pending
>process_alu uc=0  (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y  release_op (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y
>process_alu uc=1  (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y  pending
>process_alu uc=0  (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z  release_op (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z
>process_alu uc=1  (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z  pending
>process_alu uc=0  (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w  release_op (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w
>process_alu uc=1  (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w  pending
>process_alu uc=0  (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=1  (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x  pending
>process_alu uc=0  (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y  release_op (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y
>process_alu uc=1  (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y  pending
>process_alu uc=0  (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z  release_op (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z
>process_alu uc=1  (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z  pending
>process_alu uc=0  (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w  release_op (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w
>process_alu uc=1  (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R2.x,    R2.x.1||FP@R2.x
>release_op (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R2.y,    R2.y.1||FP@R2.y
>release_op (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R2.z,    R2.z.1||FP@R2.z
>release_op (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R2.w,    R2.w.1||FP@R2.w
>release_op (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w
>    copy coalesced...
>check_copy: (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>release_op (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     t6||FP@R1.y,    R1.y.1||FP@R1.y
>release_op (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     t7||FP@R1.z,    R1.z.1||FP@R1.z
>release_op (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     t8||FP@R1.w,    R1.w.1||FP@R1.w
>release_op (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     R2.x.1||FP@R2.x,    t13||FP@R2.x
>    copy coalesced...
>check_copy: (copy) MOV     R2.y.1||FP@R2.y,    t14||FP@R2.y
>    copy coalesced...
>check_copy: (copy) MOV     R2.z.1||FP@R2.z,    t15||FP@R2.z
>    copy coalesced...
>check_copy: (copy) MOV     R2.w.1||FP@R2.w,    t16||FP@R2.w
>    copy coalesced...
>check_copy: (copy) MOV     R1.x.1||FP@R1.x,    t9||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     R1.y.1||FP@R1.y,    t10||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     R1.z.1||FP@R1.z,    t11||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     R1.w.1||FP@R1.w,    t12||FP@R1.w
>    copy coalesced...
>update_local_interferences : [t9||FP@R1.x t10||FP@R1.y t11||FP@R1.z t12||FP@R1.w t13||FP@R2.x t14||FP@R2.y t15||FP@R2.z t16||FP@R2.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => t9||FP@R1.x
>  # 1.y => t10||FP@R1.y
>  # 1.z => t11||FP@R1.z
>  # 1.w => t12||FP@R1.w
>  # 2.x => t13||FP@R2.x
>  # 2.y => t14||FP@R2.y
>  # 2.z => t15||FP@R2.z
>  # 2.w => t16||FP@R2.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => t9||FP@R1.x
>  # 1.y => t10||FP@R1.y
>  # 1.z => t11||FP@R1.z
>  # 1.w => t12||FP@R1.w
>  # 2.x => t13||FP@R2.x
>  # 2.y => t14||FP@R2.y
>  # 2.z => t15||FP@R2.z
>  # 2.w => t16||FP@R2.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>post_sched_bb CALL_FS     t9||FP@R1.x, t10||FP@R1.y, t11||FP@R1.z, t12||FP@R1.w, t13||FP@R2.x, t14||FP@R2.y, t15||FP@R2.z, t16||FP@R2.w,       R0.xF@R0.x, R0.yF@R0.y, R0.zF@R0.z, R0.wF@R0.w
>scheduling BB 0
>post_sched_bb EXPORT  PARAM 0     __, __, __, __
>post_sched_bb MEM_STREAM0_BUF0  WRITE 0   ES:1     t5FP@R1.x, __, __, __
>post_sched_bb EXPORT  POS   60     t1FP@R1.x, t2FP@R1.y, t3FP@R1.z, t4FP@R1.w
>post_sched_bb ALU     
>init_globals: [t1FP@R1.x t2FP@R1.y t3FP@R1.z t4FP@R1.w t5FP@R1.x ]
>init_globals: [t6||FP@R1.x t7||FP@R1.y t8||FP@R1.z t9||FP@R1.w ]
>init_regmap: live: [t1||FP@R1.x t2||FP@R1.y t3||FP@R1.z t4||FP@R1.w t5||FP@R1.x ]
>init_regmap:  1.x <= t1||FP@R1.x
>init_regmap:  1.y <= t2||FP@R1.y
>init_regmap:  1.z <= t3||FP@R1.z
>init_regmap:  1.w <= t4||FP@R1.w
>init_regmap:  1.x <= t5||FP@R1.x
>update_local_interferences : [t1||FP@R1.x t2||FP@R1.y t3||FP@R1.z t4||FP@R1.w t5||FP@R1.x ]
>process_alu uc=0  (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=0  (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y  release_op (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y
>process_alu uc=1  (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y  pending
>process_alu uc=0  (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z  release_op (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z
>process_alu uc=1  (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z  pending
>process_alu uc=0  (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w  release_op (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w
>process_alu uc=1  (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w  pending
>process_alu uc=0  (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x  release_op (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>process_alu uc=2  (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R1.x,    R1.x.1||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R1.y,    R1.y.1||FP@R1.y
>release_op (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R1.z,    R1.z.1||FP@R1.z
>release_op (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R1.w,    R1.w.1||FP@R1.w
>release_op (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     t5||FP@R1.x,    R1.x.1||FP@R1.x
>release_op (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     R1.y.1||FP@R1.y,    t7||FP@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     R1.z.1||FP@R1.z,    t8||FP@R1.z
>    copy coalesced...
>check_copy: (copy) MOV     R1.w.1||FP@R1.w,    t9||FP@R1.w
>    copy coalesced...
>check_copy: (copy) MOV     R1.x.1||FP@R1.x,    t6||FP@R1.x
>    copy coalesced...
>update_local_interferences : [t6||FP@R1.x t7||FP@R1.y t8||FP@R1.z t9||FP@R1.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => t6||FP@R1.x
>  # 1.y => t7||FP@R1.y
>  # 1.z => t8||FP@R1.z
>  # 1.w => t9||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => t6||FP@R1.x
>  # 1.y => t7||FP@R1.y
>  # 1.z => t8||FP@R1.z
>  # 1.w => t9||FP@R1.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>post_sched_bb CALL_FS     t6||FP@R1.x, t7||FP@R1.y, t8||FP@R1.z, t9||FP@R1.w,       R0.xF@R0.x, R0.yF@R0.y, R0.zF@R0.z, R0.wF@R0.w
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     __, __, __, __
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: [R0.xF@R0.x R0.yF@R0.y ]
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w
>process_alu uc=2  INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w  pending
>process_alu uc=2  INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y
>release_op INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w
>release_op INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>    copy coalesced...
>update_local_interferences : [R2.z.1||FP@R0.z R2.w.1||FP@R0.w R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>p_a_g: INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>current group:
>slot 0 : INTERP_XY     R2.x.1||FP@R0.x,    R0.y||FP@R0.y, Param0x
>slot 1 : INTERP_XY     R2.y.1||FP@R0.y,    R0.x||FP@R0.x, Param0y
>slot 2 : INTERP_XY     __,    R0.y||FP@R0.y, Param0z
>slot 3 : INTERP_XY     __,    R0.x||FP@R0.x, Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R2.x.1||FP@R0.x
>  # 0.y => R2.y.1||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 1  pending 0  conflicting 0
>process_group: live_before : [R2.z.1||FP@R0.z R2.w.1||FP@R0.w R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>process_group: live_after : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>p_a_g: INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>current group:
>slot 0 : INTERP_ZW     __,    R0.y||FP@R0.y, Param0x
>slot 1 : INTERP_ZW     __,    R0.x||FP@R0.x, Param0y
>slot 2 : INTERP_ZW     R2.z.1||FP@R0.z,    R0.y||FP@R0.y, Param0z
>slot 3 : INTERP_ZW     R2.w.1||FP@R0.w,    R0.x||FP@R0.x, Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>process_group: live_after : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>check_interferences: before: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  POS   60     t4FP@R0.x, t5FP@R0.y, t6FP@R0.z, t7FP@R0.w
>post_sched_bb EXPORT  PARAM 0     t2FP@R1.x, t3FP@R1.y, 0|00000000, 1|3f800000
>post_sched_bb ALU     
>init_globals: [t2FP@R1.x t3FP@R1.y t4FP@R0.x t5FP@R0.y t6FP@R0.z t7FP@R0.w ]
>init_globals: [t8F@R1.x t9F@R1.y t10F@R1.z t11F@R1.w ]
>init_regmap: live: [t2||FP@R1.x t3||FP@R1.y t4||FP@R0.x t5||FP@R0.y t6||FP@R0.z t7||FP@R0.w ]
>init_regmap:  1.x <= t2||FP@R1.x
>init_regmap:  1.y <= t3||FP@R1.y
>init_regmap:  0.x <= t4||FP@R0.x
>init_regmap:  0.y <= t5||FP@R0.y
>init_regmap:  0.z <= t6||FP@R0.z
>init_regmap:  0.w <= t7||FP@R0.w
>update_local_interferences : [t2||FP@R1.x t3||FP@R1.y t4||FP@R0.x t5||FP@R0.y t6||FP@R0.z t7||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t2||FP@R1.x,    R23.x.6||FP@R1.x  release_op (copy) MOV     t2||FP@R1.x,    R23.x.6||FP@R1.x
>process_alu uc=0  (copy) MOV     t3||FP@R1.y,    R23.y.3||FP@R1.y  release_op (copy) MOV     t3||FP@R1.y,    R23.y.3||FP@R1.y
>process_alu uc=0  (copy) MOV     t4||FP@R0.x,    R4.x.4||FP@R0.x  release_op (copy) MOV     t4||FP@R0.x,    R4.x.4||FP@R0.x
>process_alu uc=0  (copy) MOV     t5||FP@R0.y,    R4.y.4||FP@R0.y  release_op (copy) MOV     t5||FP@R0.y,    R4.y.4||FP@R0.y
>process_alu uc=0  (copy) MOV     t6||FP@R0.z,    R4.z.4||FP@R0.z  release_op (copy) MOV     t6||FP@R0.z,    R4.z.4||FP@R0.z
>process_alu uc=0  (copy) MOV     t7||FP@R0.w,    R4.w.4||FP@R0.w  release_op (copy) MOV     t7||FP@R0.w,    R4.w.4||FP@R0.w
>process_alu uc=1  CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000  pending
>process_alu uc=1  CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000  pending
>process_alu uc=1  MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y  pending
>process_alu uc=1  MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x  pending
>process_alu uc=1  MULADD     R4.z.4||FP@R0.z,    C6.z, R1.w.1||FP@R1.w, R4.z.3@R2.w  pending
>process_alu uc=1  MULADD     R4.w.4||FP@R0.w,    C6.w, R1.w.1||FP@R1.w, R4.w.3@R2.z  pending
>process_alu uc=4  (copy) MOV     R1.w.1||FP@R1.w,    t11||FP@R1.w  pending
>process_alu uc=2  AND_INT     R23.x.3@R1.z,    R24.x.1@R0.x, R24.y.2@R0.y  pending
>process_alu uc=1  MULADD     R4.x.3@R1.y,    C5.x, R1.z.1||FP@R1.z, R4.x.2@R0.w  pending
>process_alu uc=1  MULADD     R4.y.3@R1.x,    C5.y, R1.z.1||FP@R1.z, R4.y.2@R0.z  pending
>process_alu uc=1  MULADD     R4.z.3@R2.w,    C5.z, R1.z.1||FP@R1.z, R4.z.2@R2.y  pending
>process_alu uc=1  MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x  pending
>process_alu uc=4  (copy) MOV     R1.z.1||FP@R1.z,    t10||FP@R1.z  pending
>process_alu uc=1  AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w  pending
>process_alu uc=1  SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F  pending
>process_alu uc=1  MULADD     R4.x.2@R0.w,    C4.x, R1.y.1||FP@R1.y, R4.x.1@R11.y  pending
>process_alu uc=1  MULADD     R4.y.2@R0.z,    C4.y, R1.y.1||FP@R1.y, R4.y.1@R9.x  pending
>process_alu uc=1  MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w  pending
>process_alu uc=1  MULADD     R4.w.2@R10.x,    C4.w, R1.y.1||FP@R1.y, R4.w.1@R0.z  pending
>process_alu uc=4  (copy) MOV     R1.y.1||FP@R1.y,    t9||FP@R1.y  pending
>process_alu uc=1  SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F  pending
>process_alu uc=1  SETE_DX10     R24.y.1@R11.z,    A8.y[R23.x.2@R0.y]_138F@R2.y, C2.y
>					    rels: A8.y[R23.x.2@R0.y]_138F@R2.y :  <= R8.y.1F, R9.y.1F, R10.y.1F, R11.y.1F, R12.y.1F, R13.y.1F, R14.y.1F, R15.y.1F, R16.y.1F  pending
>process_alu uc=1  MOV     R16.x.1F,    25|41c80000  pending
>process_alu uc=1  MOV     R15.x.1F,    22|41b00000  pending
>process_alu uc=1  MOV     R14.x.1F,    19|41980000  pending
>process_alu uc=1  MOV     R13.x.1F,    16|41800000  pending
>process_alu uc=1  MOV     R12.x.1F,    13|41500000  pending
>process_alu uc=1  MOV     R11.x.1F,    10|41200000  pending
>process_alu uc=1  MOV     R10.x.1F,    7|40e00000  pending
>process_alu uc=1  MOV     R9.x.1F,    4|40800000  pending
>process_alu uc=1  MOV     R8.x.1F,    1|3f800000  pending
>process_alu uc=1  MUL     R4.x.1@R11.y,    C3.x, R1.x.1||FP@R1.x  pending
>process_alu uc=1  MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x  pending
>process_alu uc=1  MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x  pending
>process_alu uc=1  MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x  pending
>process_alu uc=4  (copy) MOV     R1.x.1||FP@R1.x,    t8||FP@R1.x  pending
>process_alu uc=1  MOV     R16.z.1F,    27|41d80000  pending
>process_alu uc=1  MOV     R15.z.1F,    24|41c00000  pending
>process_alu uc=1  MOV     R14.z.1F,    21|41a80000  pending
>process_alu uc=1  MOV     R13.z.1F,    18|41900000  pending
>process_alu uc=1  MOV     R12.z.1F,    15|41700000  pending
>process_alu uc=1  MOV     R11.z.1F,    12|41400000  pending
>process_alu uc=1  MOV     R10.z.1F,    9|41100000  pending
>process_alu uc=1  MOV     R9.z.1F,    6|40c00000  pending
>process_alu uc=1  MOV     R8.z.1F,    3|40400000  pending
>process_alu uc=3  ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x  pending
>process_alu uc=1  MOV     R16.y.1F,    26|41d00000  pending
>process_alu uc=1  MOV     R15.y.1F,    23|41b80000  pending
>process_alu uc=1  MOV     R14.y.1F,    20|41a00000  pending
>process_alu uc=1  MOV     R13.y.1F,    17|41880000  pending
>process_alu uc=1  MOV     R12.y.1F,    14|41600000  pending
>process_alu uc=1  MOV     R11.y.1F,    11|41300000  pending
>process_alu uc=1  MOV     R10.y.1F,    8|41000000  pending
>process_alu uc=1  MOV     R9.y.1F,    5|40a00000  pending
>process_alu uc=1  MOV     R8.y.1F,    2|40000000  pending
>process_alu uc=1  MULLO_INT     R23.x.1@R0.x, __, __, __,       C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t2||FP@R1.x,    R23.x.6||FP@R1.x
>release_op CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R1.y,    R23.y.3||FP@R1.y
>release_op CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.x,    R4.x.4||FP@R0.x
>release_op MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>    copy coalesced...
>check_copy: (copy) MOV     t5||FP@R0.y,    R4.y.4||FP@R0.y
>release_op MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>    copy coalesced...
>check_copy: (copy) MOV     t6||FP@R0.z,    R4.z.4||FP@R0.z
>release_op MULADD     R4.z.4||FP@R0.z,    C6.z, R1.w.1||FP@R1.w, R4.z.3@R2.w
>    copy coalesced...
>check_copy: (copy) MOV     t7||FP@R0.w,    R4.w.4||FP@R0.w
>release_op MULADD     R4.w.4||FP@R0.w,    C6.w, R1.w.1||FP@R1.w, R4.w.3@R2.z
>    copy coalesced...
>update_local_interferences : [R4.x.4||FP@R0.x R4.y.4||FP@R0.y R4.z.4||FP@R0.z R4.w.4||FP@R0.w R23.x.6||FP@R1.x R23.y.3||FP@R1.y ]
>p_a_g: CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>slot: 0
>current group:
>slot 0 : CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>p_a_g: CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000
>slot: 1
>current group:
>slot 0 : CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>slot 1 : CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000
>p_a_g: MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>   no suitable slots
>p_a_g: MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>   no suitable slots
>p_a_g: MULADD     R4.z.4||FP@R0.z,    C6.z, R1.w.1||FP@R1.w, R4.z.3@R2.w
>slot: 2
>current group:
>slot 0 : CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>slot 1 : CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000
>slot 2 : MULADD     R4.z.4||FP@R0.z,    C6.z, R1.w.1||FP@R1.w, R4.z.3@R2.w
>p_a_g: MULADD     R4.w.4||FP@R0.w,    C6.w, R1.w.1||FP@R1.w, R4.w.3@R2.z
>slot: 3
>current group:
>slot 0 : CNDE_INT     R23.x.6||FP@R1.x,    R23.x.3@R1.z, 1|3f800000, 0|00000000
>slot 1 : CNDE_INT     R23.y.3||FP@R1.y,    R23.x.3@R1.z, 0|00000000, 1|3f800000
>slot 2 : MULADD     R4.z.4||FP@R0.z,    C6.z, R1.w.1||FP@R1.w, R4.z.3@R2.w
>slot 3 : MULADD     R4.w.4||FP@R0.w,    C6.w, R1.w.1||FP@R1.w, R4.w.3@R2.z
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R4.x.4||FP@R0.x
>  # 0.y => R4.y.4||FP@R0.y
>  # 0.z => R4.z.4||FP@R0.z
>  # 0.w => R4.w.4||FP@R0.w
>  # 1.x => R23.x.6||FP@R1.x
>  # 1.y => R23.y.3||FP@R1.y
>check_interferences: after: 
># REGMAP :
>  # 0.x => R4.x.4||FP@R0.x
>  # 0.y => R4.y.4||FP@R0.y
>  # 1.w => R1.w.1||FP@R1.w
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 2  pending 50  conflicting 0
>process_group: live_before : [R4.x.4||FP@R0.x R4.y.4||FP@R0.y R4.z.4||FP@R0.z R4.w.4||FP@R0.w R23.x.6||FP@R1.x R23.y.3||FP@R1.y ]
>clearing interferences for R23.x.3@R1.z
>clearing interferences for R4.z.3@R2.w
>clearing interferences for R4.w.3@R2.z
>process_group: live_after : [R1.w.1||FP@R1.w R4.z.3@R2.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3@R1.z ]
>update_local_interferences : [R1.w.1||FP@R1.w R4.z.3@R2.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3@R1.z ]
>release_op AND_INT     R23.x.3@R1.z,    R24.x.1@R0.x, R24.y.2@R0.y
>release_op MULADD     R4.z.3@R2.w,    C5.z, R1.z.1||FP@R1.z, R4.z.2@R2.y
>release_op MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.w.1||FP@R1.w R4.z.3@R2.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3@R1.z ]
>p_a_g: MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>slot: 0
>current group:
>slot 0 : MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>p_a_g: MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>slot: 1
>current group:
>slot 0 : MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>slot 1 : MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>p_a_g: AND_INT     R23.x.3@R1.z,    R24.x.1@R0.x, R24.y.2@R0.y
>slot: 2
>current group:
>slot 0 : MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>slot 1 : MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>slot 2 : AND_INT     R23.x.3@R1.z,    R24.x.1@R0.x, R24.y.2@R0.y
>p_a_g: MULADD     R4.z.3@R2.w,    C5.z, R1.z.1||FP@R1.z, R4.z.2@R2.y
>slot: 3
>current group:
>slot 0 : MULADD     R4.x.4||FP@R0.x,    C6.x, R1.w.1||FP@R1.w, R4.x.3@R1.y
>slot 1 : MULADD     R4.y.4||FP@R0.y,    C6.y, R1.w.1||FP@R1.w, R4.y.3@R1.x
>slot 2 : AND_INT     R23.x.3@R1.z,    R24.x.1@R0.x, R24.y.2@R0.y
>slot 3 : MULADD     R4.z.3@R2.w,    C5.z, R1.z.1||FP@R1.z, R4.z.2@R2.y
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R4.x.4||FP@R0.x
>  # 0.y => R4.y.4||FP@R0.y
>  # 1.w => R1.w.1||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.z => R1.z.1||FP@R1.z
>  # 1.w => R1.w.1||FP@R1.w
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 1  pending 47  conflicting 0
>recolor_local: R23.x.3@R1.z   interferences: [R1.w.1||FP@R1.w R4.z.3@R2.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3@R1.z ]
>registers bits: 0     recolored: R23.x.3@R124.z
>recolor_local: R4.z.3@R2.w   interferences: [R1.w.1||FP@R1.w R4.z.3@R2.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3F@R124.z ]
>	add_interferences: R1.w.1||FP@R1.w
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R4.z.3@R124.w
>process_group: live_before : [R1.w.1||FP@R1.w R4.z.3F@R124.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R23.x.3F@R124.z ]
>clearing interferences for R4.x.3@R1.y
>clearing interferences for R4.y.3@R1.x
>clearing interferences for R24.x.1@R0.x
>clearing interferences for R24.y.2@R0.y
>clearing interferences for R4.z.2@R2.y
>process_group: live_after : [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.z.2@R2.y R4.x.3@R1.y R4.y.3@R1.x R4.w.3@R2.z R24.x.1@R0.x R24.y.2@R0.y ]
>update_local_interferences : [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.z.2@R2.y R4.x.3@R1.y R4.y.3@R1.x R4.w.3@R2.z R24.x.1@R0.x R24.y.2@R0.y ]
>release_op MULADD     R4.x.3@R1.y,    C5.x, R1.z.1||FP@R1.z, R4.x.2@R0.w
>release_op (copy) MOV     R1.w.1||FP@R1.w,    t11||FP@R1.w
>release_op MULADD     R4.y.3@R1.x,    C5.y, R1.z.1||FP@R1.z, R4.y.2@R0.z
>release_op SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>release_op AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>release_op MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>   #### group emitted
>prepare_alu_group: starting...
>check_copy: (copy) MOV     R1.w.1||FP@R1.w,    t11||FP@R1.w
>    copy coalesced...
>update_local_interferences : [R1.z.1||FP@R1.z R4.z.2@R2.y R4.x.3@R1.y R4.y.3@R1.x R4.w.3@R2.z R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>p_a_g: MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x
>slot: 2
>current group:
>slot 2 : MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x
>p_a_g: MULADD     R4.x.3@R1.y,    C5.x, R1.z.1||FP@R1.z, R4.x.2@R0.w
>slot: 1
>current group:
>slot 1 : MULADD     R4.x.3@R1.y,    C5.x, R1.z.1||FP@R1.z, R4.x.2@R0.w
>slot 2 : MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x
>p_a_g: MULADD     R4.y.3@R1.x,    C5.y, R1.z.1||FP@R1.z, R4.y.2@R0.z
>slot: 0
>current group:
>slot 0 : MULADD     R4.y.3@R1.x,    C5.y, R1.z.1||FP@R1.z, R4.y.2@R0.z
>slot 1 : MULADD     R4.x.3@R1.y,    C5.x, R1.z.1||FP@R1.z, R4.x.2@R0.w
>slot 2 : MULADD     R4.w.3@R2.z,    C5.w, R1.z.1||FP@R1.z, R4.w.2@R10.x
>p_a_g: SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>   no suitable slots
>p_a_g: AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>   no suitable slots
>p_a_g: MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.z => R1.z.1||FP@R1.z
>  # 1.w => t11||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.z => R1.z.1||FP@R1.z
>  # 1.w => t11||FP@R1.w
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 3  pending 41  conflicting 0
>recolor_local: R4.y.3@R1.x   interferences: [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.z.2@R2.y R4.x.3@R1.y R4.y.3@R1.x R4.w.3@R2.z R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>registers bits: 0     recolored: R4.y.3@R124.x
>recolor_local: R4.x.3@R1.y   interferences: [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.z.2@R2.y R4.x.3@R1.y R4.y.3F@R124.x R4.w.3@R2.z R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>registers bits: 0     recolored: R4.x.3@R124.y
>recolor_local: R4.w.3@R2.z   interferences: [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.z.2@R2.y R4.x.3F@R124.y R4.y.3F@R124.x R4.z.3F@R124.w R4.w.3@R2.z R4.x.4||FP@R0.x R4.y.4||FP@R0.y R24.x.1@R0.x R24.y.2@R0.y R23.x.3F@R124.z t11||FP@R1.w ]
>	add_interferences: R1.z.1||FP@R1.z
>	add_interferences: R23.x.3F@R124.z
>registers bits: 156
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001000
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R4.w.3@R125.z
>process_group: live_before : [R1.z.1||FP@R1.z R4.z.2@R2.y R4.x.3F@R124.y R4.y.3F@R124.x R4.w.3F@R125.z R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>clearing interferences for R4.y.2@R0.z
>clearing interferences for R4.x.2@R0.w
>clearing interferences for R4.w.2@R10.x
>process_group: live_after : [R1.z.1||FP@R1.z R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>update_local_interferences : [R1.z.1||FP@R1.z R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1@R0.x R24.y.2@R0.y t11||FP@R1.w ]
>release_op MULADD     R4.y.2@R0.z,    C4.y, R1.y.1||FP@R1.y, R4.y.1@R9.x
>release_op MULADD     R4.x.2@R0.w,    C4.x, R1.y.1||FP@R1.y, R4.x.1@R11.y
>release_op (copy) MOV     R1.z.1||FP@R1.z,    t10||FP@R1.z
>release_op MULADD     R4.w.2@R10.x,    C4.w, R1.y.1||FP@R1.y, R4.w.1@R0.z
>   #### group emitted
>prepare_alu_group: starting...
>check_copy: (copy) MOV     R1.z.1||FP@R1.z,    t10||FP@R1.z
>    copy coalesced...
>update_local_interferences : [R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1@R0.x R24.y.2@R0.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>slot: 0
>current group:
>slot 0 : SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>p_a_g: AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>slot: 1
>current group:
>slot 0 : SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>slot 1 : AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>p_a_g: MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>   no suitable slots
>p_a_g: MULADD     R4.y.2@R0.z,    C4.y, R1.y.1||FP@R1.y, R4.y.1@R9.x
>slot: 2
>current group:
>slot 0 : SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>slot 1 : AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>slot 2 : MULADD     R4.y.2@R0.z,    C4.y, R1.y.1||FP@R1.y, R4.y.1@R9.x
>p_a_g: MULADD     R4.x.2@R0.w,    C4.x, R1.y.1||FP@R1.y, R4.x.1@R11.y
>slot: 3
>current group:
>slot 0 : SETE_DX10     R24.x.1@R0.x,    A8.x[R23.x.2@R0.y]_135F@R0.x, C2.x
>					    rels: A8.x[R23.x.2@R0.y]_135F@R0.x :  <= R8.x.1F, R9.x.1F, R10.x.1F, R11.x.1F, R12.x.1F, R13.x.1F, R14.x.1F, R15.x.1F, R16.x.1F
>slot 1 : AND_INT     R24.y.2@R0.y,    R24.y.1@R11.z, R24.z.1@R2.w
>slot 2 : MULADD     R4.y.2@R0.z,    C4.y, R1.y.1||FP@R1.y, R4.y.1@R9.x
>slot 3 : MULADD     R4.x.2@R0.w,    C4.x, R1.y.1||FP@R1.y, R4.x.1@R11.y
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>  new current_AR assigned: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.y => R1.y.1||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 2  pending 37  conflicting 0
>recolor_local: R24.x.1@R0.x   interferences: [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R4.x.3F@R124.y R4.y.3F@R124.x R4.w.3F@R125.z R24.x.1@R0.x R24.y.2@R0.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R4.y.3F@R124.x
>registers bits: 156
>  0   00000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001000
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R24.x.1@R125.x
>recolor_local: R24.y.2@R0.y   interferences: [R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R4.x.3F@R124.y R4.y.3F@R124.x R4.w.3F@R125.z R24.x.1F@R125.x R24.y.2@R0.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R4.x.3F@R124.y
>registers bits: 156
>  0   00000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001000
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R24.y.2@R125.y
>recolor_local: R4.y.2@R0.z   interferences: [R1.z.1||FP@R1.z R4.x.2@R0.w R4.y.2@R0.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1F@R125.x R24.y.2F@R125.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R1.z.1||FP@R1.z
>	add_interferences: t10||FP@R1.z
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R4.y.2@R124.z
>recolor_local: R4.x.2@R0.w   interferences: [R1.z.1||FP@R1.z R4.x.2@R0.w R4.y.2F@R124.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1F@R125.x R24.y.2F@R125.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: t11||FP@R1.w
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R4.x.2@R124.w
>process_group: live_before : [R4.x.2F@R124.w R4.y.2F@R124.z R4.z.2@R2.y R4.w.2@R10.x R24.x.1F@R125.x R24.y.2F@R125.y t10||FP@R1.z t11||FP@R1.w ]
>clearing interferences for R8.x.1F
>clearing interferences for R9.x.1F
>clearing interferences for R10.x.1F
>clearing interferences for R11.x.1F
>clearing interferences for R12.x.1F
>clearing interferences for R13.x.1F
>clearing interferences for R14.x.1F
>clearing interferences for R15.x.1F
>clearing interferences for R16.x.1F
>clearing interferences for R24.y.1@R11.z
>clearing interferences for R24.z.1@R2.w
>clearing interferences for R4.y.1@R9.x
>clearing interferences for R4.x.1@R11.y
>process_group: live_after : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.2@R2.y R4.w.2@R10.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.y.1@R11.z R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.2@R2.y R4.w.2@R10.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.y.1@R11.z R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>release_op MOV     R8.x.1F,    1|3f800000
>release_op MOV     R9.x.1F,    4|40800000
>release_op MOV     R10.x.1F,    7|40e00000
>release_op MOV     R11.x.1F,    10|41200000
>release_op MOV     R12.x.1F,    13|41500000
>release_op MOV     R13.x.1F,    16|41800000
>release_op MOV     R14.x.1F,    19|41980000
>release_op MOV     R15.x.1F,    22|41b00000
>release_op MOV     R16.x.1F,    25|41c80000
>release_op SETE_DX10     R24.y.1@R11.z,    A8.y[R23.x.2@R0.y]_138F@R2.y, C2.y
>					    rels: A8.y[R23.x.2@R0.y]_138F@R2.y :  <= R8.y.1F, R9.y.1F, R10.y.1F, R11.y.1F, R12.y.1F, R13.y.1F, R14.y.1F, R15.y.1F, R16.y.1F
>release_op SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F
>release_op MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>release_op MUL     R4.x.1@R11.y,    C3.x, R1.x.1||FP@R1.x
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.2@R2.y R4.w.2@R10.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.y.1@R11.z R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>slot: 1
>current group:
>slot 1 : MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>p_a_g: MULADD     R4.w.2@R10.x,    C4.w, R1.y.1||FP@R1.y, R4.w.1@R0.z
>slot: 0
>current group:
>slot 0 : MULADD     R4.w.2@R10.x,    C4.w, R1.y.1||FP@R1.y, R4.w.1@R0.z
>slot 1 : MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>p_a_g: MOV     R8.x.1F,    1|3f800000
>   no suitable slots
>p_a_g: MOV     R9.x.1F,    4|40800000
>   no suitable slots
>p_a_g: MOV     R10.x.1F,    7|40e00000
>   no suitable slots
>p_a_g: MOV     R11.x.1F,    10|41200000
>   no suitable slots
>p_a_g: MOV     R12.x.1F,    13|41500000
>   no suitable slots
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: SETE_DX10     R24.y.1@R11.z,    A8.y[R23.x.2@R0.y]_138F@R2.y, C2.y
>					    rels: A8.y[R23.x.2@R0.y]_138F@R2.y :  <= R8.y.1F, R9.y.1F, R10.y.1F, R11.y.1F, R12.y.1F, R13.y.1F, R14.y.1F, R15.y.1F, R16.y.1F
>slot: 2
>current group:
>slot 0 : MULADD     R4.w.2@R10.x,    C4.w, R1.y.1||FP@R1.y, R4.w.1@R0.z
>slot 1 : MULADD     R4.z.2@R2.y,    C4.z, R1.y.1||FP@R1.y, R4.z.1@R0.w
>slot 2 : SETE_DX10     R24.y.1@R11.z,    A8.y[R23.x.2@R0.y]_138F@R2.y, C2.y
>					    rels: A8.y[R23.x.2@R0.y]_138F@R2.y :  <= R8.y.1F, R9.y.1F, R10.y.1F, R11.y.1F, R12.y.1F, R13.y.1F, R14.y.1F, R15.y.1F, R16.y.1F
>p_a_g: SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F
>slot: 3
>   reservation failed
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MUL     R4.x.1@R11.y,    C3.x, R1.x.1||FP@R1.x
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.y => R1.y.1||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.y => R1.y.1||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 12  pending 24  conflicting 0
>recolor_local: R4.w.2@R10.x   interferences: [R1.y.1||FP@R1.y R1.z.1||FP@R1.z R4.x.1@R11.y R4.y.1@R9.x R4.x.2F@R124.w R4.y.2F@R124.z R4.z.2@R2.y R4.w.2@R10.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.x.1F@R125.x R24.y.1@R11.z R24.z.1@R2.w R24.y.2F@R125.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R8.x.1F
>	add_interferences: R9.x.1F
>	add_interferences: R10.x.1F
>	add_interferences: R11.x.1F
>	add_interferences: R12.x.1F
>	add_interferences: R13.x.1F
>	add_interferences: R14.x.1F
>	add_interferences: R15.x.1F
>	add_interferences: R16.x.1F
>	add_interferences: R24.x.1F@R125.x
>registers bits: 157
>  0   11111111
>  8   10000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00000100
>  128   00000000
>  136   00000000
>  144   00000000
>  152   00000     recolored: R4.w.2@R124.x
>recolor_local: R4.z.2@R2.y   interferences: [R1.y.1||FP@R1.y R1.z.1||FP@R1.z R1.w.1||FP@R1.w R4.x.1@R11.y R4.y.1@R9.x R4.x.2F@R124.w R4.y.2F@R124.z R4.z.2@R2.y R4.w.2F@R124.x R4.x.3F@R124.y R4.y.3F@R124.x R4.w.3F@R125.z R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.x.1F@R125.x R24.y.1@R11.z R24.z.1@R2.w R24.y.2F@R125.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R1.y.1||FP@R1.y
>	add_interferences: R4.x.3F@R124.y
>	add_interferences: R24.y.2F@R125.y
>registers bits: 156
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001100
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R4.z.2@R126.y
>recolor_local: R24.y.1@R11.z   interferences: [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.2F@R126.y R4.w.2F@R124.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.y.1@R11.z R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: t10||FP@R1.z
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R24.y.1@R124.z
>process_group: live_before : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.2F@R126.y R4.w.2F@R124.x R8.x.1F R9.x.1F R10.x.1F R11.x.1F R12.x.1F R13.x.1F R14.x.1F R15.x.1F R16.x.1F R24.y.1F@R124.z R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>clearing interferences for R4.w.1@R0.z
>clearing interferences for R4.z.1@R0.w
>clearing interferences for R8.y.1F
>clearing interferences for R9.y.1F
>clearing interferences for R10.y.1F
>clearing interferences for R11.y.1F
>clearing interferences for R12.y.1F
>clearing interferences for R13.y.1F
>clearing interferences for R14.y.1F
>clearing interferences for R15.y.1F
>clearing interferences for R16.y.1F
>process_group: live_after : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.z.1@R2.w t10||FP@R1.z t11||FP@R1.w ]
>release_op MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>release_op (copy) MOV     R1.y.1||FP@R1.y,    t9||FP@R1.y
>release_op MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x
>release_op MOV     R8.y.1F,    2|40000000
>release_op MOV     R9.y.1F,    5|40a00000
>release_op MOV     R10.y.1F,    8|41000000
>release_op MOV     R11.y.1F,    11|41300000
>release_op MOV     R12.y.1F,    14|41600000
>release_op MOV     R13.y.1F,    17|41880000
>release_op MOV     R14.y.1F,    20|41a00000
>release_op MOV     R15.y.1F,    23|41b80000
>release_op MOV     R16.y.1F,    26|41d00000
>   #### group emitted
>prepare_alu_group: starting...
>check_copy: (copy) MOV     R1.y.1||FP@R1.y,    t9||FP@R1.y
>    copy coalesced...
>update_local_interferences : [R4.x.1@R11.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.z.1@R2.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R8.x.1F,    1|3f800000
>slot: 0
>current group:
>slot 0 : MOV     R8.x.1F,    1|3f800000
>p_a_g: MOV     R9.x.1F,    4|40800000
>   no suitable slots
>p_a_g: MOV     R10.x.1F,    7|40e00000
>   no suitable slots
>p_a_g: MOV     R11.x.1F,    10|41200000
>   no suitable slots
>p_a_g: MOV     R12.x.1F,    13|41500000
>   no suitable slots
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F
>slot: 3
>current group:
>slot 0 : MOV     R8.x.1F,    1|3f800000
>slot 3 : SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MUL     R4.x.1@R11.y,    C3.x, R1.x.1||FP@R1.x
>slot: 1
>current group:
>slot 0 : MOV     R8.x.1F,    1|3f800000
>slot 1 : MUL     R4.x.1@R11.y,    C3.x, R1.x.1||FP@R1.x
>slot 3 : SETE_DX10     R24.z.1@R2.w,    A8.z[R23.x.2@R0.y]_141F@R2.z, C2.z
>					    rels: A8.z[R23.x.2@R0.y]_141F@R2.z :  <= R8.z.1F, R9.z.1F, R10.z.1F, R11.z.1F, R12.z.1F, R13.z.1F, R14.z.1F, R15.z.1F, R16.z.1F
>p_a_g: MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>slot: 2
>   reservation failed
>p_a_g: MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R8.y.1F,    2|40000000
>   no suitable slots
>p_a_g: MOV     R9.y.1F,    5|40a00000
>   no suitable slots
>p_a_g: MOV     R10.y.1F,    8|41000000
>   no suitable slots
>p_a_g: MOV     R11.y.1F,    11|41300000
>   no suitable slots
>p_a_g: MOV     R12.y.1F,    14|41600000
>   no suitable slots
>p_a_g: MOV     R13.y.1F,    17|41880000
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 20  pending 12  conflicting 0
>recolor_local: R4.x.1@R11.y   interferences: [R1.y.1||FP@R1.y R4.x.1@R11.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R4.z.2F@R126.y R4.w.2F@R124.x R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.y.1F@R124.z R24.z.1@R2.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R1.y.1||FP@R1.y
>	add_interferences: R4.z.2F@R126.y
>	add_interferences: R8.y.1F
>	add_interferences: R9.y.1F
>	add_interferences: R10.y.1F
>	add_interferences: R11.y.1F
>	add_interferences: R12.y.1F
>	add_interferences: R13.y.1F
>	add_interferences: R14.y.1F
>	add_interferences: R15.y.1F
>	add_interferences: R16.y.1F
>	add_interferences: t9||FP@R1.y
>registers bits: 158
>  0   01111111
>  8   11100000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00000010
>  128   00000000
>  136   00000000
>  144   00000000
>  152   000000     recolored: R4.x.1@R124.y
>recolor_local: R24.z.1@R2.w   interferences: [R1.y.1||FP@R1.y R4.x.1F@R124.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R4.z.2F@R126.y R4.w.2F@R124.x R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.y.1F@R124.z R24.z.1@R2.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: t11||FP@R1.w
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R24.z.1@R124.w
>process_group: live_before : [R4.x.1F@R124.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.x.1F R8.y.1F R9.x.1F R9.y.1F R10.x.1F R10.y.1F R11.x.1F R11.y.1F R12.x.1F R12.y.1F R13.x.1F R13.y.1F R14.x.1F R14.y.1F R15.x.1F R15.y.1F R16.x.1F R16.y.1F R24.z.1F@R124.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>clearing interferences for R8.z.1F
>clearing interferences for R9.z.1F
>clearing interferences for R10.z.1F
>clearing interferences for R11.z.1F
>clearing interferences for R12.z.1F
>clearing interferences for R13.z.1F
>clearing interferences for R14.z.1F
>clearing interferences for R15.z.1F
>clearing interferences for R16.z.1F
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>release_op ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>release_op MOV     R8.z.1F,    3|40400000
>release_op MOV     R9.z.1F,    6|40c00000
>release_op MOV     R10.z.1F,    9|41100000
>release_op MOV     R11.z.1F,    12|41400000
>release_op MOV     R12.z.1F,    15|41700000
>release_op MOV     R13.z.1F,    18|41900000
>release_op MOV     R14.z.1F,    21|41a80000
>release_op MOV     R15.z.1F,    24|41c00000
>release_op MOV     R16.z.1F,    27|41d80000
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R9.x.1F,    4|40800000
>slot: 0
>literal reserve 1082130432  4
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R9.x.1F,    4|40800000
>p_a_g: MOV     R10.x.1F,    7|40e00000
>   no suitable slots
>p_a_g: MOV     R11.x.1F,    10|41200000
>   no suitable slots
>p_a_g: MOV     R12.x.1F,    13|41500000
>   no suitable slots
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>slot: 2
>current group:
>slot 0 : MOV     R9.x.1F,    4|40800000
>slot 2 : MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>p_a_g: MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x
>slot: 3
>current group:
>slot 0 : MOV     R9.x.1F,    4|40800000
>slot 2 : MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>slot 3 : MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x
>p_a_g: MOV     R8.y.1F,    2|40000000
>slot: 1
>literal reserve 1073741824  2
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R9.x.1F,    4|40800000
>slot 1 : MOV     R8.y.1F,    2|40000000
>slot 2 : MUL     R4.w.1@R0.z,    C3.w, R1.x.1||FP@R1.x
>slot 3 : MUL     R4.z.1@R0.w,    C3.z, R1.x.1||FP@R1.x
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 26  pending 2  conflicting 0
>recolor_local: R4.w.1@R0.z   interferences: [R1.x.1||FP@R1.x R1.y.1||FP@R1.y R4.x.1F@R124.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1@R0.z R8.x.1F R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F R24.z.1F@R124.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R8.z.1F
>	add_interferences: R9.z.1F
>	add_interferences: R10.z.1F
>	add_interferences: R11.z.1F
>	add_interferences: R12.z.1F
>	add_interferences: R13.z.1F
>	add_interferences: R14.z.1F
>	add_interferences: R15.z.1F
>	add_interferences: R16.z.1F
>	add_interferences: t10||FP@R1.z
>registers bits: 34
>  0   01111111
>  8   11100000
>  16   00000000
>  24   00000000
>  32   00     recolored: R4.w.1@R124.z
>recolor_local: R4.z.1@R0.w   interferences: [R1.x.1||FP@R1.x R1.y.1||FP@R1.y R4.x.1F@R124.y R4.y.1@R9.x R4.z.1@R0.w R4.w.1F@R124.z R8.x.1F R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F R24.z.1F@R124.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R24.z.1F@R124.w
>	add_interferences: t11||FP@R1.w
>registers bits: 156
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001000
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R4.z.1@R125.w
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R4.z.1F@R125.w R4.w.1F@R124.z R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R8.z.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R8.z.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 440800000   1082130432
>literal emitted: 240000000   1073741824
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R8.z.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R10.x.1F,    7|40e00000
>slot: 0
>literal reserve 1088421888  7
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R10.x.1F,    7|40e00000
>p_a_g: MOV     R11.x.1F,    10|41200000
>   no suitable slots
>p_a_g: MOV     R12.x.1F,    13|41500000
>   no suitable slots
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R9.y.1F,    5|40a00000
>slot: 1
>literal reserve 1084227584  5
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R10.x.1F,    7|40e00000
>slot 1 : MOV     R9.y.1F,    5|40a00000
>p_a_g: MOV     R10.y.1F,    8|41000000
>   no suitable slots
>p_a_g: MOV     R11.y.1F,    11|41300000
>   no suitable slots
>p_a_g: MOV     R12.y.1F,    14|41600000
>   no suitable slots
>p_a_g: MOV     R13.y.1F,    17|41880000
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R8.z.1F,    3|40400000
>slot: 2
>literal reserve 1077936128  3
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R10.x.1F,    7|40e00000
>slot 1 : MOV     R9.y.1F,    5|40a00000
>slot 2 : MOV     R8.z.1F,    3|40400000
>p_a_g: MOV     R9.z.1F,    6|40c00000
>   no suitable slots
>p_a_g: MOV     R10.z.1F,    9|41100000
>   no suitable slots
>p_a_g: MOV     R11.z.1F,    12|41400000
>   no suitable slots
>p_a_g: MOV     R12.z.1F,    15|41700000
>   no suitable slots
>p_a_g: MOV     R13.z.1F,    18|41900000
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 23  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R8.z.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R9.z.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R9.z.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 740e00000   1088421888
>literal emitted: 540a00000   1084227584
>literal emitted: 340400000   1077936128
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R9.z.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R11.x.1F,    10|41200000
>slot: 0
>literal reserve 1092616192  10
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R11.x.1F,    10|41200000
>p_a_g: MOV     R12.x.1F,    13|41500000
>   no suitable slots
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R10.y.1F,    8|41000000
>slot: 1
>literal reserve 1090519040  8
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R11.x.1F,    10|41200000
>slot 1 : MOV     R10.y.1F,    8|41000000
>p_a_g: MOV     R11.y.1F,    11|41300000
>   no suitable slots
>p_a_g: MOV     R12.y.1F,    14|41600000
>   no suitable slots
>p_a_g: MOV     R13.y.1F,    17|41880000
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R9.z.1F,    6|40c00000
>slot: 2
>literal reserve 1086324736  6
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R11.x.1F,    10|41200000
>slot 1 : MOV     R10.y.1F,    8|41000000
>slot 2 : MOV     R9.z.1F,    6|40c00000
>p_a_g: MOV     R10.z.1F,    9|41100000
>   no suitable slots
>p_a_g: MOV     R11.z.1F,    12|41400000
>   no suitable slots
>p_a_g: MOV     R12.z.1F,    15|41700000
>   no suitable slots
>p_a_g: MOV     R13.z.1F,    18|41900000
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 20  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R9.z.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R10.z.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R10.z.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 1041200000   1092616192
>literal emitted: 841000000   1090519040
>literal emitted: 640c00000   1086324736
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R10.z.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R12.x.1F,    13|41500000
>slot: 0
>literal reserve 1095761920  13
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R12.x.1F,    13|41500000
>p_a_g: MOV     R13.x.1F,    16|41800000
>   no suitable slots
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R11.y.1F,    11|41300000
>slot: 1
>literal reserve 1093664768  11
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R12.x.1F,    13|41500000
>slot 1 : MOV     R11.y.1F,    11|41300000
>p_a_g: MOV     R12.y.1F,    14|41600000
>   no suitable slots
>p_a_g: MOV     R13.y.1F,    17|41880000
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R10.z.1F,    9|41100000
>slot: 2
>literal reserve 1091567616  9
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R12.x.1F,    13|41500000
>slot 1 : MOV     R11.y.1F,    11|41300000
>slot 2 : MOV     R10.z.1F,    9|41100000
>p_a_g: MOV     R11.z.1F,    12|41400000
>   no suitable slots
>p_a_g: MOV     R12.z.1F,    15|41700000
>   no suitable slots
>p_a_g: MOV     R13.z.1F,    18|41900000
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 17  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R10.z.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R11.z.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R11.z.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 1341500000   1095761920
>literal emitted: 1141300000   1093664768
>literal emitted: 941100000   1091567616
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R11.z.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R13.x.1F,    16|41800000
>slot: 0
>literal reserve 1098907648  16
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R13.x.1F,    16|41800000
>p_a_g: MOV     R14.x.1F,    19|41980000
>   no suitable slots
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R12.y.1F,    14|41600000
>slot: 1
>literal reserve 1096810496  14
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R13.x.1F,    16|41800000
>slot 1 : MOV     R12.y.1F,    14|41600000
>p_a_g: MOV     R13.y.1F,    17|41880000
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R11.z.1F,    12|41400000
>slot: 2
>literal reserve 1094713344  12
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R13.x.1F,    16|41800000
>slot 1 : MOV     R12.y.1F,    14|41600000
>slot 2 : MOV     R11.z.1F,    12|41400000
>p_a_g: MOV     R12.z.1F,    15|41700000
>   no suitable slots
>p_a_g: MOV     R13.z.1F,    18|41900000
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 14  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R11.z.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R12.z.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R12.z.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 1641800000   1098907648
>literal emitted: 1441600000   1096810496
>literal emitted: 1241400000   1094713344
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R12.z.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R14.x.1F,    19|41980000
>slot: 0
>literal reserve 1100480512  19
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R14.x.1F,    19|41980000
>p_a_g: MOV     R15.x.1F,    22|41b00000
>   no suitable slots
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R13.y.1F,    17|41880000
>slot: 1
>literal reserve 1099431936  17
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R14.x.1F,    19|41980000
>slot 1 : MOV     R13.y.1F,    17|41880000
>p_a_g: MOV     R14.y.1F,    20|41a00000
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R12.z.1F,    15|41700000
>slot: 2
>literal reserve 1097859072  15
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R14.x.1F,    19|41980000
>slot 1 : MOV     R13.y.1F,    17|41880000
>slot 2 : MOV     R12.z.1F,    15|41700000
>p_a_g: MOV     R13.z.1F,    18|41900000
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 11  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R12.z.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R13.z.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R13.z.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 1941980000   1100480512
>literal emitted: 1741880000   1099431936
>literal emitted: 1541700000   1097859072
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R13.z.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R15.x.1F,    22|41b00000
>slot: 0
>literal reserve 1102053376  22
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R15.x.1F,    22|41b00000
>p_a_g: MOV     R16.x.1F,    25|41c80000
>   no suitable slots
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R14.y.1F,    20|41a00000
>slot: 1
>literal reserve 1101004800  20
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R15.x.1F,    22|41b00000
>slot 1 : MOV     R14.y.1F,    20|41a00000
>p_a_g: MOV     R15.y.1F,    23|41b80000
>   no suitable slots
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R13.z.1F,    18|41900000
>slot: 2
>literal reserve 1099956224  18
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R15.x.1F,    22|41b00000
>slot 1 : MOV     R14.y.1F,    20|41a00000
>slot 2 : MOV     R13.z.1F,    18|41900000
>p_a_g: MOV     R14.z.1F,    21|41a80000
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 8  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R13.z.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R14.z.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R14.z.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 2241b00000   1102053376
>literal emitted: 2041a00000   1101004800
>literal emitted: 1841900000   1099956224
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R14.z.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MOV     R16.x.1F,    25|41c80000
>slot: 0
>literal reserve 1103626240  25
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R16.x.1F,    25|41c80000
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>   no suitable slots
>p_a_g: MOV     R15.y.1F,    23|41b80000
>slot: 1
>literal reserve 1102577664  23
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R16.x.1F,    25|41c80000
>slot 1 : MOV     R15.y.1F,    23|41b80000
>p_a_g: MOV     R16.y.1F,    26|41d00000
>   no suitable slots
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R14.z.1F,    21|41a80000
>slot: 2
>literal reserve 1101529088  21
>  reserved new uc = 1
>current group:
>slot 0 : MOV     R16.x.1F,    25|41c80000
>slot 1 : MOV     R15.y.1F,    23|41b80000
>slot 2 : MOV     R14.z.1F,    21|41a80000
>p_a_g: MOV     R15.z.1F,    24|41c00000
>   no suitable slots
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 5  pending 2  conflicting 0
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1@R9.x R14.z.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R4.y.1@R9.x R15.z.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R15.z.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 2541c80000   1103626240
>literal emitted: 2341b80000   1102577664
>literal emitted: 2141a80000   1101529088
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R1.x.1||FP@R1.x R4.y.1@R9.x R15.z.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>slot: 0
>current group:
>slot 0 : MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>p_a_g: MOV     R16.y.1F,    26|41d00000
>slot: 1
>literal reserve 1104150528  26
>  reserved new uc = 1
>current group:
>slot 0 : MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>slot 1 : MOV     R16.y.1F,    26|41d00000
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>   no suitable slots
>p_a_g: MOV     R15.z.1F,    24|41c00000
>slot: 2
>literal reserve 1103101952  24
>  reserved new uc = 1
>current group:
>slot 0 : MUL     R4.y.1@R9.x,    C3.y, R1.x.1||FP@R1.x
>slot 1 : MOV     R16.y.1F,    26|41d00000
>slot 2 : MOV     R15.z.1F,    24|41c00000
>p_a_g: MOV     R16.z.1F,    27|41d80000
>   no suitable slots
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
> prepare_alu_group done, 3 slot(s) 
>$$$$$$$$PAG i1=1  ready 2  pending 2  conflicting 0
>recolor_local: R4.y.1@R9.x   interferences: [R1.x.1||FP@R1.x R1.y.1||FP@R1.y R4.x.1F@R124.y R4.y.1@R9.x R4.z.1F@R125.w R4.w.1F@R124.z R4.z.2F@R126.y R4.w.2F@R124.x R8.x.1F R8.y.1F R8.z.1F R9.x.1F R9.y.1F R9.z.1F R10.x.1F R10.y.1F R10.z.1F R11.x.1F R11.y.1F R11.z.1F R12.x.1F R12.y.1F R12.z.1F R13.x.1F R13.y.1F R13.z.1F R14.x.1F R14.y.1F R14.z.1F R15.x.1F R15.y.1F R15.z.1F R16.x.1F R16.y.1F R16.z.1F R24.y.1F@R124.z R24.z.1F@R124.w t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: R1.x.1||FP@R1.x
>	add_interferences: R4.w.2F@R124.x
>	add_interferences: R8.x.1F
>	add_interferences: R9.x.1F
>	add_interferences: R10.x.1F
>	add_interferences: R11.x.1F
>	add_interferences: R12.x.1F
>	add_interferences: R13.x.1F
>	add_interferences: R14.x.1F
>	add_interferences: R15.x.1F
>	add_interferences: R16.x.1F
>registers bits: 156
>  0   11111111
>  8   10000000
>  16   00000000
>  24   00000000
>  32   00000000
>  40   00000000
>  48   00000000
>  56   00000000
>  64   00000000
>  72   00000000
>  80   00000000
>  88   00000000
>  96   00000000
>  104   00000000
>  112   00000000
>  120   00001000
>  128   00000000
>  136   00000000
>  144   00000000
>  152   0000     recolored: R4.y.1@R125.x
>process_group: live_before : [R1.x.1||FP@R1.x R4.y.1F@R125.x R15.z.1F R16.y.1F R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [R1.x.1||FP@R1.x R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R1.x.1||FP@R1.x R16.z.1F t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>release_op (copy) MOV     R1.x.1||FP@R1.x,    t8||FP@R1.x
>literal emitted: 2641d00000   1104150528
>literal emitted: 2441c00000   1103101952
>   #### group emitted
>prepare_alu_group: starting...
>check_copy: (copy) MOV     R1.x.1||FP@R1.x,    t8||FP@R1.x
>    copy coalesced...
>update_local_interferences : [R16.z.1F t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>slot: 1
>current group:
>slot 1 : ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>p_a_g: MOV     R16.z.1F,    27|41d80000
>slot: 2
>literal reserve 1104674816  27
>  reserved new uc = 1
>current group:
>slot 1 : ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>slot 2 : MOV     R16.z.1F,    27|41d80000
>check_interferences: before: 
># REGMAP :
>  # 1.x => t8||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>    current_AR: R23.x.2@R0.y
>act::discard_current_group
>agt::discard_all_slots
>discard_slots : packed_ops : 0
>discarding slot 1 : ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>discarding slot 2 : MOV     R16.z.1F,    27|41d80000
>created AR load: MOVA_INT     __,    R23.x.2@R0.y
>update_local_interferences : [R16.z.1F t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
> prepare_alu_group done, 1 slot(s) 
>$$$$$$$$PAG i1=2  ready 0  pending 1  conflicting 2
>process_group: live_before : [R16.z.1F t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>clearing interferences for R23.x.2@R0.y
>process_group: live_after : [R16.z.1F R23.x.2@R0.y t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R16.z.1F R23.x.2@R0.y t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R16.z.1F R23.x.2@R0.y t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>slot: 1
>current group:
>slot 1 : ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>p_a_g: MOV     R16.z.1F,    27|41d80000
>slot: 2
>literal reserve 1104674816  27
>  reserved new uc = 1
>current group:
>slot 1 : ADD_INT     R23.x.2@R0.y,    C1.x, R23.x.1@R0.x
>slot 2 : MOV     R16.z.1F,    27|41d80000
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
> prepare_alu_group done, 2 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 1  conflicting 0
>recolor_local: R23.x.2@R0.y   interferences: [R16.z.1F R23.x.2@R0.y t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: t9||FP@R1.y
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R23.x.2@R124.y
>process_group: live_before : [R16.z.1F R23.x.2F@R124.y t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>clearing interferences for R23.x.1@R0.x
>process_group: live_after : [R23.x.1@R0.x t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [R23.x.1@R0.x t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>release_op MULLO_INT     R23.x.1@R0.x, __, __, __,       C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003
>literal emitted: 2741d80000   1104674816
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R23.x.1@R0.x t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>p_a_g: MULLO_INT     R23.x.1@R0.x, __, __, __,       C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003, C0.x, 4.2039e-45|00000003
>literal reserve 3  4.2039e-45
>  reserved new uc = 1
>literal reserve 3  4.2039e-45
>  reserved uc = 2
>literal reserve 3  4.2039e-45
>  reserved uc = 3
>literal reserve 3  4.2039e-45
>  reserved uc = 4
>current group:
>slot 0 : MULLO_INT     R23.x.1@R0.x,    C0.x, 4.2039e-45|00000003
>slot 1 : MULLO_INT     __,    C0.x, 4.2039e-45|00000003
>slot 2 : MULLO_INT     __,    C0.x, 4.2039e-45|00000003
>slot 3 : MULLO_INT     __,    C0.x, 4.2039e-45|00000003
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>recolor_local: R23.x.1@R0.x   interferences: [R23.x.1@R0.x t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>	add_interferences: t8||FP@R1.x
>registers bits: 33
>  0   01000000
>  8   00000000
>  16   00000000
>  24   00000000
>  32   0     recolored: R23.x.1@R124.x
>process_group: live_before : [R23.x.1F@R124.x t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>process_group: live_after : [t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>update_local_interferences : [t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>literal emitted: 4.2039e-4500000003   3
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [t8||FP@R1.x t9||FP@R1.y t10||FP@R1.z t11||FP@R1.w ]
>check_interferences: before: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
>check_interferences: after: 
># REGMAP :
>  # 1.x => R1.x.1||FP@R1.x
>  # 1.y => t9||FP@R1.y
>  # 1.z => t10||FP@R1.z
>  # 1.w => t11||FP@R1.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>post_sched_bb CALL_FS     t8||FP@R1.x, t9||FP@R1.y, t10||FP@R1.z, t11||FP@R1.w,       R0.xF@R0.x, R0.yF@R0.y, R0.zF@R0.z, R0.wF@R0.w
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: [R0.xF@R0.x R0.yF@R0.y ]
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w
>process_alu uc=2  INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w  pending
>process_alu uc=2  INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R2.x.1||FP@R0.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R2.y.1||FP@R0.y
>release_op INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R2.z.1||FP@R0.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R2.w.1||FP@R0.w
>release_op INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>    copy coalesced...
>update_local_interferences : [R2.z.1||FP@R0.z R2.w.1||FP@R0.w R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>p_a_g: INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>current group:
>slot 0 : INTERP_XY     R2.x.1||FP@R0.x,    R0.y||FP@R0.y, Param0x
>slot 1 : INTERP_XY     R2.y.1||FP@R0.y,    R0.x||FP@R0.x, Param0y
>slot 2 : INTERP_XY     __,    R0.y||FP@R0.y, Param0z
>slot 3 : INTERP_XY     __,    R0.x||FP@R0.x, Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R2.x.1||FP@R0.x
>  # 0.y => R2.y.1||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 1  pending 0  conflicting 0
>process_group: live_before : [R2.z.1||FP@R0.z R2.w.1||FP@R0.w R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>process_group: live_after : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>p_a_g: INTERP_ZW     __, __, R2.z.1||FP@R0.z, R2.w.1||FP@R0.w,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>current group:
>slot 0 : INTERP_ZW     __,    R0.y||FP@R0.y, Param0x
>slot 1 : INTERP_ZW     __,    R0.x||FP@R0.x, Param0y
>slot 2 : INTERP_ZW     R2.z.1||FP@R0.z,    R0.y||FP@R0.y, Param0z
>slot 3 : INTERP_ZW     R2.w.1||FP@R0.w,    R0.x||FP@R0.x, Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>  # 0.z => R2.z.1||FP@R0.z
>  # 0.w => R2.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R0.x||FP@R0.x R0.y||FP@R0.y R2.z.1||FP@R0.z R2.w.1||FP@R0.w ]
>process_group: live_after : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>check_interferences: before: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: []
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>process_alu uc=1  INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z  pending
>process_alu uc=1  INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R1.x.1||FP@R0.x
>release_op INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R1.y.1||FP@R0.y
>release_op INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R1.z.1||FP@R0.z
>release_op INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R1.w.1||FP@R0.w
>release_op INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>    copy coalesced...
>update_local_interferences : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>p_a_g: INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot: 0
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>p_a_g: INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot: 1
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>p_a_g: INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot: 2
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>p_a_g: INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
>slot: 3
>current group:
>slot 0 : INTERP_LOAD_P0     R1.x.1||FP@R0.x,    Param0x
>slot 1 : INTERP_LOAD_P0     R1.y.1||FP@R0.y,    Param0y
>slot 2 : INTERP_LOAD_P0     R1.z.1||FP@R0.z,    Param0z
>slot 3 : INTERP_LOAD_P0     R1.w.1||FP@R0.w,    Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R1.x.1||FP@R0.x
>  # 0.y => R1.y.1||FP@R0.y
>  # 0.z => R1.z.1||FP@R0.z
>  # 0.w => R1.w.1||FP@R0.w
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R1.x.1||FP@R0.x R1.y.1||FP@R0.y R1.z.1||FP@R0.z R1.w.1||FP@R0.w ]
>process_group: live_after : []
>update_local_interferences : []
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : []
>check_interferences: before: 
># REGMAP :
>check_interferences: after: 
># REGMAP :
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>scheduling BB 0
>post_sched_bb EXPORT  PIXEL 0     t1FP@R0.x, t2FP@R0.y, t3FP@R0.z, t4FP@R0.w
>post_sched_bb ALU     
>init_globals: [t1FP@R0.x t2FP@R0.y t3FP@R0.z t4FP@R0.w ]
>init_globals: [t7||FP@R0.x t8||FP@R0.y t9||FP@R0.z t10||FP@R0.w ]
>init_regmap: live: [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>init_regmap:  0.x <= t1||FP@R0.x
>init_regmap:  0.y <= t2||FP@R0.y
>init_regmap:  0.z <= t3||FP@R0.z
>init_regmap:  0.w <= t4||FP@R0.w
>update_local_interferences : [t1||FP@R0.x t2||FP@R0.y t3||FP@R0.z t4||FP@R0.w ]
>process_alu uc=0  (copy) MOV     t1||FP@R0.x,    R3.x.1||FP@R0.x  release_op (copy) MOV     t1||FP@R0.x,    R3.x.1||FP@R0.x
>process_alu uc=1  (copy) MOV     R3.x.1||FP@R0.x,    t7||FP@R0.x  pending
>process_alu uc=0  (copy) MOV     t2||FP@R0.y,    R3.y.1||FP@R0.y  release_op (copy) MOV     t2||FP@R0.y,    R3.y.1||FP@R0.y
>process_alu uc=1  (copy) MOV     R3.y.1||FP@R0.y,    t8||FP@R0.y  pending
>process_alu uc=0  (copy) MOV     t3||FP@R0.z,    R3.z.1||FP@R0.z  release_op (copy) MOV     t3||FP@R0.z,    R3.z.1||FP@R0.z
>process_alu uc=1  (copy) MOV     R3.z.1||FP@R0.z,    t9||FP@R0.z  pending
>process_alu uc=0  (copy) MOV     t4||FP@R0.w,    R3.w.1||FP@R0.w  release_op (copy) MOV     t4||FP@R0.w,    R3.w.1||FP@R0.w
>process_alu uc=1  (copy) MOV     R3.w.1||FP@R0.w,    t10||FP@R0.w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t1||FP@R0.x,    R3.x.1||FP@R0.x
>release_op (copy) MOV     R3.x.1||FP@R0.x,    t7||FP@R0.x
>    copy coalesced...
>check_copy: (copy) MOV     t2||FP@R0.y,    R3.y.1||FP@R0.y
>release_op (copy) MOV     R3.y.1||FP@R0.y,    t8||FP@R0.y
>    copy coalesced...
>check_copy: (copy) MOV     t3||FP@R0.z,    R3.z.1||FP@R0.z
>release_op (copy) MOV     R3.z.1||FP@R0.z,    t9||FP@R0.z
>    copy coalesced...
>check_copy: (copy) MOV     t4||FP@R0.w,    R3.w.1||FP@R0.w
>release_op (copy) MOV     R3.w.1||FP@R0.w,    t10||FP@R0.w
>    copy coalesced...
>check_copy: (copy) MOV     R3.x.1||FP@R0.x,    t7||FP@R0.x
>    copy coalesced...
>check_copy: (copy) MOV     R3.y.1||FP@R0.y,    t8||FP@R0.y
>    copy coalesced...
>check_copy: (copy) MOV     R3.z.1||FP@R0.z,    t9||FP@R0.z
>    copy coalesced...
>check_copy: (copy) MOV     R3.w.1||FP@R0.w,    t10||FP@R0.w
>    copy coalesced...
>update_local_interferences : [t7||FP@R0.x t8||FP@R0.y t9||FP@R0.z t10||FP@R0.w ]
>check_interferences: before: 
># REGMAP :
>  # 0.x => t7||FP@R0.x
>  # 0.y => t8||FP@R0.y
>  # 0.z => t9||FP@R0.z
>  # 0.w => t10||FP@R0.w
>check_interferences: after: 
># REGMAP :
>  # 0.x => t7||FP@R0.x
>  # 0.y => t8||FP@R0.y
>  # 0.z => t9||FP@R0.z
>  # 0.w => t10||FP@R0.w
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>post_sched_bb TEX     
>post_sched_bb ALU     
>init_globals: [t5FP@R0.x t6FP@R0.y ]
>init_globals: [R0.xF@R0.x R0.yF@R0.y ]
>init_regmap: live: [t5||FP@R0.x t6||FP@R0.y ]
>init_regmap:  0.x <= t5||FP@R0.x
>init_regmap:  0.y <= t6||FP@R0.y
>update_local_interferences : [t5||FP@R0.x t6||FP@R0.y ]
>process_alu uc=0  (copy) MOV     t5||FP@R0.x,    R2.x.1||FP@R0.x  release_op (copy) MOV     t5||FP@R0.x,    R2.x.1||FP@R0.x
>process_alu uc=0  (copy) MOV     t6||FP@R0.y,    R2.y.1||FP@R0.y  release_op (copy) MOV     t6||FP@R0.y,    R2.y.1||FP@R0.y
>process_alu uc=2  INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w  pending
>prepare_alu_group: starting...
>check_copy: (copy) MOV     t5||FP@R0.x,    R2.x.1||FP@R0.x
>    copy coalesced...
>check_copy: (copy) MOV     t6||FP@R0.y,    R2.y.1||FP@R0.y
>release_op INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>    copy coalesced...
>update_local_interferences : [R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>p_a_g: INTERP_XY     R2.x.1||FP@R0.x, R2.y.1||FP@R0.y, __, __,       R0.y||FP@R0.y, Param0x, R0.x||FP@R0.x, Param0y, R0.y||FP@R0.y, Param0z, R0.x||FP@R0.x, Param0w
>current group:
>slot 0 : INTERP_XY     R2.x.1||FP@R0.x,    R0.y||FP@R0.y, Param0x
>slot 1 : INTERP_XY     R2.y.1||FP@R0.y,    R0.x||FP@R0.x, Param0y
>slot 2 : INTERP_XY     __,    R0.y||FP@R0.y, Param0z
>slot 3 : INTERP_XY     __,    R0.x||FP@R0.x, Param0w
> all slots used
>check_interferences: before: 
># REGMAP :
>  # 0.x => R2.x.1||FP@R0.x
>  # 0.y => R2.y.1||FP@R0.y
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 4 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>process_group: live_before : [R2.x.1||FP@R0.x R2.y.1||FP@R0.y ]
>process_group: live_after : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>   #### group emitted
>prepare_alu_group: starting...
>update_local_interferences : [R0.x||FP@R0.x R0.y||FP@R0.y ]
>check_interferences: before: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
>check_interferences: after: 
># REGMAP :
>  # 0.x => R0.x||FP@R0.x
>  # 0.y => R0.y||FP@R0.y
> prepare_alu_group done, 0 slot(s) 
>$$$$$$$$PAG i1=1  ready 0  pending 0  conflicting 0
>######### ALU clause emitted
>Probe color at (10,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (25,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (40,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (65,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (80,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (95,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (120,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (135,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>Probe color at (150,10)
>  Expected: 0.000000 1.000000 0.000000
>  Observed: 0.501961 0.501961 0.501961
>PIGLIT: {'result': 'fail' }

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Attachments on bug 71944: 89688 | 89689 | 89694 | 89964

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