Attachment 89983 Details for Bug 71980 – fix pm init ordering

[patch] fix pm init ordering

0001-drm-i915-fix-pm-init-ordering.patch (text/plain), 4.16 KB, created by Daniel Vetter on 2013-11-29 08:32:27 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Daniel Vetter

Created: 2013-11-29 08:32:27 UTC

Size: 4.16 KB

patch

obsolete

>From 6d07f54ac0cd5b49351243945670c50424813418 Mon Sep 17 00:00:00 2001
>From: Daniel Vetter <daniel.vetter@ffwll.ch>
>Date: Fri, 29 Nov 2013 09:32:14 +0100
>Subject: [PATCH] drm/i915: fix pm init ordering
>
>Shovel a bit more of the the code into the setup function, and call
>it earlier. Otherwise lockdep is unhappy since we cancel the delayed
>resume work before it's initialized.
>
>While at it also shovel the pc8 setup code into the same functions.
>I wanted to also ditch the header declaration of the hws pc8 functions,
>but for unfathomable reasons that stuff is in intel_display.c instead
>of intel_pm.c.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71980
>Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>---
> drivers/gpu/drm/i915/i915_dma.c  | 10 +---------
> drivers/gpu/drm/i915/i915_drv.h  |  2 --
> drivers/gpu/drm/i915/intel_drv.h |  1 +
> drivers/gpu/drm/i915/intel_pm.c  | 11 ++++++++++-
> 4 files changed, 12 insertions(+), 12 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
>index 0cab2d045135..adec2e41aa6e 100644
>--- a/drivers/gpu/drm/i915/i915_dma.c
>+++ b/drivers/gpu/drm/i915/i915_dma.c
>@@ -1490,16 +1490,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
> 	spin_lock_init(&dev_priv->uncore.lock);
> 	spin_lock_init(&dev_priv->mm.object_stat_lock);
> 	mutex_init(&dev_priv->dpio_lock);
>-	mutex_init(&dev_priv->rps.hw_lock);
> 	mutex_init(&dev_priv->modeset_restore_lock);
> 
>-	mutex_init(&dev_priv->pc8.lock);
>-	dev_priv->pc8.requirements_met = false;
>-	dev_priv->pc8.gpu_idle = false;
>-	dev_priv->pc8.irqs_disabled = false;
>-	dev_priv->pc8.enabled = false;
>-	dev_priv->pc8.disable_count = 2; /* requirements_met + gpu_idle */
>-	INIT_DELAYED_WORK(&dev_priv->pc8.enable_work, hsw_enable_pc8_work);
>+	intel_pm_setup(dev);
> 
> 	intel_display_crc_init(dev);
> 
>@@ -1603,7 +1596,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
> 	}
> 
> 	intel_irq_init(dev);
>-	intel_pm_init(dev);
> 	intel_uncore_sanitize(dev);
> 
> 	/* Try to make sure MCHBAR is enabled before poking at it */
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index ccdbecca070d..6f04fa4b31fd 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -1901,9 +1901,7 @@ void i915_queue_hangcheck(struct drm_device *dev);
> void i915_handle_error(struct drm_device *dev, bool wedged);
> 
> extern void intel_irq_init(struct drm_device *dev);
>-extern void intel_pm_init(struct drm_device *dev);
> extern void intel_hpd_init(struct drm_device *dev);
>-extern void intel_pm_init(struct drm_device *dev);
> 
> extern void intel_uncore_sanitize(struct drm_device *dev);
> extern void intel_uncore_early_sanitize(struct drm_device *dev);
>diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>index a18e88b3e425..79f91f26e288 100644
>--- a/drivers/gpu/drm/i915/intel_drv.h
>+++ b/drivers/gpu/drm/i915/intel_drv.h
>@@ -821,6 +821,7 @@ void intel_update_sprite_watermarks(struct drm_plane *plane,
> 				    uint32_t sprite_width, int pixel_size,
> 				    bool enabled, bool scaled);
> void intel_init_pm(struct drm_device *dev);
>+void intel_pm_setup(struct drm_device *dev);
> bool intel_fbc_enabled(struct drm_device *dev);
> void intel_update_fbc(struct drm_device *dev);
> void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 6e0d5e075b15..e0dec95c764e 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -6130,10 +6130,19 @@ int vlv_freq_opcode(int ddr_freq, int val)
> 	return val;
> }
> 
>-void intel_pm_init(struct drm_device *dev)
>+void intel_pm_setup(struct drm_device *dev)
> {
> 	struct drm_i915_private *dev_priv = dev->dev_private;
> 
>+	mutex_init(&dev_priv->rps.hw_lock);
>+
>+	mutex_init(&dev_priv->pc8.lock);
>+	dev_priv->pc8.requirements_met = false;
>+	dev_priv->pc8.gpu_idle = false;
>+	dev_priv->pc8.irqs_disabled = false;
>+	dev_priv->pc8.enabled = false;
>+	dev_priv->pc8.disable_count = 2; /* requirements_met + gpu_idle */
>+	INIT_DELAYED_WORK(&dev_priv->pc8.enable_work, hsw_enable_pc8_work);
> 	INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
> 			  intel_gen6_powersave_work);
> }
>-- 
>1.8.4.3
>

Actions: View | Splinter Review

Attachments on bug 71980: 89734 | 89982 | 89983

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.