Attachment 90633 Details for Bug 63900 – possible fix

[patch] possible fix

0001-drm-radeon-dce-use-surface-offsets-rather-than-viewp.patch (text/plain), 4.20 KB, created by Alex Deucher on 2013-12-12 02:15:51 UTC

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Creator: Alex Deucher

Created: 2013-12-12 02:15:51 UTC

Size: 4.20 KB

patch

obsolete

>From e13250828404fec3b98533c2db52a34b4e15d453 Mon Sep 17 00:00:00 2001
>From: Alex Deucher <alexander.deucher@amd.com>
>Date: Wed, 11 Dec 2013 21:12:54 -0500
>Subject: [PATCH] drm/radeon/dce: use surface offsets rather than viewport
>
>Use surface offsets rather than viewport for pixel exact
>offsets.  The viewport has to be a multiple of 4 pixels for
>x and 2 pixels for y.  Using the pixel offsets allows for
>pixel exact offsets.
>
>bug:
>https://bugs.freedesktop.org/show_bug.cgi?id=63900
>
>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>Cc: stable@vger.kernel.org
>---
> drivers/gpu/drm/radeon/atombios_crtc.c | 32 ++++++++++++++------------------
> 1 file changed, 14 insertions(+), 18 deletions(-)
>
>diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
>index b197059..034820d 100644
>--- a/drivers/gpu/drm/radeon/atombios_crtc.c
>+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
>@@ -1235,12 +1235,12 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
> 	WREG32(EVERGREEN_GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format);
> 	WREG32(EVERGREEN_GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap);
> 
>-	WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0);
>-	WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);
>-	WREG32(EVERGREEN_GRPH_X_START + radeon_crtc->crtc_offset, 0);
>-	WREG32(EVERGREEN_GRPH_Y_START + radeon_crtc->crtc_offset, 0);
>-	WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
>-	WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
>+	WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, x & ~255);
>+	WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, y & ~1);
>+	WREG32(EVERGREEN_GRPH_X_START + radeon_crtc->crtc_offset, x);
>+	WREG32(EVERGREEN_GRPH_Y_START + radeon_crtc->crtc_offset, y);
>+	WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, x + target_fb->width);
>+	WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, y + target_fb->height);
> 
> 	fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8);
> 	WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
>@@ -1252,10 +1252,8 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
> 	else
> 		WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,
> 		       target_fb->height);
>-	x &= ~3;
>-	y &= ~1;
> 	WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset,
>-	       (x << 16) | y);
>+	       (0 << 16) | 0);
> 	viewport_w = crtc->mode.hdisplay;
> 	viewport_h = (crtc->mode.vdisplay + 1) & ~1;
> 	WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
>@@ -1408,12 +1406,12 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
> 	if (rdev->family >= CHIP_R600)
> 		WREG32(R600_D1GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap);
> 
>-	WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0);
>-	WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);
>-	WREG32(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0);
>-	WREG32(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, 0);
>-	WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
>-	WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
>+	WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, x & ~255);
>+	WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, y & ~1);
>+	WREG32(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, x);
>+	WREG32(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, y);
>+	WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, x + target_fb->width);
>+	WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, y + target_fb->height);
> 
> 	fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8);
> 	WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
>@@ -1421,10 +1419,8 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
> 
> 	WREG32(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,
> 	       target_fb->height);
>-	x &= ~3;
>-	y &= ~1;
> 	WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset,
>-	       (x << 16) | y);
>+	       (0 << 16) | 0);
> 	viewport_w = crtc->mode.hdisplay;
> 	viewport_h = (crtc->mode.vdisplay + 1) & ~1;
> 	WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
>-- 
>1.8.3.1
>

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Attachments on bug 63900: 90633 | 90665

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