Attachment 95715 Details for Bug 76103 – dmesg from X startup

dmesg from X startup

a (text/plain), 48.20 KB, created by Krzysztof Mazur on 2014-03-13 11:53:45 UTC

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Creator: Krzysztof Mazur

Created: 2014-03-13 11:53:45 UTC

Size: 48.20 KB

patch

obsolete

>[   18.917652] [drm:i915_gem_open], 
>[   18.917733] [drm:intel_crtc_cursor_set], cursor off
>[   18.917740] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   18.917749] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   18.917757] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   18.917763] [drm:intel_crtc_cursor_set], cursor off
>[   18.917771] [drm:intel_crtc_set_config], [CRTC:4] [FB:29] #connectors=1 (x y) (0 0)
>[   18.917778] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0
>[   18.917785] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.765944] [drm:intel_crtc_set_config], [CRTC:4] [FB:29] #connectors=1 (x y) (0 0)
>[   19.765951] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0
>[   19.765957] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.777748] [drm:i915_gem_open], 
>[   19.777772] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3]
>[   19.797704] [drm:intel_crtc_cursor_set], cursor off
>[   19.797707] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   19.797711] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   19.797714] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.797716] [drm:intel_crtc_cursor_set], cursor off
>[   19.797720] [drm:intel_crtc_set_config], [CRTC:4] [FB:29] #connectors=1 (x y) (0 0)
>[   19.797723] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0
>[   19.797726] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.797877] [drm:i915_gem_open], 
>[   19.797894] [drm:intel_crtc_cursor_set], cursor off
>[   19.797896] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   19.797899] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   19.797903] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.797905] [drm:intel_crtc_cursor_set], cursor off
>[   19.797908] [drm:intel_crtc_set_config], [CRTC:4] [FB:29] #connectors=1 (x y) (0 0)
>[   19.797911] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0
>[   19.797914] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   19.797923] [drm:i915_gem_open], 
>[   19.798345] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3]
>[   19.798351] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3]
>[   19.798421] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   19.798425] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[   19.798428] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1]
>[   19.798442] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[   19.798447] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[   19.798451] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   19.839871] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[   19.839882] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[   19.839889] [drm:intel_crt_detect], [CONNECTOR:11:VGA-1] force=1
>[   19.843035] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   19.843042] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.843047] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   19.843054] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   19.843339] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.843345] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   19.843350] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   19.843358] [drm:intel_get_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   19.843364] [drm:intel_get_load_detect_pipe], reusing fbdev for load-detection framebuffer
>[   19.843372] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   19.843381] [drm:connected_sink_compute_bpp], [CONNECTOR:11:VGA-1] checking for sink bpp constrains
>[   19.843391] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   19.843398] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   19.843402] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   19.843407] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   19.843415] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.843422] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.843426] [drm:intel_dump_pipe_config], requested mode:
>[   19.843435] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   19.843440] [drm:intel_dump_pipe_config], adjusted mode:
>[   19.843448] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   19.843457] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 664 704 832 480 489 491 520, type: 0x10 flags: 0xa
>[   19.843461] [drm:intel_dump_pipe_config], port clock: 31500
>[   19.843466] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[   19.843472] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   19.843479] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   19.843483] [drm:intel_dump_pipe_config], ips: 0
>[   19.843488] [drm:intel_dump_pipe_config], double wide: 0
>[   19.843908] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096
>[   19.843918] [drm:intel_crtc_mode_set], [ENCODER:12:DAC-12] set [MODE:0:640x480]
>[   19.844571] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   19.844577] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   19.844581] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   19.844587] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   19.844592] [drm:intel_calculate_wm], FIFO entries required for mode: 10
>[   19.844596] [drm:intel_calculate_wm], FIFO watermark level: 19
>[   19.844601] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 19
>[   19.844607] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 19, C: 2, SR 1
>[   19.844612] [drm:i9xx_update_wm], memory self refresh disabled
>[   19.860034] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   19.860043] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   19.860050] [drm:intel_connector_check_state], [CONNECTOR:11:VGA-1]
>[   19.860056] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   19.860062] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   19.860068] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   19.860074] [drm:check_crtc_state], [CRTC:3]
>[   19.860088] [drm:check_crtc_state], [CRTC:4]
>[   19.875032] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   19.875039] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.875044] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   19.875050] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   19.875334] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.875339] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   19.875344] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   19.875349] [drm:intel_crt_load_detect], starting load-detect on CRT
>[   19.887025] [drm:intel_release_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   19.887029] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   19.919029] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   19.919031] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   19.919033] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   19.919036] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   19.919039] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   19.919041] [drm:i9xx_update_wm], self-refresh entries: 64
>[   19.919044] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   19.919046] [drm:i9xx_update_wm], memory self refresh enabled
>[   19.919048] [drm:intel_update_fbc], disabled per chip default
>[   19.919054] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   19.919058] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   19.919061] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   19.919064] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   19.919066] [drm:check_crtc_state], [CRTC:3]
>[   19.919069] [drm:check_crtc_state], [CRTC:4]
>[   19.919077] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[   19.919086] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[   19.919089] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[   19.919092] [drm:intel_crt_detect], [CONNECTOR:11:VGA-1] force=1
>[   19.922026] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   19.922029] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.922032] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   19.922035] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   19.922310] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.922314] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   19.922317] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   19.922321] [drm:intel_get_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   19.922324] [drm:intel_get_load_detect_pipe], reusing fbdev for load-detection framebuffer
>[   19.922328] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   19.922333] [drm:connected_sink_compute_bpp], [CONNECTOR:11:VGA-1] checking for sink bpp constrains
>[   19.922338] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   19.922341] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   19.922344] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   19.922347] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   19.922351] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.922355] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.922357] [drm:intel_dump_pipe_config], requested mode:
>[   19.922363] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   19.922366] [drm:intel_dump_pipe_config], adjusted mode:
>[   19.922371] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   19.922376] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 664 704 832 480 489 491 520, type: 0x10 flags: 0xa
>[   19.922379] [drm:intel_dump_pipe_config], port clock: 31500
>[   19.922382] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[   19.922385] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   19.922389] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   19.922392] [drm:intel_dump_pipe_config], ips: 0
>[   19.922394] [drm:intel_dump_pipe_config], double wide: 0
>[   19.922642] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096
>[   19.922648] [drm:intel_crtc_mode_set], [ENCODER:12:DAC-12] set [MODE:0:640x480]
>[   19.923294] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   19.923297] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   19.923300] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   19.923303] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   19.923306] [drm:intel_calculate_wm], FIFO entries required for mode: 10
>[   19.923309] [drm:intel_calculate_wm], FIFO watermark level: 19
>[   19.923312] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 19
>[   19.923316] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 19, C: 2, SR 1
>[   19.923318] [drm:i9xx_update_wm], memory self refresh disabled
>[   19.939032] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   19.939040] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   19.939047] [drm:intel_connector_check_state], [CONNECTOR:11:VGA-1]
>[   19.939053] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   19.939059] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   19.939065] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   19.939070] [drm:check_crtc_state], [CRTC:3]
>[   19.939081] [drm:check_crtc_state], [CRTC:4]
>[   19.954042] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   19.954048] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.954053] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   19.954059] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   19.954342] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   19.954348] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   19.954352] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   19.954357] [drm:intel_crt_load_detect], starting load-detect on CRT
>[   19.966035] [drm:intel_release_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   19.966042] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   19.999183] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   19.999185] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   19.999188] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   19.999190] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   19.999193] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   19.999195] [drm:i9xx_update_wm], self-refresh entries: 64
>[   19.999197] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   19.999200] [drm:i9xx_update_wm], memory self refresh enabled
>[   19.999202] [drm:intel_update_fbc], disabled per chip default
>[   19.999207] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   19.999210] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   19.999213] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   19.999216] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   19.999218] [drm:check_crtc_state], [CRTC:3]
>[   19.999221] [drm:check_crtc_state], [CRTC:4]
>[   19.999229] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[   19.999296] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[   19.999300] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1]
>[   19.999303] [drm:intel_tv_detect], [CONNECTOR:13:SVIDEO-1] force=1
>[   19.999307] [drm:intel_get_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   19.999309] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   19.999326] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   19.999329] [drm:connected_sink_compute_bpp], [CONNECTOR:13:SVIDEO-1] checking for sink bpp constrains
>[   19.999332] [drm:intel_tv_compute_config], forcing bpc to 8 for TV
>[   19.999335] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   19.999338] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   19.999340] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   19.999342] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   19.999346] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.999349] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   19.999351] [drm:intel_dump_pipe_config], requested mode:
>[   19.999355] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   19.999357] [drm:intel_dump_pipe_config], adjusted mode:
>[   19.999361] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   19.999365] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0
>[   19.999367] [drm:intel_dump_pipe_config], port clock: 108000
>[   19.999370] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[   19.999372] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   19.999375] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   19.999377] [drm:intel_dump_pipe_config], ips: 0
>[   19.999379] [drm:intel_dump_pipe_config], double wide: 0
>[   20.007102] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   20.007114] [drm:intel_crtc_mode_set], [ENCODER:14:TV-14] set [MODE:0:NTSC 480i]
>[   20.012800] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.012803] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.012805] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.012808] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.012810] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   20.012812] [drm:intel_calculate_wm], FIFO watermark level: -5
>[   20.012814] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 1
>[   20.012817] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 1, C: 2, SR 1
>[   20.012820] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.044066] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.044078] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.044086] [drm:intel_connector_check_state], [CONNECTOR:13:SVIDEO-1]
>[   20.044092] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.044098] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.044104] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.044110] [drm:check_crtc_state], [CRTC:3]
>[   20.044124] [drm:check_crtc_state], [CRTC:4]
>[   20.082071] [drm:intel_tv_detect_type], TV detected: c0c07, 7f0000aa
>[   20.082077] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   20.112073] [drm:intel_release_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.112081] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.157084] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.157088] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.157091] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.157095] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.157099] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.157103] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.157107] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.157111] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.157114] [drm:intel_update_fbc], disabled per chip default
>[   20.157122] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.157128] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.157132] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.157136] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.157140] [drm:check_crtc_state], [CRTC:3]
>[   20.157144] [drm:check_crtc_state], [CRTC:4]
>[   20.157282] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1] disconnected
>[   20.158029] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[   20.158035] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1]
>[   20.158040] [drm:intel_tv_detect], [CONNECTOR:13:SVIDEO-1] force=1
>[   20.158046] [drm:intel_get_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.158050] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   20.158069] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   20.158075] [drm:connected_sink_compute_bpp], [CONNECTOR:13:SVIDEO-1] checking for sink bpp constrains
>[   20.158080] [drm:intel_tv_compute_config], forcing bpc to 8 for TV
>[   20.158088] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   20.158092] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   20.158096] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   20.158100] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   20.158105] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.158110] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.158114] [drm:intel_dump_pipe_config], requested mode:
>[   20.158121] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.158124] [drm:intel_dump_pipe_config], adjusted mode:
>[   20.158131] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.158137] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0
>[   20.158141] [drm:intel_dump_pipe_config], port clock: 108000
>[   20.158145] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[   20.158149] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   20.158154] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   20.158157] [drm:intel_dump_pipe_config], ips: 0
>[   20.158161] [drm:intel_dump_pipe_config], double wide: 0
>[   20.166236] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   20.166248] [drm:intel_crtc_mode_set], [ENCODER:14:TV-14] set [MODE:0:NTSC 480i]
>[   20.171933] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.171936] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.171938] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.171941] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.171943] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   20.171946] [drm:intel_calculate_wm], FIFO watermark level: -5
>[   20.171948] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 1
>[   20.171951] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 1, C: 2, SR 1
>[   20.171953] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.203072] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.203083] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.203091] [drm:intel_connector_check_state], [CONNECTOR:13:SVIDEO-1]
>[   20.203098] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.203104] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.203109] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.203115] [drm:check_crtc_state], [CRTC:3]
>[   20.203128] [drm:check_crtc_state], [CRTC:4]
>[   20.241066] [drm:intel_tv_detect_type], TV detected: c0c07, 7f0000aa
>[   20.241072] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   20.271068] [drm:intel_release_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.271076] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.319605] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.319609] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.319613] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.319617] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.319621] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.319624] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.319629] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.319632] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.319636] [drm:intel_update_fbc], disabled per chip default
>[   20.319644] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.319649] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.319653] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.319657] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.319661] [drm:check_crtc_state], [CRTC:3]
>[   20.319665] [drm:check_crtc_state], [CRTC:4]
>[   20.319804] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1] disconnected
>[   20.320689] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   20.320694] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1]
>[   20.320699] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1]
>[   20.320717] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes :
>[   20.320725] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[   20.320731] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   20.322225] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[   20.322232] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[   20.322237] [drm:intel_crt_detect], [CONNECTOR:11:VGA-1] force=1
>[   20.326059] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   20.326062] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.326065] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   20.326068] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   20.326338] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.326341] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   20.326344] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   20.326348] [drm:intel_get_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   20.326350] [drm:intel_get_load_detect_pipe], reusing fbdev for load-detection framebuffer
>[   20.326353] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   20.326358] [drm:connected_sink_compute_bpp], [CONNECTOR:11:VGA-1] checking for sink bpp constrains
>[   20.326364] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   20.326367] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   20.326369] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   20.326372] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   20.326375] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.326378] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.326381] [drm:intel_dump_pipe_config], requested mode:
>[   20.326385] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   20.326387] [drm:intel_dump_pipe_config], adjusted mode:
>[   20.326391] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   20.326395] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 664 704 832 480 489 491 520, type: 0x10 flags: 0xa
>[   20.326397] [drm:intel_dump_pipe_config], port clock: 31500
>[   20.326399] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[   20.326402] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   20.326405] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   20.326407] [drm:intel_dump_pipe_config], ips: 0
>[   20.326409] [drm:intel_dump_pipe_config], double wide: 0
>[   20.326605] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096
>[   20.326609] [drm:intel_crtc_mode_set], [ENCODER:12:DAC-12] set [MODE:0:640x480]
>[   20.327310] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.327313] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.327315] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.327317] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.327320] [drm:intel_calculate_wm], FIFO entries required for mode: 10
>[   20.327322] [drm:intel_calculate_wm], FIFO watermark level: 19
>[   20.327324] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 19
>[   20.327326] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 19, C: 2, SR 1
>[   20.327329] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.343071] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.343079] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.343086] [drm:intel_connector_check_state], [CONNECTOR:11:VGA-1]
>[   20.343092] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.343098] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.343104] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.343109] [drm:check_crtc_state], [CRTC:3]
>[   20.343120] [drm:check_crtc_state], [CRTC:4]
>[   20.358065] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   20.358071] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.358076] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   20.358081] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   20.358365] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.358370] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   20.358375] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   20.358380] [drm:intel_crt_load_detect], starting load-detect on CRT
>[   20.370069] [drm:intel_release_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   20.370076] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.402063] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.402065] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.402067] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.402070] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.402072] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.402075] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.402077] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.402079] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.402082] [drm:intel_update_fbc], disabled per chip default
>[   20.402086] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.402090] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.402093] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.402096] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.402098] [drm:check_crtc_state], [CRTC:3]
>[   20.402100] [drm:check_crtc_state], [CRTC:4]
>[   20.402108] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[   20.402112] [drm:drm_mode_getconnector], [CONNECTOR:11:?]
>[   20.402115] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1]
>[   20.402117] [drm:intel_crt_detect], [CONNECTOR:11:VGA-1] force=1
>[   20.405063] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   20.405067] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.405071] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   20.405075] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   20.405353] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.405357] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   20.405361] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   20.405366] [drm:intel_get_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   20.405370] [drm:intel_get_load_detect_pipe], reusing fbdev for load-detection framebuffer
>[   20.405375] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   20.405381] [drm:connected_sink_compute_bpp], [CONNECTOR:11:VGA-1] checking for sink bpp constrains
>[   20.405386] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   20.405390] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   20.405394] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   20.405397] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   20.405403] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.405408] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.405411] [drm:intel_dump_pipe_config], requested mode:
>[   20.405418] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   20.405421] [drm:intel_dump_pipe_config], adjusted mode:
>[   20.405428] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 0 31500 640 664 704 832 480 489 491 520 0x10 0xa
>[   20.405434] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 664 704 832 480 489 491 520, type: 0x10 flags: 0xa
>[   20.405438] [drm:intel_dump_pipe_config], port clock: 31500
>[   20.405441] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[   20.405446] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   20.405450] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   20.405454] [drm:intel_dump_pipe_config], ips: 0
>[   20.405457] [drm:intel_dump_pipe_config], double wide: 0
>[   20.405764] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096
>[   20.405770] [drm:intel_crtc_mode_set], [ENCODER:12:DAC-12] set [MODE:0:640x480]
>[   20.406418] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.406422] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.406425] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.406430] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.406433] [drm:intel_calculate_wm], FIFO entries required for mode: 10
>[   20.406436] [drm:intel_calculate_wm], FIFO watermark level: 19
>[   20.406440] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 19
>[   20.406444] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 19, C: 2, SR 1
>[   20.406448] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.422067] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.422075] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.422081] [drm:intel_connector_check_state], [CONNECTOR:11:VGA-1]
>[   20.422088] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.422093] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.422099] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.422104] [drm:check_crtc_state], [CRTC:3]
>[   20.422115] [drm:check_crtc_state], [CRTC:4]
>[   20.437063] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   20.437069] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.437074] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   20.437079] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   20.437362] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   20.437368] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   20.437373] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   20.437377] [drm:intel_crt_load_detect], starting load-detect on CRT
>[   20.449068] [drm:intel_release_load_detect_pipe], [CONNECTOR:11:VGA-1], [ENCODER:12:DAC-12]
>[   20.449075] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.482184] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.482186] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.482188] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.482191] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.482193] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.482195] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.482198] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.482200] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.482202] [drm:intel_update_fbc], disabled per chip default
>[   20.482207] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.482210] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.482213] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.482216] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.482218] [drm:check_crtc_state], [CRTC:3]
>[   20.482221] [drm:check_crtc_state], [CRTC:4]
>[   20.482229] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:VGA-1] disconnected
>[   20.482265] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[   20.482268] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1]
>[   20.482271] [drm:intel_tv_detect], [CONNECTOR:13:SVIDEO-1] force=1
>[   20.482274] [drm:intel_get_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.482277] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   20.482290] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   20.482293] [drm:connected_sink_compute_bpp], [CONNECTOR:13:SVIDEO-1] checking for sink bpp constrains
>[   20.482296] [drm:intel_tv_compute_config], forcing bpc to 8 for TV
>[   20.482299] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   20.482302] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   20.482304] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   20.482306] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   20.482309] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.482312] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.482314] [drm:intel_dump_pipe_config], requested mode:
>[   20.482319] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.482321] [drm:intel_dump_pipe_config], adjusted mode:
>[   20.482325] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.482329] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0
>[   20.482331] [drm:intel_dump_pipe_config], port clock: 108000
>[   20.482333] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[   20.482336] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   20.482339] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   20.482341] [drm:intel_dump_pipe_config], ips: 0
>[   20.482343] [drm:intel_dump_pipe_config], double wide: 0
>[   20.489761] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   20.489772] [drm:intel_crtc_mode_set], [ENCODER:14:TV-14] set [MODE:0:NTSC 480i]
>[   20.495458] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.495460] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.495462] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.495465] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.495467] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   20.495470] [drm:intel_calculate_wm], FIFO watermark level: -5
>[   20.495472] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 1
>[   20.495475] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 1, C: 2, SR 1
>[   20.495477] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.513066] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.513077] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.513085] [drm:intel_connector_check_state], [CONNECTOR:13:SVIDEO-1]
>[   20.513091] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.513097] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.513103] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.513108] [drm:check_crtc_state], [CRTC:3]
>[   20.513122] [drm:check_crtc_state], [CRTC:4]
>[   20.563068] [drm:intel_tv_detect_type], TV detected: c0c07, 7f0000aa
>[   20.563074] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   20.593070] [drm:intel_release_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.593078] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.641602] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.641606] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.641609] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.641613] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.641617] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.641621] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.641625] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.641628] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.641632] [drm:intel_update_fbc], disabled per chip default
>[   20.641640] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.641645] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.641650] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.641654] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.641658] [drm:check_crtc_state], [CRTC:3]
>[   20.641662] [drm:check_crtc_state], [CRTC:4]
>[   20.641803] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1] disconnected
>[   20.642547] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[   20.642552] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1]
>[   20.642557] [drm:intel_tv_detect], [CONNECTOR:13:SVIDEO-1] force=1
>[   20.642563] [drm:intel_get_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.642566] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   20.642586] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   20.642592] [drm:connected_sink_compute_bpp], [CONNECTOR:13:SVIDEO-1] checking for sink bpp constrains
>[   20.642597] [drm:intel_tv_compute_config], forcing bpc to 8 for TV
>[   20.642604] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[   20.642609] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[   20.642612] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[   20.642616] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[   20.642621] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.642627] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   20.642630] [drm:intel_dump_pipe_config], requested mode:
>[   20.642637] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.642641] [drm:intel_dump_pipe_config], adjusted mode:
>[   20.642647] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   20.642653] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0
>[   20.642657] [drm:intel_dump_pipe_config], port clock: 108000
>[   20.642661] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[   20.642665] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   20.642670] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   20.642674] [drm:intel_dump_pipe_config], ips: 0
>[   20.642677] [drm:intel_dump_pipe_config], double wide: 0
>[   20.650623] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   20.650635] [drm:intel_crtc_mode_set], [ENCODER:14:TV-14] set [MODE:0:NTSC 480i]
>[   20.656320] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.656323] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.656325] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.656328] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.656330] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   20.656333] [drm:intel_calculate_wm], FIFO watermark level: -5
>[   20.656335] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 1
>[   20.656338] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 1, C: 2, SR 1
>[   20.656340] [drm:i9xx_update_wm], memory self refresh disabled
>[   20.674068] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[   20.674079] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.674087] [drm:intel_connector_check_state], [CONNECTOR:13:SVIDEO-1]
>[   20.674093] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.674099] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.674105] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.674110] [drm:check_crtc_state], [CRTC:3]
>[   20.674124] [drm:check_crtc_state], [CRTC:4]
>[   20.724068] [drm:intel_tv_detect_type], TV detected: c0c07, 7f0000aa
>[   20.724073] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   20.740068] [drm:intel_release_load_detect_pipe], [CONNECTOR:13:SVIDEO-1], [ENCODER:14:TV-14]
>[   20.740076] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   20.797369] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   20.797371] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   20.797373] [drm:intel_calculate_wm], FIFO watermark level: 5
>[   20.797376] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   20.797378] [drm:i9xx_update_wm], FIFO watermarks - A: 5, B: 29
>[   20.797381] [drm:i9xx_update_wm], self-refresh entries: 64
>[   20.797383] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 5, B: 29, C: 2, SR 31
>[   20.797386] [drm:i9xx_update_wm], memory self refresh enabled
>[   20.797388] [drm:intel_update_fbc], disabled per chip default
>[   20.797394] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1]
>[   20.797397] [drm:check_encoder_state], [ENCODER:6:LVDS-6]
>[   20.797400] [drm:check_encoder_state], [ENCODER:12:DAC-12]
>[   20.797403] [drm:check_encoder_state], [ENCODER:14:TV-14]
>[   20.797405] [drm:check_crtc_state], [CRTC:3]
>[   20.797408] [drm:check_crtc_state], [CRTC:4]
>[   20.797516] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:SVIDEO-1] disconnected
>[   20.926638] [drm:drm_mode_addfb], [FB:30]
>[   20.926762] [drm:drm_mode_setcrtc], [CRTC:4]
>[   20.926772] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1]
>[   20.926779] [drm:intel_crtc_set_config], [CRTC:4] [FB:30] #connectors=1 (x y) (0 0)
>[   20.926788] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=1
>[   20.926796] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   20.931965] [drm:i9xx_update_plane], Writing base 00400000 00000000 0 0 4096
>[   20.935123] [drm:drm_mode_setcrtc], [CRTC:3]
>[   20.935129] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   20.935137] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   20.935145] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4]
>[   21.728027] [drm:intel_crt_detect], [CONNECTOR:11:VGA-1] force=0
>[   21.729016] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   21.729020] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   21.729023] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   21.729026] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1
>[   21.729302] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   21.729304] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0
>[   21.729307] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[   21.729311] [drm:intel_tv_detect], [CONNECTOR:13:SVIDEO-1] force=0

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Attachments on bug 76103: 95693 | 95694 | 95710 | 95711 | 95712 | 95713 | 95715 | 95718 | 95724 | 95785 | 96446 | 96448 | 96743

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